25 lines
481 B
C
25 lines
481 B
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2020 Marvell International Ltd.
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*/
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#include <cpu_func.h>
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/* Octeon memory write barrier */
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#define CVMX_SYNCW asm volatile ("syncw\nsyncw\n" : : : "memory")
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void flush_dcache_range(ulong start_addr, ulong stop)
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{
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/* Flush all pending writes */
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CVMX_SYNCW;
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}
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void flush_cache(ulong start_addr, ulong size)
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{
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}
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void invalidate_dcache_range(ulong start_addr, ulong stop)
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{
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/* Don't need to do anything for OCTEON */
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}
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