Paul Burton cc4f36435f MIPS: Break out of cache loops for unimplemented caches ... If we run on a CPU which doesn't implement a particular cache then we would previously get stuck in an infinite loop, executing a cache op on the first "line" of the missing cache & then incrementing the address by 0. This was being avoided for the L2 caches, but not for the L1s. Fix this by generalising the check for a zero line size & avoiding the cache op loop when this is the case. Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: u-boot@lists.denx.de		2017-11-28 21:59:30 +01:00
..
Makefile	MIPS: Stop building position independent code	2017-07-25 20:44:00 +02:00
ashldi3.c	…
ashrdi3.c	…
asm-offsets.c	MIPS: add asm-offsets for struct pt_regs	2016-11-30 16:11:46 +01:00
bootm.c	env: Rename getenv/_f() to env_get()	2017-08-16 08:30:24 -04:00
cache.c	MIPS: Break out of cache loops for unimplemented caches	2017-11-28 21:59:30 +01:00
cache_init.S	MIPS: Ensure cache ops complete in mips_cache_reset	2016-09-21 15:04:04 +02:00
genex.S	MIPS: add handling for generic and EJTAG exceptions	2016-11-30 16:12:17 +01:00
libgcc.h	…
lshrdi3.c	…
reloc.c	MIPS: Stop building position independent code	2017-07-25 20:44:00 +02:00
stack.c	MIPS: reserve space for exception vectors	2016-11-30 16:11:46 +01:00
traps.c	MIPS: add handling for generic and EJTAG exceptions	2016-11-30 16:12:17 +01:00