56 lines
943 B
C
56 lines
943 B
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2008 - 2013 Tensilica Inc.
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* (C) Copyright 2014 - 2016 Cadence Design Systems Inc.
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*/
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/*
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* CPU specific code
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*/
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#include <common.h>
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#include <command.h>
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#include <init.h>
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#include <vsprintf.h>
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#include <linux/stringify.h>
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#include <asm/global_data.h>
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#include <asm/cache.h>
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#include <asm/string.h>
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#include <asm/misc.h>
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DECLARE_GLOBAL_DATA_PTR;
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gd_t *gd __section(".data");
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#if defined(CONFIG_DISPLAY_CPUINFO)
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/*
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* Print information about the CPU.
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*/
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int print_cpuinfo(void)
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{
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char buf[120], mhz[8];
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uint32_t id0, id1;
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asm volatile ("rsr %0, 176\n"
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"rsr %1, 208\n"
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: "=r"(id0), "=r"(id1));
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sprintf(buf, "CPU: Xtensa %s (id: %08x:%08x) at %s MHz\n",
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XCHAL_CORE_ID, id0, id1, strmhz(mhz, gd->cpu_clk));
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puts(buf);
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return 0;
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}
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#endif
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int arch_cpu_init(void)
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{
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gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
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return 0;
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}
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int dram_init(void)
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{
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return 0;
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}
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