71 lines
		
	
	
		
			2.2 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			71 lines
		
	
	
		
			2.2 KiB
		
	
	
	
		
			C
		
	
	
	
| /* SPDX-License-Identifier: GPL-2.0 */
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| /*
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|  * Copyright (C) Marvell International Ltd. and its affiliates
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|  */
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| 
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| #ifndef __XOR_H
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| #define __XOR_H
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| 
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| #include "ddr3_hw_training.h"
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| 
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| #define MV_XOR_MAX_CHAN         4 /* total channels for all units together */
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| 
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| /*
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|  * This enumerator describes the type of functionality the XOR channel
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|  * can have while using the same data structures.
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|  */
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| enum xor_type {
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| 	MV_XOR,		/* XOR channel functions as XOR accelerator     */
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| 	MV_DMA,		/* XOR channel functions as IDMA channel        */
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| 	MV_CRC32	/* XOR channel functions as CRC 32 calculator   */
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| };
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| 
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| /*
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|  * This enumerator describes the set of commands that can be applied on
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|  * an engine (e.g. IDMA, XOR). Appling a comman depends on the current
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|  * status (see MV_STATE enumerator)
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|  * Start can be applied only when status is IDLE
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|  * Stop can be applied only when status is IDLE, ACTIVE or PAUSED
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|  * Pause can be applied only when status is ACTIVE
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|  * Restart can be applied only when status is PAUSED
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|  */
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| enum mv_command {
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| 	MV_START,		/* Start     */
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| 	MV_STOP,		/* Stop     */
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| 	MV_PAUSE,		/* Pause    */
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| 	MV_RESTART		/* Restart  */
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| };
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| 
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| /*
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|  * This enumerator describes the set of state conditions.
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|  * Moving from one state to other is stricted.
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|  */
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| enum mv_state {
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| 	MV_IDLE,
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| 	MV_ACTIVE,
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| 	MV_PAUSED,
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| 	MV_UNDEFINED_STATE
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| };
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| 
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| /* XOR descriptor structure for CRC and DMA descriptor */
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| struct crc_dma_desc {
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| 	u32 status;		/* Successful descriptor execution indication */
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| 	u32 crc32_result;	/* Result of CRC-32 calculation */
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| 	u32 desc_cmd;		/* type of operation to be carried out on the data */
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| 	u32 next_desc_ptr;	/* Next descriptor address pointer */
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| 	u32 byte_cnt;		/* Size of source block part represented by the descriptor */
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| 	u32 dst_addr;		/* Destination Block address pointer (not used in CRC32 */
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| 	u32 src_addr0;		/* Mode: Source Block address pointer */
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| 	u32 src_addr1;		/* Mode: Source Block address pointer */
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| } __packed;
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| 
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| void mv_xor_hal_init(u32 chan_num);
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| int mv_xor_state_get(u32 chan);
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| void mv_sys_xor_init(MV_DRAM_INFO *dram_info);
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| void mv_sys_xor_finish(void);
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| int mv_xor_transfer(u32 chan, int xor_type, u32 xor_chain_ptr);
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| int mv_xor_mem_init(u32 chan, u32 start_ptr, unsigned long long block_size,
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| 		    u32 init_val_high, u32 init_val_low);
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| 
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| #endif /* __XOR_H */
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