ccdb7c2255
Based on the MCU R5 efuse settings, R5F cores in MCU domain either work in split mode or in lock step mode. If efuse settings are in lockstep mode: ROM release R5 cores and SPL continues to run on the R5 core is lockstep mode. If efuse settings are in split mode: ROM releases both the R5 cores simultaneously and allow SPL to run on both the cores. In this case it is bootloader's responsibility to detect core 1 and park it. Else both the core will be running bootloader independently which might result in an unexpected behaviour. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
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| .. | ||
| include/mach | ||
| Kconfig | ||
| Makefile | ||
| am6_init.c | ||
| arm64-mmu.c | ||
| common.c | ||
| common.h | ||
| config.mk | ||
| lowlevel_init.S | ||
| r5_mpu.c | ||