4cf56ec07f
Enable PCI memory regions in ranges property to be of multiple entry. This helps to add support for SoC's like OcteonTX/TX2 where every peripheral is on PCI bus. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> |
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| .. | ||
| cpu | ||
| dts | ||
| include/asm | ||
| lib | ||
| Kconfig | ||
| Makefile | ||
| config.mk | ||