59 lines
1.4 KiB
C
59 lines
1.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2019-21 Sean Anderson <seanga2@gmail.com>
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*/
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#ifndef CLOCK_K210_SYSCTL_H
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#define CLOCK_K210_SYSCTL_H
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/*
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* Arbitrary identifiers for clocks.
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*/
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#define K210_CLK_PLL0 0
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#define K210_CLK_PLL1 1
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#define K210_CLK_PLL2 2
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#define K210_CLK_CPU 3
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#define K210_CLK_SRAM0 4
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#define K210_CLK_SRAM1 5
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#define K210_CLK_ACLK 6
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#define K210_CLK_CLINT 7
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#define K210_CLK_APB0 8
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#define K210_CLK_APB1 9
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#define K210_CLK_APB2 10
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#define K210_CLK_ROM 11
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#define K210_CLK_DMA 12
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#define K210_CLK_AI 13
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#define K210_CLK_DVP 14
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#define K210_CLK_FFT 15
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#define K210_CLK_GPIO 16
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#define K210_CLK_SPI0 17
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#define K210_CLK_SPI1 18
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#define K210_CLK_SPI2 19
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#define K210_CLK_SPI3 20
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#define K210_CLK_I2S0 21
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#define K210_CLK_I2S1 22
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#define K210_CLK_I2S2 23
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#define K210_CLK_I2S0_M 24
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#define K210_CLK_I2S1_M 25
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#define K210_CLK_I2S2_M 26
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#define K210_CLK_I2C0 27
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#define K210_CLK_I2C1 28
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#define K210_CLK_I2C2 29
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#define K210_CLK_UART1 30
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#define K210_CLK_UART2 31
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#define K210_CLK_UART3 32
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#define K210_CLK_AES 33
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#define K210_CLK_FPIOA 34
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#define K210_CLK_TIMER0 35
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#define K210_CLK_TIMER1 36
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#define K210_CLK_TIMER2 37
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#define K210_CLK_WDT0 38
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#define K210_CLK_WDT1 39
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#define K210_CLK_SHA 40
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#define K210_CLK_OTP 41
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#define K210_CLK_RTC 42
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#define K210_CLK_IN0 43
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#endif /* CLOCK_K210_SYSCTL_H */
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