e7005b3e80
Communication with some SPI slaves just won't cut it if these delays (before the beginning, and after the end of a transfer) are not added to the Chip Select signal. These are a straight copy from Linux: Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt drivers/spi/spi-fsl-dspi.c Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> |
||
|---|---|---|
| .. | ||
| soft-spi.txt | ||
| spi-atcspi200.txt | ||
| spi-ath79.txt | ||
| spi-bus.txt | ||
| spi-cadence.txt | ||
| spi-mcf-dspi.txt | ||
| spi-stm32-qspi.txt | ||
| spi-zynq-qspi.txt | ||
| spi-zynq.txt | ||
| spi_altera.txt | ||