a43b60cc78
The default implementation of ERR_PTR/PTR_ERR maps errno values at the and of the address range (e.g. -EINVAL/-22 gets 0xFFFFFFEA). For socfpga gen5 SPL, this doesn't really work, as the heap is nearly at the end of the 32 bit address range. This patch adjusts the ERR_PTR_OFFSET to map errno values into the range of the Boot ROM, which should not be used for valid pointers. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
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| .. | ||
| include/mach | ||
| Kconfig | ||
| Makefile | ||
| board.c | ||
| clock_manager.c | ||
| clock_manager_arria10.c | ||
| clock_manager_gen5.c | ||
| clock_manager_s10.c | ||
| fpga_manager.c | ||
| freeze_controller.c | ||
| mailbox_s10.c | ||
| misc.c | ||
| misc_arria10.c | ||
| misc_gen5.c | ||
| misc_s10.c | ||
| mmu-arm64_s10.c | ||
| pinmux_arria10.c | ||
| qts-filter.sh | ||
| reset_manager_arria10.c | ||
| reset_manager_gen5.c | ||
| reset_manager_s10.c | ||
| scan_manager.c | ||
| spl_a10.c | ||
| spl_gen5.c | ||
| spl_s10.c | ||
| system_manager_gen5.c | ||
| system_manager_s10.c | ||
| timer.c | ||
| timer_s10.c | ||
| wrap_iocsr_config.c | ||
| wrap_pinmux_config.c | ||
| wrap_pinmux_config_s10.c | ||
| wrap_pll_config.c | ||
| wrap_pll_config_s10.c | ||
| wrap_sdram_config.c | ||