138 lines
		
	
	
		
			3.6 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			138 lines
		
	
	
		
			3.6 KiB
		
	
	
	
		
			C
		
	
	
	
| /*
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|  * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
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|  * Scott McNutt <smcnutt@psyent.com>
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|  *
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|  * SPDX-License-Identifier:	GPL-2.0+
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|  */
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| 
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| 
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| #include <common.h>
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| #include <watchdog.h>
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| #include <asm/io.h>
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| #include <linux/compiler.h>
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| #include <serial.h>
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| 
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| typedef volatile struct {
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| 	unsigned	rxdata;		/* Rx data reg */
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| 	unsigned	txdata;		/* Tx data reg */
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| 	unsigned	status;		/* Status reg */
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| 	unsigned	control;	/* Control reg */
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| 	unsigned	divisor;	/* Baud rate divisor reg */
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| 	unsigned	endofpacket;	/* End-of-packet reg */
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| } nios_uart_t;
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| 
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| /* status register */
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| #define NIOS_UART_PE		(1 << 0)	/* parity error */
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| #define NIOS_UART_FE		(1 << 1)	/* frame error */
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| #define NIOS_UART_BRK		(1 << 2)	/* break detect */
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| #define NIOS_UART_ROE		(1 << 3)	/* rx overrun */
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| #define NIOS_UART_TOE		(1 << 4)	/* tx overrun */
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| #define NIOS_UART_TMT		(1 << 5)	/* tx empty */
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| #define NIOS_UART_TRDY		(1 << 6)	/* tx ready */
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| #define NIOS_UART_RRDY		(1 << 7)	/* rx ready */
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| #define NIOS_UART_E		(1 << 8)	/* exception */
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| #define NIOS_UART_DCTS		(1 << 10)	/* cts change */
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| #define NIOS_UART_CTS		(1 << 11)	/* cts */
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| #define NIOS_UART_EOP		(1 << 12)	/* eop detected */
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| 
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| /* control register */
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| #define NIOS_UART_IPE		(1 << 0)	/* parity error int ena*/
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| #define NIOS_UART_IFE		(1 << 1)	/* frame error int ena */
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| #define NIOS_UART_IBRK		(1 << 2)	/* break detect int ena */
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| #define NIOS_UART_IROE		(1 << 3)	/* rx overrun int ena */
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| #define NIOS_UART_ITOE		(1 << 4)	/* tx overrun int ena */
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| #define NIOS_UART_ITMT		(1 << 5)	/* tx empty int ena */
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| #define NIOS_UART_ITRDY		(1 << 6)	/* tx ready int ena */
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| #define NIOS_UART_IRRDY		(1 << 7)	/* rx ready int ena */
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| #define NIOS_UART_IE		(1 << 8)	/* exception int ena */
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| #define NIOS_UART_TBRK		(1 << 9)	/* transmit break */
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| #define NIOS_UART_IDCTS		(1 << 10)	/* cts change int ena */
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| #define NIOS_UART_RTS		(1 << 11)	/* rts */
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| #define NIOS_UART_IEOP		(1 << 12)	/* eop detected int ena */
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| 
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| DECLARE_GLOBAL_DATA_PTR;
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| 
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| /*------------------------------------------------------------------
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|  * UART the serial port
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|  *-----------------------------------------------------------------*/
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| 
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| static nios_uart_t *uart = (nios_uart_t *) CONFIG_SYS_NIOS_CONSOLE;
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| 
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| #if defined(CONFIG_SYS_NIOS_FIXEDBAUD)
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| 
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| /*
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|  * Everything's already setup for fixed-baud PTF
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|  * assignment
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|  */
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| static void altera_serial_setbrg(void)
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| {
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| }
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| 
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| static int altera_serial_init(void)
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| {
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| 	return 0;
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| }
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| 
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| #else
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| 
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| static void altera_serial_setbrg(void)
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| {
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| 	unsigned div;
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| 
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| 	div = (CONFIG_SYS_CLK_FREQ/gd->baudrate)-1;
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| 	writel (div, &uart->divisor);
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| }
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| 
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| static int altera_serial_init(void)
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| {
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| 	serial_setbrg();
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| 	return 0;
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| }
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| 
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| #endif /* CONFIG_SYS_NIOS_FIXEDBAUD */
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| 
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| /*-----------------------------------------------------------------------
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|  * UART CONSOLE
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|  *---------------------------------------------------------------------*/
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| static void altera_serial_putc(char c)
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| {
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| 	if (c == '\n')
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| 		serial_putc ('\r');
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| 	while ((readl (&uart->status) & NIOS_UART_TRDY) == 0)
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| 		WATCHDOG_RESET ();
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| 	writel ((unsigned char)c, &uart->txdata);
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| }
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| 
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| static int altera_serial_tstc(void)
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| {
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| 	return (readl (&uart->status) & NIOS_UART_RRDY);
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| }
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| 
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| static int altera_serial_getc(void)
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| {
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| 	while (serial_tstc () == 0)
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| 		WATCHDOG_RESET ();
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| 	return (readl (&uart->rxdata) & 0x00ff );
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| }
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| 
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| static struct serial_device altera_serial_drv = {
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| 	.name	= "altera_serial",
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| 	.start	= altera_serial_init,
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| 	.stop	= NULL,
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| 	.setbrg	= altera_serial_setbrg,
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| 	.putc	= altera_serial_putc,
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| 	.puts	= default_serial_puts,
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| 	.getc	= altera_serial_getc,
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| 	.tstc	= altera_serial_tstc,
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| };
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| 
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| void altera_serial_initialize(void)
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| {
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| 	serial_register(&altera_serial_drv);
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| }
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| 
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| __weak struct serial_device *default_serial_console(void)
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| {
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| 	return &altera_serial_drv;
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| }
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