92 lines
1.6 KiB
C
92 lines
1.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2010
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* Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc
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*/
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#ifndef __GDSYS_FPGA_H
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#define __GDSYS_FPGA_H
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#ifdef CONFIG_GDSYS_LEGACY_DRIVERS
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int init_func_fpga(void);
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enum {
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FPGA_STATE_DONE_FAILED = 1 << 0,
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FPGA_STATE_REFLECTION_FAILED = 1 << 1,
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FPGA_STATE_PLATFORM = 1 << 2,
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};
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int get_fpga_state(unsigned dev);
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int fpga_set_reg(u32 fpga, u16 *reg, off_t regoff, u16 data);
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int fpga_get_reg(u32 fpga, u16 *reg, off_t regoff, u16 *data);
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extern struct ihs_fpga *fpga_ptr[];
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#define FPGA_SET_REG(ix, fld, val) \
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fpga_set_reg((ix), \
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&fpga_ptr[ix]->fld, \
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offsetof(struct ihs_fpga, fld), \
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val)
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#define FPGA_GET_REG(ix, fld, val) \
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fpga_get_reg((ix), \
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&fpga_ptr[ix]->fld, \
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offsetof(struct ihs_fpga, fld), \
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val)
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#endif
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struct ihs_gpio {
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u16 read;
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u16 clear;
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u16 set;
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};
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struct ihs_i2c {
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u16 interrupt_status;
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u16 interrupt_enable;
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u16 write_mailbox_ext;
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u16 write_mailbox;
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u16 read_mailbox_ext;
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u16 read_mailbox;
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};
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struct ihs_osd {
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u16 version;
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u16 features;
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u16 control;
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u16 xy_size;
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u16 xy_scale;
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u16 x_pos;
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u16 y_pos;
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};
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struct ihs_mdio {
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u16 control;
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u16 address_data;
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u16 rx_data;
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};
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struct ihs_io_ep {
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u16 transmit_data;
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u16 rx_tx_control;
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u16 receive_data;
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u16 rx_tx_status;
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u16 reserved;
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u16 device_address;
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u16 target_address;
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};
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#ifdef CONFIG_NEO
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struct ihs_fpga {
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u16 reflection_low; /* 0x0000 */
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u16 versions; /* 0x0002 */
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u16 fpga_features; /* 0x0004 */
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u16 fpga_version; /* 0x0006 */
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u16 reserved_0[8187]; /* 0x0008 */
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u16 reflection_high; /* 0x3ffe */
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};
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#endif
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#endif
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