462 lines
12 KiB
C
462 lines
12 KiB
C
/****************************************************************
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* $ID: i2c.c 24 Oct 2006 12:00:00 +0800 $ *
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* *
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* Description: *
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* *
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* Maintainer: sonicz <sonic.zhang@analog.com> *
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* *
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* CopyRight (c) 2006 Analog Device *
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* All rights reserved. *
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* *
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* This file is free software; *
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* you are free to modify and/or redistribute it *
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* under the terms of the GNU General Public Licence (GPL).*
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* *
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****************************************************************/
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#include <common.h>
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#ifdef CONFIG_HARD_I2C
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#include <asm/blackfin.h>
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#include <i2c.h>
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#include <asm/io.h>
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DECLARE_GLOBAL_DATA_PTR;
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#define bfin_read16(addr) ({ unsigned __v; \
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__asm__ __volatile__ (\
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"%0 = w[%1] (z);\n\t"\
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: "=d"(__v) : "a"(addr)); (unsigned short)__v; })
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#define bfin_write16(addr,val) ({\
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__asm__ __volatile__ (\
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"w[%0] = %1;\n\t"\
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: : "a"(addr) , "d"(val) : "memory");})
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/* Two-Wire Interface (0xFFC01400 - 0xFFC014FF) */
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#define bfin_read_TWI_CLKDIV() bfin_read16(TWI_CLKDIV)
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#define bfin_write_TWI_CLKDIV(val) bfin_write16(TWI_CLKDIV,val)
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#define bfin_read_TWI_CONTROL() bfin_read16(TWI_CONTROL)
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#define bfin_write_TWI_CONTROL(val) bfin_write16(TWI_CONTROL,val)
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#define bfin_read_TWI_SLAVE_CTL() bfin_read16(TWI_SLAVE_CTL)
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#define bfin_write_TWI_SLAVE_CTL(val) bfin_write16(TWI_SLAVE_CTL,val)
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#define bfin_read_TWI_SLAVE_STAT() bfin_read16(TWI_SLAVE_STAT)
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#define bfin_write_TWI_SLAVE_STAT(val) bfin_write16(TWI_SLAVE_STAT,val)
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#define bfin_read_TWI_SLAVE_ADDR() bfin_read16(TWI_SLAVE_ADDR)
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#define bfin_write_TWI_SLAVE_ADDR(val) bfin_write16(TWI_SLAVE_ADDR,val)
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#define bfin_read_TWI_MASTER_CTL() bfin_read16(TWI_MASTER_CTL)
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#define bfin_write_TWI_MASTER_CTL(val) bfin_write16(TWI_MASTER_CTL,val)
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#define bfin_read_TWI_MASTER_STAT() bfin_read16(TWI_MASTER_STAT)
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#define bfin_write_TWI_MASTER_STAT(val) bfin_write16(TWI_MASTER_STAT,val)
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#define bfin_read_TWI_MASTER_ADDR() bfin_read16(TWI_MASTER_ADDR)
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#define bfin_write_TWI_MASTER_ADDR(val) bfin_write16(TWI_MASTER_ADDR,val)
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#define bfin_read_TWI_INT_STAT() bfin_read16(TWI_INT_STAT)
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#define bfin_write_TWI_INT_STAT(val) bfin_write16(TWI_INT_STAT,val)
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#define bfin_read_TWI_INT_MASK() bfin_read16(TWI_INT_MASK)
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#define bfin_write_TWI_INT_MASK(val) bfin_write16(TWI_INT_MASK,val)
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#define bfin_read_TWI_FIFO_CTL() bfin_read16(TWI_FIFO_CTL)
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#define bfin_write_TWI_FIFO_CTL(val) bfin_write16(TWI_FIFO_CTL,val)
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#define bfin_read_TWI_FIFO_STAT() bfin_read16(TWI_FIFO_STAT)
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#define bfin_write_TWI_FIFO_STAT(val) bfin_write16(TWI_FIFO_STAT,val)
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#define bfin_read_TWI_XMT_DATA8() bfin_read16(TWI_XMT_DATA8)
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#define bfin_write_TWI_XMT_DATA8(val) bfin_write16(TWI_XMT_DATA8,val)
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#define bfin_read_TWI_XMT_DATA16() bfin_read16(TWI_XMT_DATA16)
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#define bfin_write_TWI_XMT_DATA16(val) bfin_write16(TWI_XMT_DATA16,val)
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#define bfin_read_TWI_RCV_DATA8() bfin_read16(TWI_RCV_DATA8)
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#define bfin_write_TWI_RCV_DATA8(val) bfin_write16(TWI_RCV_DATA8,val)
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#define bfin_read_TWI_RCV_DATA16() bfin_read16(TWI_RCV_DATA16)
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#define bfin_write_TWI_RCV_DATA16(val) bfin_write16(TWI_RCV_DATA16,val)
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#ifdef DEBUG_I2C
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#define PRINTD(fmt,args...) do { \
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if (gd->have_console) \
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printf(fmt ,##args); \
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} while (0)
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#else
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#define PRINTD(fmt,args...)
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#endif
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#ifndef CONFIG_TWICLK_KHZ
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#define CONFIG_TWICLK_KHZ 50
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#endif
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/* All transfers are described by this data structure */
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struct i2c_msg {
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u16 addr; /* slave address */
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u16 flags;
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#define I2C_M_STOP 0x2
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#define I2C_M_RD 0x1
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u16 len; /* msg length */
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u8 *buf; /* pointer to msg data */
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};
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/**
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* i2c_reset: - reset the host controller
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*
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*/
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static void i2c_reset(void)
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{
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/* Disable TWI */
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bfin_write_TWI_CONTROL(0);
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sync();
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/* Set TWI internal clock as 10MHz */
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bfin_write_TWI_CONTROL(((get_sclk() / 1024 / 1024 + 5) / 10) & 0x7F);
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/* Set Twi interface clock as specified */
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if (CONFIG_TWICLK_KHZ > 400)
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bfin_write_TWI_CLKDIV(((5 * 1024 / 400) << 8) | ((5 * 1024 /
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400) & 0xFF));
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else
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bfin_write_TWI_CLKDIV(((5 * 1024 /
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CONFIG_TWICLK_KHZ) << 8) | ((5 * 1024 /
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CONFIG_TWICLK_KHZ)
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& 0xFF));
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/* Enable TWI */
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bfin_write_TWI_CONTROL(bfin_read_TWI_CONTROL() | TWI_ENA);
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sync();
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}
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int wait_for_completion(struct i2c_msg *msg, int timeout_count)
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{
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unsigned short twi_int_stat;
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unsigned short mast_stat;
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int i;
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for (i = 0; i < timeout_count; i++) {
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twi_int_stat = bfin_read_TWI_INT_STAT();
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mast_stat = bfin_read_TWI_MASTER_STAT();
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if (XMTSERV & twi_int_stat) {
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/* Transmit next data */
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if (msg->len > 0) {
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bfin_write_TWI_XMT_DATA8(*(msg->buf++));
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msg->len--;
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} else if (msg->flags & I2C_M_STOP)
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bfin_write_TWI_MASTER_CTL
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(bfin_read_TWI_MASTER_CTL() | STOP);
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sync();
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/* Clear status */
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bfin_write_TWI_INT_STAT(XMTSERV);
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sync();
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i = 0;
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}
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if (RCVSERV & twi_int_stat) {
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if (msg->len > 0) {
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/* Receive next data */
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*(msg->buf++) = bfin_read_TWI_RCV_DATA8();
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msg->len--;
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} else if (msg->flags & I2C_M_STOP) {
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bfin_write_TWI_MASTER_CTL
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(bfin_read_TWI_MASTER_CTL() | STOP);
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sync();
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}
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/* Clear interrupt source */
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bfin_write_TWI_INT_STAT(RCVSERV);
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sync();
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i = 0;
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}
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if (MERR & twi_int_stat) {
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bfin_write_TWI_INT_STAT(MERR);
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bfin_write_TWI_INT_MASK(0);
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bfin_write_TWI_MASTER_STAT(0x3e);
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bfin_write_TWI_MASTER_CTL(0);
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sync();
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/*
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* if both err and complete int stats are set,
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* return proper results.
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*/
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if (MCOMP & twi_int_stat) {
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bfin_write_TWI_INT_STAT(MCOMP);
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bfin_write_TWI_INT_MASK(0);
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bfin_write_TWI_MASTER_CTL(0);
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sync();
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/*
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* If it is a quick transfer,
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* only address bug no data, not an err.
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*/
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if (msg->len == 0 && mast_stat & BUFRDERR)
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return 0;
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/*
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* If address not acknowledged return -3,
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* else return 0.
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*/
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else if (!(mast_stat & ANAK))
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return 0;
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else
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return -3;
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}
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return -1;
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}
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if (MCOMP & twi_int_stat) {
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bfin_write_TWI_INT_STAT(MCOMP);
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sync();
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bfin_write_TWI_INT_MASK(0);
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bfin_write_TWI_MASTER_CTL(0);
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sync();
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return 0;
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}
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}
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if (msg->flags & I2C_M_RD)
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return -4;
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else
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return -2;
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}
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/**
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* i2c_transfer: - Transfer one byte over the i2c bus
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*
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* This function can tranfer a byte over the i2c bus in both directions.
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* It is used by the public API functions.
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*
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* @return: 0: transfer successful
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* -1: transfer fail
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* -2: transmit timeout
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* -3: ACK missing
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* -4: receive timeout
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* -5: controller not ready
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*/
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int i2c_transfer(struct i2c_msg *msg)
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{
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int ret = 0;
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int timeout_count = 10000;
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int len = msg->len;
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if (!(bfin_read_TWI_CONTROL() & TWI_ENA)) {
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ret = -5;
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goto transfer_error;
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}
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while (bfin_read_TWI_MASTER_STAT() & BUSBUSY) ;
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/* Set Transmit device address */
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bfin_write_TWI_MASTER_ADDR(msg->addr);
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/*
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* FIFO Initiation.
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* Data in FIFO should be discarded before start a new operation.
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*/
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bfin_write_TWI_FIFO_CTL(0x3);
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sync();
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bfin_write_TWI_FIFO_CTL(0);
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sync();
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if (!(msg->flags & I2C_M_RD)) {
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/* Transmit first data */
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if (msg->len > 0) {
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PRINTD("1 in i2c_transfer: buf=%d, len=%d\n", *msg->buf,
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len);
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bfin_write_TWI_XMT_DATA8(*(msg->buf++));
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msg->len--;
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sync();
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}
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}
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/* clear int stat */
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bfin_write_TWI_INT_STAT(MERR | MCOMP | XMTSERV | RCVSERV);
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/* Interrupt mask . Enable XMT, RCV interrupt */
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bfin_write_TWI_INT_MASK(MCOMP | MERR |
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((msg->flags & I2C_M_RD) ? RCVSERV : XMTSERV));
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sync();
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if (len > 0 && len <= 255)
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bfin_write_TWI_MASTER_CTL((len << 6));
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else if (msg->len > 255) {
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bfin_write_TWI_MASTER_CTL((0xff << 6));
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msg->flags &= I2C_M_STOP;
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} else
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bfin_write_TWI_MASTER_CTL(0);
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/* Master enable */
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bfin_write_TWI_MASTER_CTL(bfin_read_TWI_MASTER_CTL() | MEN |
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((msg->flags & I2C_M_RD)
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? MDIR : 0) | ((CONFIG_TWICLK_KHZ >
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100) ? FAST : 0));
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sync();
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ret = wait_for_completion(msg, timeout_count);
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PRINTD("3 in i2c_transfer: ret=%d\n", ret);
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transfer_error:
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switch (ret) {
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case 1:
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PRINTD(("i2c_transfer: error: transfer fail\n"));
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break;
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case 2:
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PRINTD(("i2c_transfer: error: transmit timeout\n"));
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break;
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case 3:
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PRINTD(("i2c_transfer: error: ACK missing\n"));
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break;
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case 4:
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PRINTD(("i2c_transfer: error: receive timeout\n"));
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break;
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case 5:
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PRINTD(("i2c_transfer: error: controller not ready\n"));
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i2c_reset();
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break;
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default:
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break;
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}
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return ret;
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}
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/* ---------------------------------------------------------------------*/
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/* API Functions */
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/* ---------------------------------------------------------------------*/
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void i2c_init(int speed, int slaveaddr)
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{
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i2c_reset();
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}
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/**
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* i2c_probe: - Test if a chip answers for a given i2c address
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*
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* @chip: address of the chip which is searched for
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* @return: 0 if a chip was found, -1 otherwhise
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*/
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int i2c_probe(uchar chip)
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{
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struct i2c_msg msg;
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u8 probebuf;
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i2c_reset();
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probebuf = 0;
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msg.addr = chip;
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msg.flags = 0;
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msg.len = 1;
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msg.buf = &probebuf;
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if (i2c_transfer(&msg))
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return -1;
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msg.addr = chip;
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msg.flags = I2C_M_RD;
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msg.len = 1;
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msg.buf = &probebuf;
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if (i2c_transfer(&msg))
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return -1;
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return 0;
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}
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/**
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* i2c_read: - Read multiple bytes from an i2c device
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*
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* chip: I2C chip address, range 0..127
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* addr: Memory (register) address within the chip
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* alen: Number of bytes to use for addr (typically 1, 2 for larger
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* memories, 0 for register type devices with only one
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* register)
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* buffer: Where to read/write the data
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* len: How many bytes to read/write
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*
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* Returns: 0 on success, not 0 on failure
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*/
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int i2c_read(uchar chip, uint addr, int alen, uchar * buffer, int len)
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{
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struct i2c_msg msg;
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u8 addr_bytes[3]; /* lowest...highest byte of data address */
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PRINTD("i2c_read: chip=0x%x, addr=0x%x, alen=0x%x, len=0x%x\n", chip,
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addr, alen, len);
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if (alen > 0) {
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addr_bytes[0] = (u8) ((addr >> 0) & 0x000000FF);
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addr_bytes[1] = (u8) ((addr >> 8) & 0x000000FF);
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addr_bytes[2] = (u8) ((addr >> 16) & 0x000000FF);
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msg.addr = chip;
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msg.flags = 0;
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msg.len = alen;
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msg.buf = addr_bytes;
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if (i2c_transfer(&msg))
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return -1;
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}
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/* start read sequence */
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PRINTD(("i2c_read: start read sequence\n"));
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msg.addr = chip;
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msg.flags = I2C_M_RD;
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msg.len = len;
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msg.buf = buffer;
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if (i2c_transfer(&msg))
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return -1;
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return 0;
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}
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/**
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* i2c_write: - Write multiple bytes to an i2c device
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*
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* chip: I2C chip address, range 0..127
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* addr: Memory (register) address within the chip
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* alen: Number of bytes to use for addr (typically 1, 2 for larger
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* memories, 0 for register type devices with only one
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* register)
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* buffer: Where to read/write the data
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* len: How many bytes to read/write
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*
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* Returns: 0 on success, not 0 on failure
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*/
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int i2c_write(uchar chip, uint addr, int alen, uchar * buffer, int len)
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{
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struct i2c_msg msg;
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u8 addr_bytes[3]; /* lowest...highest byte of data address */
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PRINTD
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("i2c_write: chip=0x%x, addr=0x%x, alen=0x%x, len=0x%x, buf0=0x%x\n",
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chip, addr, alen, len, buffer[0]);
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/* chip address write */
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if (alen > 0) {
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addr_bytes[0] = (u8) ((addr >> 0) & 0x000000FF);
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addr_bytes[1] = (u8) ((addr >> 8) & 0x000000FF);
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addr_bytes[2] = (u8) ((addr >> 16) & 0x000000FF);
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msg.addr = chip;
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msg.flags = 0;
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msg.len = alen;
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msg.buf = addr_bytes;
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if (i2c_transfer(&msg))
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return -1;
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}
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/* start read sequence */
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PRINTD(("i2c_write: start write sequence\n"));
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msg.addr = chip;
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msg.flags = 0;
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msg.len = len;
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msg.buf = buffer;
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if (i2c_transfer(&msg))
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return -1;
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return 0;
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}
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uchar i2c_reg_read(uchar chip, uchar reg)
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{
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uchar buf;
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PRINTD("i2c_reg_read: chip=0x%02x, reg=0x%02x\n", chip, reg);
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i2c_read(chip, reg, 0, &buf, 1);
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return (buf);
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}
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void i2c_reg_write(uchar chip, uchar reg, uchar val)
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{
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PRINTD("i2c_reg_write: chip=0x%02x, reg=0x%02x, val=0x%02x\n", chip,
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reg, val);
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i2c_write(chip, reg, 0, &val, 1);
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}
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#endif /* CONFIG_HARD_I2C */
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