47 lines
999 B
C
47 lines
999 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* R-Car Gen2 Clock Pulse Generator
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*
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* Copyright (C) 2016 Cogent Embedded Inc.
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*/
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#ifndef __CLK_RENESAS_RCAR_GEN2_CPG_H__
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#define __CLK_RENESAS_RCAR_GEN2_CPG_H__
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enum rcar_gen2_clk_types {
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CLK_TYPE_GEN2_MAIN = CLK_TYPE_CUSTOM,
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CLK_TYPE_GEN2_PLL0,
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CLK_TYPE_GEN2_PLL1,
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CLK_TYPE_GEN2_PLL3,
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CLK_TYPE_GEN2_Z,
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CLK_TYPE_GEN2_LB,
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CLK_TYPE_GEN2_ADSP,
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CLK_TYPE_GEN2_SDH,
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CLK_TYPE_GEN2_SD0,
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CLK_TYPE_GEN2_SD1,
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CLK_TYPE_GEN2_QSPI,
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CLK_TYPE_GEN2_RCAN,
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};
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struct rcar_gen2_cpg_pll_config {
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unsigned int extal_div;
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unsigned int pll1_mult;
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unsigned int pll3_mult;
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unsigned int pll0_mult; /* leave as zero if PLL0CR exists */
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};
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struct gen2_clk_priv {
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void __iomem *base;
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struct cpg_mssr_info *info;
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struct clk clk_extal;
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struct clk clk_extal_usb;
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const struct rcar_gen2_cpg_pll_config *cpg_pll_config;
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};
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int gen2_clk_probe(struct udevice *dev);
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int gen2_clk_remove(struct udevice *dev);
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extern const struct clk_ops gen2_clk_ops;
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#endif
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