469 lines
14 KiB
C
469 lines
14 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright (C) 2019 ROHM Semiconductors
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*
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* ROHM BD71837 regulator driver
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*/
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#include <common.h>
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#include <dm.h>
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#include <power/bd71837.h>
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#include <power/pmic.h>
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#include <power/regulator.h>
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#define HW_STATE_CONTROL 0
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#define DEBUG
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/**
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* struct bd71837_vrange - describe linear range of voltages
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*
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* @min_volt: smallest voltage in range
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* @step: how much voltage changes at each selector step
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* @min_sel: smallest selector in the range
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* @max_sel: maximum selector in the range
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* @rangeval: register value used to select this range if selectible
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* ranges are supported
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*/
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struct bd71837_vrange {
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unsigned int min_volt;
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unsigned int step;
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u8 min_sel;
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u8 max_sel;
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u8 rangeval;
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};
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/**
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* struct bd71837_platdata - describe regulator control registers
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*
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* @name: name of the regulator. Used for matching the dt-entry
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* @enable_reg: register address used to enable/disable regulator
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* @enablemask: register mask used to enable/disable regulator
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* @volt_reg: register address used to configure regulator voltage
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* @volt_mask: register mask used to configure regulator voltage
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* @ranges: pointer to ranges of regulator voltages and matching register
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* values
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* @numranges: number of voltage ranges pointed by ranges
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* @rangemask: mask for selecting used ranges if multiple ranges are supported
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* @sel_mask: bit to toggle in order to transfer the register control to SW
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* @dvs: whether the voltage can be changed when regulator is enabled
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*/
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struct bd71837_platdata {
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const char *name;
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u8 enable_reg;
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u8 enablemask;
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u8 volt_reg;
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u8 volt_mask;
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struct bd71837_vrange *ranges;
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unsigned int numranges;
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u8 rangemask;
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u8 sel_mask;
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bool dvs;
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};
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#define BD_RANGE(_min, _vstep, _sel_low, _sel_hi, _range_sel) \
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{ \
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.min_volt = (_min), .step = (_vstep), .min_sel = (_sel_low), \
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.max_sel = (_sel_hi), .rangeval = (_range_sel) \
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}
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#define BD_DATA(_name, enreg, enmask, vreg, vmask, _range, rmask, _dvs, sel) \
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{ \
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.name = (_name), .enable_reg = (enreg), .enablemask = (enmask), \
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.volt_reg = (vreg), .volt_mask = (vmask), .ranges = (_range), \
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.numranges = ARRAY_SIZE(_range), .rangemask = (rmask), .dvs = (_dvs), \
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.sel_mask = (sel) \
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}
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static struct bd71837_vrange dvs_buck_vranges[] = {
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BD_RANGE(700000, 10000, 0, 0x3c, 0),
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BD_RANGE(1300000, 0, 0x3d, 0x3f, 0),
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};
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static struct bd71837_vrange bd71847_buck3_vranges[] = {
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BD_RANGE(700000, 100000, 0x00, 0x03, 0),
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BD_RANGE(1050000, 50000, 0x04, 0x05, 0),
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BD_RANGE(1200000, 150000, 0x06, 0x07, 0),
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BD_RANGE(550000, 50000, 0x0, 0x7, 0x40),
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BD_RANGE(675000, 100000, 0x0, 0x3, 0x80),
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BD_RANGE(1025000, 50000, 0x4, 0x5, 0x80),
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BD_RANGE(1175000, 150000, 0x6, 0x7, 0x80),
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};
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static struct bd71837_vrange bd71847_buck4_vranges[] = {
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BD_RANGE(3000000, 100000, 0x00, 0x03, 0),
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BD_RANGE(2600000, 100000, 0x00, 0x03, 40),
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};
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static struct bd71837_vrange bd71837_buck5_vranges[] = {
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BD_RANGE(700000, 100000, 0, 0x3, 0),
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BD_RANGE(1050000, 50000, 0x04, 0x05, 0),
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BD_RANGE(1200000, 150000, 0x06, 0x07, 0),
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BD_RANGE(675000, 100000, 0x0, 0x3, 0x80),
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BD_RANGE(1025000, 50000, 0x04, 0x05, 0x80),
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BD_RANGE(1175000, 150000, 0x06, 0x07, 0x80),
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};
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static struct bd71837_vrange bd71837_buck6_vranges[] = {
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BD_RANGE(3000000, 100000, 0x00, 0x03, 0),
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};
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static struct bd71837_vrange nodvs_buck3_vranges[] = {
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BD_RANGE(1605000, 90000, 0, 1, 0),
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BD_RANGE(1755000, 45000, 2, 4, 0),
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BD_RANGE(1905000, 45000, 5, 7, 0),
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};
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static struct bd71837_vrange nodvs_buck4_vranges[] = {
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BD_RANGE(800000, 10000, 0x00, 0x3C, 0),
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};
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static struct bd71837_vrange ldo1_vranges[] = {
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BD_RANGE(3000000, 100000, 0x00, 0x03, 0),
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BD_RANGE(1600000, 100000, 0x00, 0x03, 0x20),
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};
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static struct bd71837_vrange ldo2_vranges[] = {
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BD_RANGE(900000, 0, 0, 0, 0),
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BD_RANGE(800000, 0, 1, 1, 0),
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};
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static struct bd71837_vrange ldo3_vranges[] = {
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BD_RANGE(1800000, 100000, 0x00, 0x0f, 0),
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};
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static struct bd71837_vrange ldo4_vranges[] = {
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BD_RANGE(900000, 100000, 0x00, 0x09, 0),
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};
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static struct bd71837_vrange bd71837_ldo5_vranges[] = {
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BD_RANGE(1800000, 100000, 0x00, 0x0f, 0),
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};
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static struct bd71837_vrange bd71847_ldo5_vranges[] = {
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BD_RANGE(1800000, 100000, 0x00, 0x0f, 0),
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BD_RANGE(800000, 100000, 0x00, 0x0f, 0x20),
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};
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static struct bd71837_vrange ldo6_vranges[] = {
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BD_RANGE(900000, 100000, 0x00, 0x09, 0),
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};
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static struct bd71837_vrange ldo7_vranges[] = {
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BD_RANGE(1800000, 100000, 0x00, 0x0f, 0),
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};
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/*
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* We use enable mask 'HW_STATE_CONTROL' to indicate that this regulator
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* must not be enabled or disabled by SW. The typical use-case for BD71837
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* is powering NXP i.MX8. In this use-case we (for now) only allow control
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* for BUCK3 and BUCK4 which are not boot critical.
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*/
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static struct bd71837_platdata bd71837_reg_data[] = {
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/* Bucks 1-4 which support dynamic voltage scaling */
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BD_DATA("BUCK1", BD718XX_BUCK1_CTRL, HW_STATE_CONTROL,
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BD718XX_BUCK1_VOLT_RUN, DVS_BUCK_RUN_MASK, dvs_buck_vranges, 0,
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true, BD718XX_BUCK_SEL),
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BD_DATA("BUCK2", BD718XX_BUCK2_CTRL, HW_STATE_CONTROL,
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BD718XX_BUCK2_VOLT_RUN, DVS_BUCK_RUN_MASK, dvs_buck_vranges, 0,
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true, BD718XX_BUCK_SEL),
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BD_DATA("BUCK3", BD71837_BUCK3_CTRL, BD718XX_BUCK_EN,
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BD71837_BUCK3_VOLT_RUN, DVS_BUCK_RUN_MASK, dvs_buck_vranges, 0,
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true, BD718XX_BUCK_SEL),
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BD_DATA("BUCK4", BD71837_BUCK4_CTRL, BD718XX_BUCK_EN,
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BD71837_BUCK4_VOLT_RUN, DVS_BUCK_RUN_MASK, dvs_buck_vranges, 0,
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true, BD718XX_BUCK_SEL),
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/* Bucks 5-8 which do not support dynamic voltage scaling */
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BD_DATA("BUCK5", BD718XX_1ST_NODVS_BUCK_CTRL, HW_STATE_CONTROL,
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BD718XX_1ST_NODVS_BUCK_VOLT, BD718XX_1ST_NODVS_BUCK_MASK,
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bd71837_buck5_vranges, 0x80, false, BD718XX_BUCK_SEL),
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BD_DATA("BUCK6", BD718XX_2ND_NODVS_BUCK_CTRL, HW_STATE_CONTROL,
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BD718XX_2ND_NODVS_BUCK_VOLT, BD71837_BUCK6_MASK,
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bd71837_buck6_vranges, 0, false, BD718XX_BUCK_SEL),
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BD_DATA("BUCK7", BD718XX_3RD_NODVS_BUCK_CTRL, HW_STATE_CONTROL,
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BD718XX_3RD_NODVS_BUCK_VOLT, BD718XX_3RD_NODVS_BUCK_MASK,
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nodvs_buck3_vranges, 0, false, BD718XX_BUCK_SEL),
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BD_DATA("BUCK8", BD718XX_4TH_NODVS_BUCK_CTRL, HW_STATE_CONTROL,
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BD718XX_4TH_NODVS_BUCK_VOLT, BD718XX_4TH_NODVS_BUCK_MASK,
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nodvs_buck4_vranges, 0, false, BD718XX_BUCK_SEL),
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/* LDOs */
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BD_DATA("LDO1", BD718XX_LDO1_VOLT, HW_STATE_CONTROL, BD718XX_LDO1_VOLT,
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BD718XX_LDO1_MASK, ldo1_vranges, 0x20, false, BD718XX_LDO_SEL),
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BD_DATA("LDO2", BD718XX_LDO2_VOLT, HW_STATE_CONTROL, BD718XX_LDO2_VOLT,
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BD718XX_LDO2_MASK, ldo2_vranges, 0, false, BD718XX_LDO_SEL),
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BD_DATA("LDO3", BD718XX_LDO3_VOLT, HW_STATE_CONTROL, BD718XX_LDO3_VOLT,
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BD718XX_LDO3_MASK, ldo3_vranges, 0, false, BD718XX_LDO_SEL),
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BD_DATA("LDO4", BD718XX_LDO4_VOLT, HW_STATE_CONTROL, BD718XX_LDO4_VOLT,
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BD718XX_LDO4_MASK, ldo4_vranges, 0, false, BD718XX_LDO_SEL),
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BD_DATA("LDO5", BD718XX_LDO5_VOLT, HW_STATE_CONTROL, BD718XX_LDO5_VOLT,
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BD71837_LDO5_MASK, bd71837_ldo5_vranges, 0, false,
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BD718XX_LDO_SEL),
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BD_DATA("LDO6", BD718XX_LDO6_VOLT, HW_STATE_CONTROL, BD718XX_LDO6_VOLT,
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BD718XX_LDO6_MASK, ldo6_vranges, 0, false, BD718XX_LDO_SEL),
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BD_DATA("LDO7", BD71837_LDO7_VOLT, HW_STATE_CONTROL, BD71837_LDO7_VOLT,
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BD71837_LDO7_MASK, ldo7_vranges, 0, false, BD718XX_LDO_SEL),
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};
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static struct bd71837_platdata bd71847_reg_data[] = {
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/* Bucks 1 and 2 which support dynamic voltage scaling */
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BD_DATA("BUCK1", BD718XX_BUCK1_CTRL, HW_STATE_CONTROL,
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BD718XX_BUCK1_VOLT_RUN, DVS_BUCK_RUN_MASK, dvs_buck_vranges, 0,
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true, BD718XX_BUCK_SEL),
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BD_DATA("BUCK2", BD718XX_BUCK2_CTRL, HW_STATE_CONTROL,
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BD718XX_BUCK2_VOLT_RUN, DVS_BUCK_RUN_MASK, dvs_buck_vranges, 0,
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true, BD718XX_BUCK_SEL),
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/* Bucks 3-6 which do not support dynamic voltage scaling */
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BD_DATA("BUCK3", BD718XX_1ST_NODVS_BUCK_CTRL, HW_STATE_CONTROL,
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BD718XX_1ST_NODVS_BUCK_VOLT, BD718XX_1ST_NODVS_BUCK_MASK,
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bd71847_buck3_vranges, 0xc0, false, BD718XX_BUCK_SEL),
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BD_DATA("BUCK4", BD718XX_2ND_NODVS_BUCK_CTRL, HW_STATE_CONTROL,
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BD718XX_2ND_NODVS_BUCK_VOLT, BD71837_BUCK6_MASK,
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bd71847_buck4_vranges, 0x40, false, BD718XX_BUCK_SEL),
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BD_DATA("BUCK5", BD718XX_3RD_NODVS_BUCK_CTRL, HW_STATE_CONTROL,
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BD718XX_3RD_NODVS_BUCK_VOLT, BD718XX_3RD_NODVS_BUCK_MASK,
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nodvs_buck3_vranges, 0, false, BD718XX_BUCK_SEL),
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BD_DATA("BUCK6", BD718XX_4TH_NODVS_BUCK_CTRL, HW_STATE_CONTROL,
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BD718XX_4TH_NODVS_BUCK_VOLT, BD718XX_4TH_NODVS_BUCK_MASK,
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nodvs_buck4_vranges, 0, false, BD718XX_BUCK_SEL),
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/* LDOs */
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BD_DATA("LDO1", BD718XX_LDO1_VOLT, HW_STATE_CONTROL, BD718XX_LDO1_VOLT,
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BD718XX_LDO1_MASK, ldo1_vranges, 0x20, false, BD718XX_LDO_SEL),
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BD_DATA("LDO2", BD718XX_LDO2_VOLT, HW_STATE_CONTROL, BD718XX_LDO2_VOLT,
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BD718XX_LDO2_MASK, ldo2_vranges, 0, false, BD718XX_LDO_SEL),
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BD_DATA("LDO3", BD718XX_LDO3_VOLT, HW_STATE_CONTROL, BD718XX_LDO3_VOLT,
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BD718XX_LDO3_MASK, ldo3_vranges, 0, false, BD718XX_LDO_SEL),
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BD_DATA("LDO4", BD718XX_LDO4_VOLT, HW_STATE_CONTROL, BD718XX_LDO4_VOLT,
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BD718XX_LDO4_MASK, ldo4_vranges, 0, false, BD718XX_LDO_SEL),
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BD_DATA("LDO5", BD718XX_LDO5_VOLT, HW_STATE_CONTROL, BD718XX_LDO5_VOLT,
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BD71847_LDO5_MASK, bd71847_ldo5_vranges, 0x20, false,
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BD718XX_LDO_SEL),
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BD_DATA("LDO6", BD718XX_LDO6_VOLT, HW_STATE_CONTROL, BD718XX_LDO6_VOLT,
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BD718XX_LDO6_MASK, ldo6_vranges, 0, false, BD718XX_LDO_SEL),
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};
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static int vrange_find_value(struct bd71837_vrange *r, unsigned int sel,
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unsigned int *val)
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{
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if (!val || sel < r->min_sel || sel > r->max_sel)
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return -EINVAL;
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*val = r->min_volt + r->step * (sel - r->min_sel);
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return 0;
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}
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static int vrange_find_selector(struct bd71837_vrange *r, int val,
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unsigned int *sel)
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{
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int ret = -EINVAL;
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int num_vals = r->max_sel - r->min_sel + 1;
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if (val >= r->min_volt &&
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val <= r->min_volt + r->step * (num_vals - 1)) {
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if (r->step) {
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*sel = r->min_sel + ((val - r->min_volt) / r->step);
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ret = 0;
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} else {
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*sel = r->min_sel;
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ret = 0;
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}
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}
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return ret;
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}
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static int bd71837_get_enable(struct udevice *dev)
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{
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int val;
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struct bd71837_platdata *plat = dev_get_platdata(dev);
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/*
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* boot critical regulators on bd71837 must not be controlled by sw
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* due to the 'feature' which leaves power rails down if bd71837 is
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* reseted to snvs state. hence we can't get the state here.
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*
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* if we are alive it means we probably are on run state and
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* if the regulator can't be controlled we can assume it is
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* enabled.
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*/
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if (plat->enablemask == HW_STATE_CONTROL)
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return 1;
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val = pmic_reg_read(dev->parent, plat->enable_reg);
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if (val < 0)
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return val;
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return (val & plat->enablemask);
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}
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static int bd71837_set_enable(struct udevice *dev, bool enable)
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{
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int val = 0;
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struct bd71837_platdata *plat = dev_get_platdata(dev);
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/*
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* boot critical regulators on bd71837 must not be controlled by sw
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* due to the 'feature' which leaves power rails down if bd71837 is
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* reseted to snvs state. Hence we can't set the state here.
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*/
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if (plat->enablemask == HW_STATE_CONTROL)
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return -EINVAL;
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if (enable)
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val = plat->enablemask;
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return pmic_clrsetbits(dev->parent, plat->enable_reg, plat->enablemask,
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val);
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}
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static int bd71837_set_value(struct udevice *dev, int uvolt)
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{
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unsigned int sel;
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unsigned int range;
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int i;
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int found = 0;
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struct bd71837_platdata *plat = dev_get_platdata(dev);
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/*
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* An under/overshooting may occur if voltage is changed for other
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* regulators but buck 1,2,3 or 4 when regulator is enabled. Prevent
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* change to protect the HW
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*/
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if (!plat->dvs)
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if (bd71837_get_enable(dev)) {
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pr_err("Only DVS bucks can be changed when enabled\n");
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return -EINVAL;
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}
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for (i = 0; i < plat->numranges; i++) {
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struct bd71837_vrange *r = &plat->ranges[i];
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found = !vrange_find_selector(r, uvolt, &sel);
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if (found) {
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unsigned int tmp;
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/*
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* We require exactly the requested value to be
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* supported - this can be changed later if needed
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*/
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range = r->rangeval;
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found = !vrange_find_value(r, sel, &tmp);
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if (found && tmp == uvolt)
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break;
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found = 0;
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}
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}
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if (!found)
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return -EINVAL;
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sel <<= ffs(plat->volt_mask) - 1;
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if (plat->rangemask)
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sel |= range;
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return pmic_clrsetbits(dev->parent, plat->volt_reg, plat->volt_mask |
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plat->rangemask, sel);
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}
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static int bd71837_get_value(struct udevice *dev)
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{
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unsigned int reg, range;
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unsigned int tmp;
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struct bd71837_platdata *plat = dev_get_platdata(dev);
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int i;
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reg = pmic_reg_read(dev->parent, plat->volt_reg);
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if (((int)reg) < 0)
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return reg;
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range = reg & plat->rangemask;
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reg &= plat->volt_mask;
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reg >>= ffs(plat->volt_mask) - 1;
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for (i = 0; i < plat->numranges; i++) {
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struct bd71837_vrange *r = &plat->ranges[i];
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if (plat->rangemask && ((plat->rangemask & range) !=
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r->rangeval))
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continue;
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if (!vrange_find_value(r, reg, &tmp))
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return tmp;
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}
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pr_err("Unknown voltage value read from pmic\n");
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return -EINVAL;
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}
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static int bd71837_regulator_probe(struct udevice *dev)
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{
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struct bd71837_platdata *plat = dev_get_platdata(dev);
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int i, ret;
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struct dm_regulator_uclass_platdata *uc_pdata;
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int type;
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struct bd71837_platdata *init_data;
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int data_amnt;
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type = dev_get_driver_data(dev_get_parent(dev));
|
|
|
|
switch (type) {
|
|
case ROHM_CHIP_TYPE_BD71837:
|
|
init_data = bd71837_reg_data;
|
|
data_amnt = ARRAY_SIZE(bd71837_reg_data);
|
|
break;
|
|
case ROHM_CHIP_TYPE_BD71847:
|
|
init_data = bd71847_reg_data;
|
|
data_amnt = ARRAY_SIZE(bd71847_reg_data);
|
|
break;
|
|
default:
|
|
debug("Unknown PMIC type\n");
|
|
init_data = NULL;
|
|
data_amnt = 0;
|
|
break;
|
|
}
|
|
|
|
for (i = 0; i < data_amnt; i++) {
|
|
if (!strcmp(dev->name, init_data[i].name)) {
|
|
*plat = init_data[i];
|
|
if (plat->enablemask != HW_STATE_CONTROL) {
|
|
/*
|
|
* Take the regulator under SW control. Ensure
|
|
* the initial state matches dt flags and then
|
|
* write the SEL bit
|
|
*/
|
|
uc_pdata = dev_get_uclass_platdata(dev);
|
|
ret = bd71837_set_enable(dev,
|
|
!!(uc_pdata->boot_on ||
|
|
uc_pdata->always_on));
|
|
if (ret)
|
|
return ret;
|
|
|
|
return pmic_clrsetbits(dev->parent,
|
|
plat->enable_reg,
|
|
plat->sel_mask,
|
|
plat->sel_mask);
|
|
}
|
|
return 0;
|
|
}
|
|
}
|
|
|
|
pr_err("Unknown regulator '%s'\n", dev->name);
|
|
|
|
return -ENOENT;
|
|
}
|
|
|
|
static const struct dm_regulator_ops bd71837_regulator_ops = {
|
|
.get_value = bd71837_get_value,
|
|
.set_value = bd71837_set_value,
|
|
.get_enable = bd71837_get_enable,
|
|
.set_enable = bd71837_set_enable,
|
|
};
|
|
|
|
U_BOOT_DRIVER(bd71837_regulator) = {
|
|
.name = BD718XX_REGULATOR_DRIVER,
|
|
.id = UCLASS_REGULATOR,
|
|
.ops = &bd71837_regulator_ops,
|
|
.probe = bd71837_regulator_probe,
|
|
.platdata_auto_alloc_size = sizeof(struct bd71837_platdata),
|
|
};
|