96 lines
3.2 KiB
C
96 lines
3.2 KiB
C
/*
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* da9063.c
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*
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* Dialog DA9063 PMIC
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*
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* Copyright (C) 2018-2019 NetModule AG - http://www.netmodule.com/
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef DA9063_H
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#define DA9063_H
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#define CONFIG_PMIC_I2C_BUS 0
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#define CONFIG_PMIC_I2C_ADDR 0x58 /* Pages 0 and 1, Pages 2 and 3 -> 0x59 */
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#define PMIC_REG_STATUS_A 0x01 /* Status of ON_KEY, WAKE, COMP1V2, DVC */
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#define PMIC_REG_STATUS_A_COMP1V2_MASK 0x08
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#define PMIC_REG_FAULT_LOG 0x05 /* PMIC fault log register, holding reset reason */
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#define PMIC_FAULT_TWD_ERROR_MASK 0x01 /* Watchdog timeout detected */
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#define PMIC_FAULT_POR_MASK 0x02 /* Startup from No-Power/RTC/Delivery mode */
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#define PMIC_REG_EVENT_A 0x06
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#define PMIC_REG_EVENT_RTC_ALARM_MASK 0x02
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#define PMIC_REG_EVENT_RTC_TICK_MASK 0x04
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#define PMIC_REG_EVENT_EVENTS_B_MASK 0x20
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#define PMIC_REG_EVENT_B 0x07
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#define PMIC_REG_EVENT_COMP1V2_MASK 0x04
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#define PMIC_REG_CONTROL_A 0x0E /* Control register for power states */
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#define PMIC_REG_CONTROL_D 0x11 /* Control register for blink/watchdog */
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#define PMIC_REG_GPIO14_15 0x1C /* Configuration of GPIO14/15 (mode, wake) */
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#define PMIC_REG_GPIO_MODE0_7 0x1D /* Control register for GPIOs 0..7 */
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#define PMIC_REG_GPIO_MODE8_15 0x1E /* Control register for GPIOs 8..15 */
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#define PMIC_REG_BCORE1_CONT 0x21 /* Control register of BCORE1 */
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#define PMIC_REG_BCORE2_CONT 0x20 /* Control register of BCORE2 */
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#define PMIC_REG_BPERI_CONT 0x25 /* Control register of BPERI */
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#define PMIC_REG_BIO_CONT 0x24 /* Control register of BIO */
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#define PMIC_REG_BMEM_CONT 0x23 /* Control register of BMEM */
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#define PMIC_REG_LDO3_CONT 0x28 /* Control register of LDO3 */
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#define PMIC_REG_LDO6_CONT 0x2B /* Control register of LDO6 */
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#define PMIC_REG_LDO7_CONT 0x2C /* Control register of LDO7 */
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#define PMIC_REG_LDO11_CONT 0x30 /* Control register of LDO11 */
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#define PMIC_LDOx_EN_MASK 0x01
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#define PMIC_LDOx_CONF_MASK 0x80
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#define PMIC_REG_ID_4_3 0x84
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#define PMIC_REG_BUCK_ILIM_A 0x9A
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#define PMIC_REG_BUCK_ILIM_B 0x9B
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#define PMIC_REG_BUCK_ILIM_C 0x9C
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#define PMIC_REG_BCORE1_CONF 0x9E /* Configuration register of BCORE1 */
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#define PMIC_REG_BCORE2_CONF 0x9D /* Configuration register of BCORE2 */
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#define PMIC_REG_BPERI_CONF 0xA2 /* Configuration register of BPERI */
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#define PMIC_REG_BIO_CONF 0xA0 /* Configuration register of BIO */
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#define PMIC_REG_BMEM_CONF 0xA1 /* Configuration register of BMEM */
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#define PMIC_CONF_MODE_MASK 0xC0
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#define PMIC_CONF_MODE_SLEEP 0x40
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#define PMIC_CONF_MODE_SYNC 0x80
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#define PMIC_CONF_MODE_AUTO 0xC0
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#define PMIC_REG_BBAT_CONT 0xC5 /* Control register for backup battery */
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#define PMIC_REG_CONFIG_E 0x10A
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#define PMIC_REG_CONFIG_G 0x10C
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#define PMIC_REG_CONFIG_L 0x111
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#define PMIC_REG_TRIM_CLDR 0x120 /* Calendar Trim register, 2's complement, 1.9ppm per bit */
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#define PMIC_GP_ID_0 0x121 /* General purpose ID 0 (R/W) */
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#define PMIC_REG_CONFIG_ID 0x184 /* OTP Config ID <ver.rev> */
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extern void da9063_init(int i2c_bus);
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extern int da9063_claim_i2c_bus(void);
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extern void da9063_release_i2c_bus(int bus);
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extern int da9063_get_reg(uint32_t reg, uint8_t* val);
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extern int da9063_set_reg(uint32_t reg, uint8_t val);
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extern void da9063_set_gpio(unsigned bit, int state);
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#endif /* DA9063_H */
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