286 lines
7.6 KiB
C
286 lines
7.6 KiB
C
/*
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* IO header file
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*
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* Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
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* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __ASM_M68K_IO_H__
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#define __ASM_M68K_IO_H__
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#include <asm/byteorder.h>
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#ifndef _IO_BASE
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#define _IO_BASE 0
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#endif
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#define __raw_readb(addr) (*(volatile u8 *)(addr))
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#define __raw_readw(addr) (*(volatile u16 *)(addr))
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#define __raw_readl(addr) (*(volatile u32 *)(addr))
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#define __raw_writeb(b,addr) ((*(volatile u8 *) (addr)) = (b))
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#define __raw_writew(w,addr) ((*(volatile u16 *) (addr)) = (w))
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#define __raw_writel(l,addr) ((*(volatile u32 *) (addr)) = (l))
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#define readb(addr) in_8((volatile u8 *)(addr))
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#define writeb(b,addr) out_8((volatile u8 *)(addr), (b))
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#if !defined(__BIG_ENDIAN)
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#define readw(addr) (*(volatile u16 *) (addr))
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#define readl(addr) (*(volatile u32 *) (addr))
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#define writew(b,addr) ((*(volatile u16 *) (addr)) = (b))
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#define writel(b,addr) ((*(volatile u32 *) (addr)) = (b))
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#else
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#define readw(addr) in_be16((volatile u16 *)(addr))
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#define readl(addr) in_be32((volatile u32 *)(addr))
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#define writew(b,addr) out_be16((volatile u16 *)(addr),(b))
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#define writel(b,addr) out_be32((volatile u32 *)(addr),(b))
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#endif
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/*
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* The insw/outsw/insl/outsl macros don't do byte-swapping.
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* They are only used in practice for transferring buffers which
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* are arrays of bytes, and byte-swapping is not appropriate in
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* that case. - paulus
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*/
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#define insb(port, buf, ns) _insb((u8 *)((port)+_IO_BASE), (buf), (ns))
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#define outsb(port, buf, ns) _outsb((u8 *)((port)+_IO_BASE), (buf), (ns))
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#define insw(port, buf, ns) _insw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
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#define outsw(port, buf, ns) _outsw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
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#define insl(port, buf, nl) _insl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
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#define outsl(port, buf, nl) _outsl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
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#define inb(port) in_8((u8 *)((port)+_IO_BASE))
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#define outb(val, port) out_8((u8 *)((port)+_IO_BASE), (val))
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#if !defined(__BIG_ENDIAN)
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#define inw(port) in_be16((u16 *)((port)+_IO_BASE))
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#define outw(val, port) out_be16((u16 *)((port)+_IO_BASE), (val))
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#define inl(port) in_be32((u32 *)((port)+_IO_BASE))
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#define outl(val, port) out_be32((u32 *)((port)+_IO_BASE), (val))
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#else
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#define inw(port) in_le16((u16 *)((port)+_IO_BASE))
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#define outw(val, port) out_le16((u16 *)((port)+_IO_BASE), (val))
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#define inl(port) in_le32((u32 *)((port)+_IO_BASE))
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#define outl(val, port) out_le32((u32 *)((port)+_IO_BASE), (val))
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#endif
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#define mb() __asm__ __volatile__ ("" : : : "memory")
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extern inline void _insb(volatile u8 * port, void *buf, int ns)
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{
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u8 *data = (u8 *) buf;
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while (ns--)
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*data++ = *port;
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}
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extern inline void _outsb(volatile u8 * port, const void *buf, int ns)
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{
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u8 *data = (u8 *) buf;
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while (ns--)
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*port = *data++;
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}
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extern inline void _insw(volatile u16 * port, void *buf, int ns)
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{
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u16 *data = (u16 *) buf;
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while (ns--)
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*data++ = __sw16(*port);
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}
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extern inline void _outsw(volatile u16 * port, const void *buf, int ns)
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{
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u16 *data = (u16 *) buf;
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while (ns--) {
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*port = __sw16(*data);
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data++;
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}
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}
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extern inline void _insl(volatile u32 * port, void *buf, int nl)
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{
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u32 *data = (u32 *) buf;
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while (nl--)
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*data++ = __sw32(*port);
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}
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extern inline void _outsl(volatile u32 * port, const void *buf, int nl)
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{
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u32 *data = (u32 *) buf;
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while (nl--) {
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*port = __sw32(*data);
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data++;
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}
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}
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extern inline void _insw_ns(volatile u16 * port, void *buf, int ns)
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{
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u16 *data = (u16 *) buf;
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while (ns--)
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*data++ = *port;
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}
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extern inline void _outsw_ns(volatile u16 * port, const void *buf, int ns)
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{
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u16 *data = (u16 *) buf;
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while (ns--) {
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*port = *data++;
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}
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}
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extern inline void _insl_ns(volatile u32 * port, void *buf, int nl)
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{
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u32 *data = (u32 *) buf;
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while (nl--)
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*data++ = *port;
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}
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extern inline void _outsl_ns(volatile u32 * port, const void *buf, int nl)
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{
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u32 *data = (u32 *) buf;
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while (nl--) {
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*port = *data;
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data++;
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}
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}
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/*
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* The *_ns versions below don't do byte-swapping.
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* Neither do the standard versions now, these are just here
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* for older code.
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*/
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#define insw_ns(port, buf, ns) _insw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
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#define outsw_ns(port, buf, ns) _outsw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
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#define insl_ns(port, buf, nl) _insl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
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#define outsl_ns(port, buf, nl) _outsl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
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#define IO_SPACE_LIMIT ~0
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/*
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* 8, 16 and 32 bit, big and little endian I/O operations, with barrier.
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*/
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extern inline int in_8(volatile u8 * addr)
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{
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return (int)*addr;
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}
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extern inline void out_8(volatile u8 * addr, int val)
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{
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*addr = (u8) val;
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}
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extern inline int in_le16(volatile u16 * addr)
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{
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return __sw16(*addr);
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}
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extern inline int in_be16(volatile u16 * addr)
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{
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return (*addr & 0xFFFF);
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}
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extern inline void out_le16(volatile u16 * addr, int val)
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{
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*addr = __sw16(val);
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}
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extern inline void out_be16(volatile u16 * addr, int val)
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{
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*addr = (u16) val;
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}
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extern inline unsigned in_le32(volatile u32 * addr)
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{
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return __sw32(*addr);
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}
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extern inline unsigned in_be32(volatile u32 * addr)
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{
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return (*addr);
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}
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extern inline void out_le32(volatile unsigned *addr, int val)
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{
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*addr = __sw32(val);
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}
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extern inline void out_be32(volatile unsigned *addr, int val)
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{
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*addr = val;
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}
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/* Clear and set bits in one shot. These macros can be used to clear and
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* set multiple bits in a register using a single call. These macros can
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* also be used to set a multiple-bit bit pattern using a mask, by
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* specifying the mask in the 'clear' parameter and the new bit pattern
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* in the 'set' parameter.
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*/
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#define clrbits(type, addr, clear) \
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out_##type((addr), in_##type(addr) & ~(clear))
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#define setbits(type, addr, set) \
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out_##type((addr), in_##type(addr) | (set))
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#define clrsetbits(type, addr, clear, set) \
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out_##type((addr), (in_##type(addr) & ~(clear)) | (set))
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#define clrbits_be32(addr, clear) clrbits(be32, addr, clear)
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#define setbits_be32(addr, set) setbits(be32, addr, set)
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#define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set)
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#define clrbits_le32(addr, clear) clrbits(le32, addr, clear)
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#define setbits_le32(addr, set) setbits(le32, addr, set)
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#define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)
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#define clrbits_be16(addr, clear) clrbits(be16, addr, clear)
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#define setbits_be16(addr, set) setbits(be16, addr, set)
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#define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)
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#define clrbits_le16(addr, clear) clrbits(le16, addr, clear)
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#define setbits_le16(addr, set) setbits(le16, addr, set)
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#define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)
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#define clrbits_8(addr, clear) clrbits(8, addr, clear)
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#define setbits_8(addr, set) setbits(8, addr, set)
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#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
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static inline void sync(void)
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{
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/* This sync function is for PowerPC or other architecture instruction
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* ColdFire does not have this instruction. Dummy function, added for
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* compatibility (CFI driver)
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*/
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}
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/*
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* Given a physical address and a length, return a virtual address
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* that can be used to access the memory range with the caching
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* properties specified by "flags".
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*/
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#define MAP_NOCACHE (0)
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#define MAP_WRCOMBINE (0)
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#define MAP_WRBACK (0)
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#define MAP_WRTHROUGH (0)
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static inline void *map_physmem(phys_addr_t paddr, unsigned long len,
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unsigned long flags)
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{
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return (void *)paddr;
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}
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/*
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* Take down a mapping set up by map_physmem().
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*/
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static inline void unmap_physmem(void *vaddr, unsigned long flags)
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{
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}
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static inline phys_addr_t virt_to_phys(void * vaddr)
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{
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return (phys_addr_t)(vaddr);
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}
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#endif /* __ASM_M68K_IO_H__ */
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