During DDR-2133 operation, the transmit data eye margins determined during the memory controller initialization may be sub-optimal, set DEBUG_29[12] and DEBUG_29[13:16] = 4'b0100 before MEM_EN is set. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
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| .. | ||
| clock.h | ||
| config.h | ||
| cpu.h | ||
| fdt.h | ||
| fsl_serdes.h | ||
| immap_lsch2.h | ||
| immap_lsch3.h | ||
| imx-regs.h | ||
| ls2080a_stream_id.h | ||
| mmu.h | ||
| mp.h | ||
| ns_access.h | ||
| soc.h | ||
| speed.h | ||