168 lines
		
	
	
		
			3.4 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			168 lines
		
	
	
		
			3.4 KiB
		
	
	
	
		
			C
		
	
	
	
/*
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 * Copyright (C) 2012-2015 Panasonic Corporation
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 * Copyright (C) 2015-2016 Socionext Inc.
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 *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
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 *
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 * SPDX-License-Identifier:	GPL-2.0+
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 */
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#include <common.h>
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#include <libfdt.h>
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#include <linux/io.h>
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#include "init.h"
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#include "micro-support-card.h"
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#include "sg-regs.h"
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#include "soc-info.h"
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DECLARE_GLOBAL_DATA_PTR;
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static void uniphier_setup_xirq(void)
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{
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	const void *fdt = gd->fdt_blob;
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	int soc_node, aidet_node;
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	const u32 *val;
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	unsigned long aidet_base;
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	u32 tmp;
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	soc_node = fdt_path_offset(fdt, "/soc");
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	if (soc_node < 0)
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		return;
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	aidet_node = fdt_subnode_offset_namelen(fdt, soc_node, "aidet", 5);
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	if (aidet_node < 0)
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		return;
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	val = fdt_getprop(fdt, aidet_node, "reg", NULL);
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	if (!val)
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		return;
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	aidet_base = fdt32_to_cpu(*val);
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	tmp = readl(aidet_base + 8);	/* AIDET DETCONFR2 */
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	tmp |= 0x00ff0000;		/* Set XIRQ0-7 low active */
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	writel(tmp, aidet_base + 8);
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	tmp = readl(0x55000090);	/* IRQCTL */
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	tmp |= 0x000000ff;
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	writel(tmp, 0x55000090);
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}
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static void uniphier_nand_pin_init(bool cs2)
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{
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#ifdef CONFIG_NAND_DENALI
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	if (uniphier_pin_init(cs2 ? "nand2cs_grp" : "nand_grp"))
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		pr_err("failed to init NAND pins\n");
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#endif
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}
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int board_init(void)
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{
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	const struct uniphier_board_data *bd;
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	led_puts("U0");
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	bd = uniphier_get_board_param();
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	if (!bd)
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		return -ENODEV;
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	switch (uniphier_get_soc_type()) {
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#if defined(CONFIG_ARCH_UNIPHIER_SLD3)
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	case SOC_UNIPHIER_SLD3:
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		uniphier_nand_pin_init(true);
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		led_puts("U1");
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		uniphier_sld3_pll_init();
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		uniphier_ld4_clk_init();
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		break;
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#endif
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#if defined(CONFIG_ARCH_UNIPHIER_LD4)
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	case SOC_UNIPHIER_LD4:
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		uniphier_nand_pin_init(true);
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		led_puts("U1");
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		uniphier_ld4_pll_init();
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		uniphier_ld4_clk_init();
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		break;
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#endif
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#if defined(CONFIG_ARCH_UNIPHIER_PRO4)
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	case SOC_UNIPHIER_PRO4:
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		uniphier_nand_pin_init(false);
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		led_puts("U1");
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		uniphier_pro4_pll_init();
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		uniphier_pro4_clk_init();
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		break;
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#endif
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#if defined(CONFIG_ARCH_UNIPHIER_SLD8)
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	case SOC_UNIPHIER_SLD8:
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		uniphier_nand_pin_init(true);
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		led_puts("U1");
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		uniphier_ld4_pll_init();
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		uniphier_ld4_clk_init();
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		break;
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#endif
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#if defined(CONFIG_ARCH_UNIPHIER_PRO5)
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	case SOC_UNIPHIER_PRO5:
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		uniphier_nand_pin_init(true);
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		led_puts("U1");
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		uniphier_pro5_clk_init();
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		break;
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#endif
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#if defined(CONFIG_ARCH_UNIPHIER_PXS2)
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	case SOC_UNIPHIER_PXS2:
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		uniphier_nand_pin_init(true);
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		led_puts("U1");
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		uniphier_pxs2_clk_init();
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		break;
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#endif
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#if defined(CONFIG_ARCH_UNIPHIER_LD6B)
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	case SOC_UNIPHIER_LD6B:
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		uniphier_nand_pin_init(true);
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		led_puts("U1");
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		uniphier_pxs2_clk_init();
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		break;
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#endif
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#if defined(CONFIG_ARCH_UNIPHIER_LD11)
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	case SOC_UNIPHIER_LD11:
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		uniphier_nand_pin_init(false);
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		sg_set_pinsel(149, 14, 8, 4);	/* XIRQ0    -> XIRQ0 */
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		sg_set_iectrl(149);
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		sg_set_pinsel(153, 14, 8, 4);	/* XIRQ4    -> XIRQ4 */
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		sg_set_iectrl(153);
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		led_puts("U1");
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		uniphier_ld11_pll_init();
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		uniphier_ld11_clk_init();
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		break;
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#endif
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#if defined(CONFIG_ARCH_UNIPHIER_LD20)
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	case SOC_UNIPHIER_LD20:
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		uniphier_nand_pin_init(false);
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		sg_set_pinsel(149, 14, 8, 4);	/* XIRQ0    -> XIRQ0 */
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		sg_set_iectrl(149);
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		sg_set_pinsel(153, 14, 8, 4);	/* XIRQ4    -> XIRQ4 */
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		sg_set_iectrl(153);
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		led_puts("U1");
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		uniphier_ld20_pll_init(bd);
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		uniphier_ld20_clk_init();
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		cci500_init(2);
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		break;
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#endif
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	default:
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		break;
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	}
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	uniphier_setup_xirq();
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	led_puts("U2");
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	support_card_late_init();
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	led_puts("U3");
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#ifdef CONFIG_ARM64
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	uniphier_smp_kick_all_cpus();
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#endif
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	led_puts("Uboo");
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	return 0;
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}
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