95 lines
3.4 KiB
C
95 lines
3.4 KiB
C
/*
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* Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <spl.h>
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#include <linux/io.h>
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#include "../sg-regs.h"
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#include "../soc-info.h"
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#include "boot-device.h"
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static struct boot_device_info boot_device_table[] = {
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{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 4)"},
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{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 4)"},
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{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 5)"},
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{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 5)"},
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{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 256KB, Addr 5)"},
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{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 256KB, Addr 5)"},
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{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 512KB, Addr 5)"},
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{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 512KB, Addr 5)"},
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{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 4)"},
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{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128KB, Addr 4)"},
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{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 5)"},
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{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128KB, Addr 5)"},
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{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 256KB, Addr 5)"},
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{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 256KB, Addr 5)"},
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{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 512KB, Addr 5)"},
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{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 512KB, Addr 5)"},
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{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 4)"},
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{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 4)"},
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{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 5)"},
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{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 5)"},
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{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI Addr 4)"},
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{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI Addr 4)"},
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{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI Addr 5)"},
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{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI Addr 5)"},
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{BOOT_DEVICE_MMC1, "eMMC (Legacy, 4bit, 1.8V, Training Off)"},
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{BOOT_DEVICE_MMC1, "eMMC (Legacy, 4bit, 1.8V, Training On)"},
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{BOOT_DEVICE_MMC1, "eMMC (Legacy, 8bit, 1.8V, Training Off)"},
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{BOOT_DEVICE_MMC1, "eMMC (Legacy, 8bit, 1.8V, Training On)"},
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{BOOT_DEVICE_MMC1, "eMMC (High Speed SDR, 8bit, 1.8V, Training Off)"},
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{BOOT_DEVICE_MMC1, "eMMC (High Speed SDR, 8bit, 1.8V, Training On)"},
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{BOOT_DEVICE_MMC1, "eMMC (Legacy, 4bit, 1.8V, Training Off)"},
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{BOOT_DEVICE_NOR, "NOR (XECS1)"},
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};
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static int get_boot_mode_sel(void)
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{
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return (readl(SG_PINMON0) >> 1) & 0x1f;
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}
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u32 uniphier_ld20_boot_device(void)
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{
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int boot_mode;
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u32 usb_boot_mask;
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switch (uniphier_get_soc_type()) {
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#if defined(CONFIG_ARCH_UNIPHIER_LD11)
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case SOC_UNIPHIER_LD11:
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usb_boot_mask = 0x00000080;
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break;
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#endif
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#if defined(CONFIG_ARCH_UNIPHIER_LD20)
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case SOC_UNIPHIER_LD20:
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usb_boot_mask = 0x00000780;
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break;
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#endif
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default:
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BUG();
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}
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if (~readl(SG_PINMON0) & usb_boot_mask)
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return BOOT_DEVICE_USB;
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boot_mode = get_boot_mode_sel();
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return boot_device_table[boot_mode].type;
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}
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void uniphier_ld20_boot_mode_show(void)
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{
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int mode_sel, i;
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mode_sel = get_boot_mode_sel();
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puts("Boot Mode Pin:\n");
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for (i = 0; i < ARRAY_SIZE(boot_device_table); i++)
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printf(" %c %02x %s\n", i == mode_sel ? '*' : ' ', i,
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boot_device_table[i].info);
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}
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