401 lines
8.1 KiB
C
401 lines
8.1 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2000-2003
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*/
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/*
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* MPC8xx Internal Memory Map Functions
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*/
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#include <common.h>
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#include <command.h>
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#include <asm/immap_8xx.h>
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#include <asm/cpm_8xx.h>
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#include <asm/iopin_8xx.h>
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#include <asm/io.h>
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DECLARE_GLOBAL_DATA_PTR;
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static int do_siuinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
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immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
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sysconf8xx_t __iomem *sc = &immap->im_siu_conf;
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printf("SIUMCR= %08x SYPCR = %08x\n",
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in_be32(&sc->sc_siumcr), in_be32(&sc->sc_sypcr));
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printf("SWT = %08x\n", in_be32(&sc->sc_swt));
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printf("SIPEND= %08x SIMASK= %08x\n",
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in_be32(&sc->sc_sipend), in_be32(&sc->sc_simask));
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printf("SIEL = %08x SIVEC = %08x\n",
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in_be32(&sc->sc_siel), in_be32(&sc->sc_sivec));
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printf("TESR = %08x SDCR = %08x\n",
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in_be32(&sc->sc_tesr), in_be32(&sc->sc_sdcr));
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return 0;
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}
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static int do_memcinfo(cmd_tbl_t *cmdtp, int flag, int argc,
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char * const argv[])
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{
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immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
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memctl8xx_t __iomem *memctl = &immap->im_memctl;
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int nbanks = 8;
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uint __iomem *p = &memctl->memc_br0;
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int i;
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for (i = 0; i < nbanks; i++, p += 2)
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printf("BR%-2d = %08x OR%-2d = %08x\n",
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i, in_be32(p), i, in_be32(p + 1));
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printf("MAR = %08x", in_be32(&memctl->memc_mar));
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printf(" MCR = %08x\n", in_be32(&memctl->memc_mcr));
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printf("MAMR = %08x MBMR = %08x",
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in_be32(&memctl->memc_mamr), in_be32(&memctl->memc_mbmr));
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printf("\nMSTAT = %04x\n", in_be16(&memctl->memc_mstat));
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printf("MPTPR = %04x MDR = %08x\n",
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in_be16(&memctl->memc_mptpr), in_be32(&memctl->memc_mdr));
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return 0;
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}
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static int do_carinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
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immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
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car8xx_t __iomem *car = &immap->im_clkrst;
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printf("SCCR = %08x\n", in_be32(&car->car_sccr));
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printf("PLPRCR= %08x\n", in_be32(&car->car_plprcr));
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printf("RSR = %08x\n", in_be32(&car->car_rsr));
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return 0;
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}
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static int counter;
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static void header(void)
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{
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char *data = "\
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-------------------------------- --------------------------------\
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00000000001111111111222222222233 00000000001111111111222222222233\
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01234567890123456789012345678901 01234567890123456789012345678901\
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-------------------------------- --------------------------------\
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";
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int i;
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if (counter % 2)
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putc('\n');
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counter = 0;
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for (i = 0; i < 4; i++, data += 79)
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printf("%.79s\n", data);
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}
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static void binary(char *label, uint value, int nbits)
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{
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uint mask = 1 << (nbits - 1);
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int i, second = (counter++ % 2);
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if (second)
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putc(' ');
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puts(label);
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for (i = 32 + 1; i != nbits; i--)
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putc(' ');
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while (mask != 0) {
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if (value & mask)
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putc('1');
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else
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putc('0');
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mask >>= 1;
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}
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if (second)
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putc('\n');
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}
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#define PA_NBITS 16
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#define PA_NB_ODR 8
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#define PB_NBITS 18
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#define PB_NB_ODR 16
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#define PC_NBITS 12
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#define PD_NBITS 13
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static int do_iopinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
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immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
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iop8xx_t __iomem *iop = &immap->im_ioport;
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ushort __iomem *l, *r;
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uint __iomem *R;
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counter = 0;
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header();
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/*
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* Ports A & B
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*/
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l = &iop->iop_padir;
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R = &immap->im_cpm.cp_pbdir;
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binary("PA_DIR", in_be16(l++), PA_NBITS);
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binary("PB_DIR", in_be32(R++), PB_NBITS);
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binary("PA_PAR", in_be16(l++), PA_NBITS);
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binary("PB_PAR", in_be32(R++), PB_NBITS);
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binary("PA_ODR", in_be16(l++), PA_NB_ODR);
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binary("PB_ODR", in_be32(R++), PB_NB_ODR);
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binary("PA_DAT", in_be16(l++), PA_NBITS);
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binary("PB_DAT", in_be32(R++), PB_NBITS);
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header();
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/*
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* Ports C & D
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*/
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l = &iop->iop_pcdir;
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r = &iop->iop_pddir;
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binary("PC_DIR", in_be16(l++), PC_NBITS);
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binary("PD_DIR", in_be16(r++), PD_NBITS);
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binary("PC_PAR", in_be16(l++), PC_NBITS);
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binary("PD_PAR", in_be16(r++), PD_NBITS);
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binary("PC_SO ", in_be16(l++), PC_NBITS);
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binary(" ", 0, 0);
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r++;
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binary("PC_DAT", in_be16(l++), PC_NBITS);
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binary("PD_DAT", in_be16(r++), PD_NBITS);
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binary("PC_INT", in_be16(l++), PC_NBITS);
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header();
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return 0;
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}
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/*
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* set the io pins
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* this needs a clean up for smaller tighter code
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* use *uint and set the address based on cmd + port
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*/
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static int do_iopset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
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uint rcode = 0;
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iopin_t iopin;
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static uint port;
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static uint pin;
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static uint value;
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static enum {
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DIR,
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PAR,
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SOR,
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ODR,
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DAT,
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INT
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} cmd = DAT;
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if (argc != 5) {
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puts("iopset PORT PIN CMD VALUE\n");
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return 1;
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}
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port = argv[1][0] - 'A';
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if (port > 3)
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port -= 0x20;
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if (port > 3)
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rcode = 1;
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pin = simple_strtol(argv[2], NULL, 10);
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if (pin > 31)
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rcode = 1;
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switch (argv[3][0]) {
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case 'd':
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if (argv[3][1] == 'a')
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cmd = DAT;
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else if (argv[3][1] == 'i')
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cmd = DIR;
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else
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rcode = 1;
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break;
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case 'p':
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cmd = PAR;
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break;
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case 'o':
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cmd = ODR;
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break;
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case 's':
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cmd = SOR;
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break;
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case 'i':
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cmd = INT;
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break;
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default:
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printf("iopset: unknown command %s\n", argv[3]);
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rcode = 1;
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}
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if (argv[4][0] == '1')
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value = 1;
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else if (argv[4][0] == '0')
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value = 0;
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else
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rcode = 1;
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if (rcode == 0) {
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iopin.port = port;
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iopin.pin = pin;
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iopin.flag = 0;
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switch (cmd) {
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case DIR:
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if (value)
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iopin_set_out(&iopin);
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else
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iopin_set_in(&iopin);
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break;
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case PAR:
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if (value)
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iopin_set_ded(&iopin);
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else
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iopin_set_gen(&iopin);
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break;
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case SOR:
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if (value)
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iopin_set_opt2(&iopin);
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else
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iopin_set_opt1(&iopin);
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break;
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case ODR:
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if (value)
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iopin_set_odr(&iopin);
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else
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iopin_set_act(&iopin);
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break;
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case DAT:
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if (value)
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iopin_set_high(&iopin);
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else
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iopin_set_low(&iopin);
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break;
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case INT:
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if (value)
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iopin_set_falledge(&iopin);
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else
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iopin_set_anyedge(&iopin);
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break;
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}
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}
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return rcode;
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}
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static void prbrg(int n, uint val)
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{
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uint extc = (val >> 14) & 3;
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uint cd = (val & CPM_BRG_CD_MASK) >> 1;
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uint div16 = (val & CPM_BRG_DIV16) != 0;
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ulong clock = gd->cpu_clk;
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printf("BRG%d:", n);
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if (val & CPM_BRG_RST)
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puts(" RESET");
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else
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puts(" ");
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if (val & CPM_BRG_EN)
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puts(" ENABLED");
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else
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puts(" DISABLED");
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printf(" EXTC=%d", extc);
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if (val & CPM_BRG_ATB)
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puts(" ATB");
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else
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puts(" ");
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printf(" DIVIDER=%4d", cd);
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if (extc == 0 && cd != 0) {
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uint baudrate;
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if (div16)
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baudrate = (clock / 16) / (cd + 1);
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else
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baudrate = clock / (cd + 1);
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printf("=%6d bps", baudrate);
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} else {
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puts(" ");
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}
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if (val & CPM_BRG_DIV16)
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puts(" DIV16");
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else
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puts(" ");
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putc('\n');
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}
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static int do_brginfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
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immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
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cpm8xx_t __iomem *cp = &immap->im_cpm;
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uint __iomem *p = &cp->cp_brgc1;
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int i = 1;
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while (i <= 4)
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prbrg(i++, in_be32(p++));
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return 0;
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}
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#ifdef CONFIG_CMD_REGINFO
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void print_reginfo(void)
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{
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immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
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sit8xx_t __iomem *timers = &immap->im_sit;
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printf("\nSystem Configuration registers\n"
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"\tIMMR\t0x%08X\n", get_immr());
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do_siuinfo(NULL, 0, 0, NULL);
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printf("Memory Controller Registers\n");
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do_memcinfo(NULL, 0, 0, NULL);
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printf("\nSystem Integration Timers\n");
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printf("\tTBSCR\t0x%04X\tRTCSC\t0x%04X\n",
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in_be16(&timers->sit_tbscr), in_be16(&timers->sit_rtcsc));
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printf("\tPISCR\t0x%04X\n", in_be16(&timers->sit_piscr));
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}
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#endif
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/***************************************************/
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U_BOOT_CMD(
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siuinfo, 1, 1, do_siuinfo,
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"print System Interface Unit (SIU) registers",
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""
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);
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U_BOOT_CMD(
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memcinfo, 1, 1, do_memcinfo,
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"print Memory Controller registers",
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""
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);
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U_BOOT_CMD(
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carinfo, 1, 1, do_carinfo,
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"print Clocks and Reset registers",
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""
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);
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U_BOOT_CMD(
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iopinfo, 1, 1, do_iopinfo,
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"print I/O Port registers",
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""
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);
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U_BOOT_CMD(
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iopset, 5, 0, do_iopset,
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"set I/O Port registers",
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"PORT PIN CMD VALUE\nPORT: A-D, PIN: 0-31, CMD: [dat|dir|odr|sor], VALUE: 0|1"
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);
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U_BOOT_CMD(
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brginfo, 1, 1, do_brginfo,
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"print Baud Rate Generator (BRG) registers",
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""
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);
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