90 lines
1.9 KiB
C
90 lines
1.9 KiB
C
/*
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* (C) Copyright 2008
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* Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@gmail.com
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* This work has been supported by: QTechnology http://qtec.com/
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* Based on interrupts.c Wolfgang Denk-DENX Software Engineering-wd@denx.de
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <watchdog.h>
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#include <command.h>
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#include <asm/processor.h>
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#include <asm/interrupt.h>
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#include <asm/ppc4xx.h>
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#include <ppc_asm.tmpl>
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#include <commproc.h>
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#include <asm/io.h>
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#include <asm/xilinx_irq.h>
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DECLARE_GLOBAL_DATA_PTR;
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void pic_enable(void)
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{
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debug("Xilinx PIC at 0x%8x\n", intc);
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/*
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* Disable all external interrupts until they are
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* explicitly requested.
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*/
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out_be32((u32 *) IER, 0);
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/* Acknowledge any pending interrupts just in case. */
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out_be32((u32 *) IAR, 0xffffffff);
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/* Turn on the Master Enable. */
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out_be32((u32 *) MER, 0x3UL);
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return;
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}
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int xilinx_pic_irq_get(void)
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{
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u32 irq;
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irq = in_be32((u32 *) IVR);
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/* If no interrupt is pending then all bits of the IVR are set to 1. As
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* the IVR is as many bits wide as numbers of inputs are available.
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* Therefore, if all bits of the IVR are set to one, its content will
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* be bigger than XPAR_INTC_MAX_NUM_INTR_INPUTS.
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*/
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if (irq >= XPAR_INTC_MAX_NUM_INTR_INPUTS)
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irq = -1; /* report no pending interrupt. */
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debug("get_irq: %d\n", irq);
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return (irq);
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}
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void pic_irq_enable(unsigned int irq)
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{
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u32 mask = IRQ_MASK(irq);
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debug("enable: %d\n", irq);
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out_be32((u32 *) SIE, mask);
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}
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void pic_irq_disable(unsigned int irq)
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{
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u32 mask = IRQ_MASK(irq);
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debug("disable: %d\n", irq);
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out_be32((u32 *) CIE, mask);
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}
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void pic_irq_ack(unsigned int irq)
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{
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u32 mask = IRQ_MASK(irq);
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debug("ack: %d\n", irq);
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out_be32((u32 *) IAR, mask);
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}
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void external_interrupt(struct pt_regs *regs)
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{
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int irq;
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irq = xilinx_pic_irq_get();
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if (irq < 0)
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return;
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interrupt_run_handler(irq);
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return;
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}
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