201 lines
		
	
	
		
			5.7 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			201 lines
		
	
	
		
			5.7 KiB
		
	
	
	
		
			C
		
	
	
	
| /*
 | |
|  * (C) Copyright 2005
 | |
|  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 | |
|  *
 | |
|  * SPDX-License-Identifier:	GPL-2.0+
 | |
|  */
 | |
| 
 | |
| #ifndef __CONFIG_H
 | |
| #define __CONFIG_H
 | |
| 
 | |
| /*
 | |
|  * High Level Configuration Options
 | |
|  * (easy to change)
 | |
|  */
 | |
| 
 | |
| #define CONFIG_MPC5200		1	/* This is a MPC5200 CPU */
 | |
| #define CONFIG_CANMB		1	/* ... on canmb board - we need this for FEC.C */
 | |
| 
 | |
| /*
 | |
|  * allowed and functional CONFIG_SYS_TEXT_BASE values:
 | |
|  * 0xfe000000	low boot at 0x00000100 (default board setting)
 | |
|  * 0x00100000	RAM load and test
 | |
|  */
 | |
| #define	CONFIG_SYS_TEXT_BASE	0xFE000000
 | |
| 
 | |
| #define CONFIG_SYS_MPC5XXX_CLKIN	33000000 /* ... running at 33.000000MHz */
 | |
| 
 | |
| #define CONFIG_BOARD_EARLY_INIT_R
 | |
| 
 | |
| #define CONFIG_HIGH_BATS	1	/* High BATs supported */
 | |
| 
 | |
| /*
 | |
|  * Serial console configuration
 | |
|  */
 | |
| #define CONFIG_PSC_CONSOLE	1	/* console is on PSC1 */
 | |
| #define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200, 230400 }
 | |
| 
 | |
| /*
 | |
|  * BOOTP options
 | |
|  */
 | |
| #define CONFIG_BOOTP_BOOTFILESIZE
 | |
| #define CONFIG_BOOTP_BOOTPATH
 | |
| #define CONFIG_BOOTP_GATEWAY
 | |
| #define CONFIG_BOOTP_HOSTNAME
 | |
| 
 | |
| /*
 | |
|  * Command line configuration.
 | |
|  */
 | |
| #define CONFIG_CMD_IMMAP
 | |
| #define CONFIG_CMD_REGINFO
 | |
| 
 | |
| /*
 | |
|  * MUST be low boot - HIGHBOOT is not supported anymore
 | |
|  */
 | |
| #if (CONFIG_SYS_TEXT_BASE == 0xFE000000)		/* Boot low with 32 MB Flash */
 | |
| #   define CONFIG_SYS_LOWBOOT		1
 | |
| #   define CONFIG_SYS_LOWBOOT16	1
 | |
| #else
 | |
| #   error "CONFIG_SYS_TEXT_BASE must be 0xFE000000"
 | |
| #endif
 | |
| 
 | |
| /*
 | |
|  * Autobooting
 | |
|  */
 | |
| 
 | |
| #define CONFIG_PREBOOT	"echo;"	\
 | |
| 	"echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
 | |
| 	"echo"
 | |
| 
 | |
| #undef	CONFIG_BOOTARGS
 | |
| 
 | |
| #define	CONFIG_EXTRA_ENV_SETTINGS					\
 | |
| 	"netdev=eth0\0"							\
 | |
| 	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
 | |
| 		"nfsroot=${serverip}:${rootpath}\0"			\
 | |
| 	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
 | |
| 	"addip=setenv bootargs ${bootargs} "				\
 | |
| 		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
 | |
| 		":${hostname}:${netdev}:off panic=1\0"			\
 | |
| 	"flash_nfs=run nfsargs addip;"					\
 | |
| 		"bootm ${kernel_addr}\0"				\
 | |
| 	"flash_self=run ramargs addip;"					\
 | |
| 		"bootm ${kernel_addr} ${ramdisk_addr}\0"		\
 | |
| 	"net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0"	\
 | |
| 	"rootpath=/opt/eldk/ppc_6xx\0"					\
 | |
| 	"bootfile=/tftpboot/canmb/uImage\0"				\
 | |
| 	""
 | |
| 
 | |
| #define CONFIG_BOOTCOMMAND	"run flash_self"
 | |
| 
 | |
| /*
 | |
|  * IPB Bus clocking configuration.
 | |
|  */
 | |
| #undef CONFIG_SYS_IPBCLK_EQUALS_XLBCLK		/* define for 133MHz speed */
 | |
| 
 | |
| /*
 | |
|  * Flash configuration, expect one 16 Megabyte Bank at most
 | |
|  */
 | |
| #define CONFIG_SYS_FLASH_BASE		0xFE000000
 | |
| #define CONFIG_SYS_FLASH_SIZE		0x02000000
 | |
| #define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max num of memory banks      */
 | |
| #define CONFIG_SYS_MAX_FLASH_SECT	256	/* max num of sects on one chip */
 | |
| 
 | |
| #define CONFIG_SYS_FLASH_ERASE_TOUT	240000	/* Flash Erase Timeout (in ms)  */
 | |
| #define CONFIG_SYS_FLASH_WRITE_TOUT	500	/* Flash Write Timeout (in ms)  */
 | |
| 
 | |
| #define CONFIG_FLASH_CFI_DRIVER
 | |
| #define CONFIG_SYS_FLASH_CFI
 | |
| #define CONFIG_SYS_FLASH_EMPTY_INFO
 | |
| 
 | |
| /*
 | |
|  * Environment settings
 | |
|  */
 | |
| #define CONFIG_ENV_IS_IN_FLASH	1
 | |
| #define CONFIG_ENV_OFFSET		(2*128*1024)
 | |
| #define CONFIG_ENV_SIZE		0x2000
 | |
| #define CONFIG_ENV_SECT_SIZE       (128*1024)
 | |
| 
 | |
| /*
 | |
|  * Memory map
 | |
|  *
 | |
|  * Warning!!! with the current BestComm Task, MBAR MUST BE set to 0xf0000000
 | |
|  */
 | |
| #define CONFIG_SYS_MBAR			0xf0000000	/* DO NOT CHANGE this */
 | |
| #define CONFIG_SYS_SDRAM_BASE		0x00000000
 | |
| #define CONFIG_SYS_DEFAULT_MBAR	0x80000000
 | |
| 
 | |
| /* Use SRAM until RAM will be available */
 | |
| #define CONFIG_SYS_INIT_RAM_ADDR	MPC5XXX_SRAM
 | |
| #define CONFIG_SYS_INIT_RAM_SIZE	MPC5XXX_SRAM_SIZE	/* Size of used area in DPRAM */
 | |
| 
 | |
| #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 | |
| #define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
 | |
| 
 | |
| #define CONFIG_SYS_MONITOR_BASE    CONFIG_SYS_TEXT_BASE
 | |
| #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
 | |
| #   define CONFIG_SYS_RAMBOOT		1
 | |
| #endif
 | |
| 
 | |
| #define CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* Reserve 256 kB for Monitor	*/
 | |
| #define CONFIG_SYS_MALLOC_LEN		(128 << 10)	/* Reserve 128 kB for malloc()	*/
 | |
| #define CONFIG_SYS_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */
 | |
| 
 | |
| /*
 | |
|  * Ethernet configuration
 | |
|  */
 | |
| #define CONFIG_MPC5xxx_FEC	1
 | |
| #define CONFIG_MPC5xxx_FEC_MII100
 | |
| #define	CONFIG_PHY_ADDR		0x0
 | |
| /*
 | |
|  * GPIO configuration:
 | |
|  * PSC1,2,3 predefined as UART
 | |
|  * PCI disabled
 | |
|  * Ethernet 100 with MD
 | |
|  */
 | |
| #define CONFIG_SYS_GPS_PORT_CONFIG	0x00058444
 | |
| 
 | |
| /*
 | |
|  * Miscellaneous configurable options
 | |
|  */
 | |
| #define CONFIG_SYS_LONGHELP			/* undef to save memory	    */
 | |
| #if defined(CONFIG_CMD_KGDB)
 | |
| #  define CONFIG_SYS_CBSIZE		1024	/* Console I/O Buffer Size  */
 | |
| #else
 | |
| #  define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size  */
 | |
| #endif
 | |
| #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)	/* Print Buffer Size */
 | |
| #define CONFIG_SYS_MAXARGS		16		/* max number of command args	*/
 | |
| #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size	*/
 | |
| 
 | |
| #define CONFIG_SYS_MEMTEST_START	0x00100000	/* memtest works on */
 | |
| #define CONFIG_SYS_MEMTEST_END		0x01f00000	/* 1 ... 31 MB in DRAM	*/
 | |
| 
 | |
| #define CONFIG_SYS_LOAD_ADDR		0x200000	/* default load address */
 | |
| 
 | |
| #define CONFIG_RTC_MPC5200	1	/* use internal MPC5200 RTC */
 | |
| 
 | |
| #define CONFIG_SYS_CACHELINE_SIZE	32	/* For MPC5xxx CPUs */
 | |
| #if defined(CONFIG_CMD_KGDB)
 | |
| #  define CONFIG_SYS_CACHELINE_SHIFT	5	/* log base 2 of the above value */
 | |
| #endif
 | |
| 
 | |
| /*
 | |
|  * Various low-level settings
 | |
|  */
 | |
| #define CONFIG_SYS_HID0_INIT		HID0_ICE | HID0_ICFI
 | |
| #define CONFIG_SYS_HID0_FINAL		HID0_ICE
 | |
| 
 | |
| #define CONFIG_SYS_BOOTCS_START	CONFIG_SYS_FLASH_BASE
 | |
| #define CONFIG_SYS_BOOTCS_SIZE		CONFIG_SYS_FLASH_SIZE
 | |
| #define CONFIG_SYS_BOOTCS_CFG		0x00047D01
 | |
| #define CONFIG_SYS_CS0_START		CONFIG_SYS_FLASH_BASE
 | |
| #define CONFIG_SYS_CS0_SIZE		CONFIG_SYS_FLASH_SIZE
 | |
| 
 | |
| #define CONFIG_SYS_CS_BURST		0x00000000
 | |
| #define CONFIG_SYS_CS_DEADCYCLE	0x33333333
 | |
| 
 | |
| #define CONFIG_SYS_RESET_ADDRESS	0x7f000000
 | |
| 
 | |
| #endif /* __CONFIG_H */
 |