318 lines
8.3 KiB
C
318 lines
8.3 KiB
C
/*
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* Aries M53 configuration
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* Copyright (C) 2012-2013 Marek Vasut <marex@denx.de>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __M53EVK_CONFIG_H__
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#define __M53EVK_CONFIG_H__
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#define CONFIG_MXC_GPIO
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#include <asm/arch/imx-regs.h>
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#define CONFIG_REVISION_TAG
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#define CONFIG_SYS_FSL_CLK
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#define CONFIG_TIMESTAMP /* Print image info with timestamp */
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/*
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* U-Boot Commands
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*/
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#define CONFIG_FAT_WRITE
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#define CONFIG_CMD_NAND
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#define CONFIG_CMD_NAND_TRIMFFS
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#define CONFIG_CMD_SATA
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/*
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* Memory configurations
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*/
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#define CONFIG_NR_DRAM_BANKS 2
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#define PHYS_SDRAM_1 CSD0_BASE_ADDR
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#define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size)
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#define PHYS_SDRAM_2 CSD1_BASE_ADDR
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#define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size)
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#define PHYS_SDRAM_SIZE (gd->ram_size)
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#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
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#define CONFIG_SYS_MEMTEST_START 0x70000000
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#define CONFIG_SYS_MEMTEST_END 0x8ff00000
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#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
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#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
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#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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#define CONFIG_SYS_TEXT_BASE 0x71000000
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/*
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* U-Boot general configurations
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*/
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
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#define CONFIG_SYS_PBSIZE \
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(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
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/* Print buffer size */
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#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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/* Boot argument buffer size */
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#define CONFIG_AUTO_COMPLETE /* Command auto complete */
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#define CONFIG_CMDLINE_EDITING /* Command history etc */
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/*
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* Serial Driver
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*/
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#define CONFIG_MXC_UART
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#define CONFIG_MXC_UART_BASE UART2_BASE
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#define CONFIG_CONS_INDEX 1
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/*
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* MMC Driver
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*/
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#ifdef CONFIG_CMD_MMC
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#define CONFIG_FSL_ESDHC
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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#define CONFIG_SYS_FSL_ESDHC_NUM 1
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#endif
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/*
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* NAND
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*/
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#define CONFIG_ENV_SIZE (16 * 1024)
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#ifdef CONFIG_CMD_NAND
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI
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#define CONFIG_NAND_MXC
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#define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI
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#define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR
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#define CONFIG_SYS_NAND_LARGEPAGE
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#define CONFIG_MXC_NAND_HWECC
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#define CONFIG_SYS_NAND_USE_FLASH_BBT
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/* Environment is in NAND */
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#define CONFIG_ENV_IS_IN_NAND
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#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
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#define CONFIG_ENV_SECT_SIZE (128 * 1024)
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#define CONFIG_ENV_RANGE (4 * CONFIG_ENV_SECT_SIZE)
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#define CONFIG_ENV_OFFSET (8 * CONFIG_ENV_SECT_SIZE) /* 1 MiB */
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#define CONFIG_ENV_OFFSET_REDUND \
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(CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)
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#define CONFIG_CMD_UBIFS
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#define CONFIG_CMD_MTDPARTS
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#define CONFIG_RBTREE
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#define CONFIG_LZO
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#define CONFIG_MTD_DEVICE
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#define CONFIG_MTD_PARTITIONS
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#define MTDIDS_DEFAULT "nand0=mxc_nand"
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#define MTDPARTS_DEFAULT \
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"mtdparts=mxc_nand:" \
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"1024k(u-boot)," \
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"512k(env1)," \
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"512k(env2)," \
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"14m(boot)," \
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"240m(data)," \
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"-@2048k(UBI)"
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#else
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#define CONFIG_ENV_IS_NOWHERE
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#endif
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/*
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* Ethernet on SOC (FEC)
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*/
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#ifdef CONFIG_CMD_NET
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#define CONFIG_FEC_MXC
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#define IMX_FEC_BASE FEC_BASE_ADDR
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#define CONFIG_FEC_MXC_PHYADDR 0x0
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#define CONFIG_MII
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#define CONFIG_DISCOVER_PHY
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#define CONFIG_FEC_XCV_TYPE RMII
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#define CONFIG_PHYLIB
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#define CONFIG_PHY_MICREL
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#define CONFIG_ETHPRIME "FEC0"
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#endif
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/*
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* I2C
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*/
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#ifdef CONFIG_CMD_I2C
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
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#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
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#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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#define CONFIG_SYS_RTC_BUS_NUM 1 /* I2C2 */
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#endif
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/*
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* RTC
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*/
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#ifdef CONFIG_CMD_DATE
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#define CONFIG_RTC_M41T62
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#define CONFIG_SYS_I2C_RTC_ADDR 0x68
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#define CONFIG_SYS_M41T11_BASE_YEAR 2000
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#endif
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/*
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* USB
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*/
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#ifdef CONFIG_CMD_USB
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#define CONFIG_USB_EHCI_MX5
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#define CONFIG_USB_HOST_ETHER
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#define CONFIG_USB_ETHER_ASIX
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#define CONFIG_USB_ETHER_MCS7830
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#define CONFIG_USB_ETHER_SMSC95XX
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#define CONFIG_MXC_USB_PORT 1
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#define CONFIG_MXC_USB_FLAGS 0
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#endif
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/*
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* SATA
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*/
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#ifdef CONFIG_CMD_SATA
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#define CONFIG_DWC_AHSATA
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#define CONFIG_SYS_SATA_MAX_DEVICE 1
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#define CONFIG_DWC_AHSATA_PORT_ID 0
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#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR
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#define CONFIG_LBA48
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#define CONFIG_LIBATA
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#endif
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/*
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* LCD
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*/
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#ifdef CONFIG_VIDEO
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#define CONFIG_VIDEO_IPUV3
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#define CONFIG_VIDEO_BMP_RLE8
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#define CONFIG_VIDEO_BMP_GZIP
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#define CONFIG_SPLASH_SCREEN
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#define CONFIG_SPLASHIMAGE_GUARD
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#define CONFIG_SPLASH_SCREEN_ALIGN
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#define CONFIG_BMP_16BPP
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#define CONFIG_VIDEO_LOGO
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#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20)
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#define CONFIG_IPUV3_CLK 200000000
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#endif
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/*
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* Boot Linux
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*/
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#define CONFIG_CMDLINE_TAG
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#define CONFIG_INITRD_TAG
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#define CONFIG_REVISION_TAG
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_BOOTFILE "fitImage"
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#define CONFIG_BOOTARGS "console=ttymxc1,115200"
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#define CONFIG_LOADADDR 0x70800000
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#define CONFIG_BOOTCOMMAND "run mmc_mmc"
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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/*
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* NAND SPL
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*/
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#define CONFIG_SPL_FRAMEWORK
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#define CONFIG_SPL_TARGET "u-boot-with-nand-spl.imx"
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#define CONFIG_SPL_TEXT_BASE 0x70008000
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#define CONFIG_SPL_PAD_TO 0x8000
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#define CONFIG_SPL_STACK 0x70004000
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#define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO
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#define CONFIG_SYS_NAND_PAGE_SIZE 2048
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#define CONFIG_SYS_NAND_OOBSIZE 64
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#define CONFIG_SYS_NAND_PAGE_COUNT 64
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#define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024)
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#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
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/*
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* Extra Environments
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*/
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#define CONFIG_PREBOOT "run try_bootscript"
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#define CONFIG_HOSTNAME m53evk
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"consdev=ttymxc1\0" \
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"baudrate=115200\0" \
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"bootscript=boot.scr\0" \
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"bootdev=/dev/mmcblk0p1\0" \
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"rootdev=/dev/mmcblk0p2\0" \
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"netdev=eth0\0" \
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"rootpath=/opt/eldk-5.5/armv7a-hf/rootfs-qte-sdk\0" \
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"kernel_addr_r=0x72000000\0" \
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"addcons=" \
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"setenv bootargs ${bootargs} " \
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"console=${consdev},${baudrate}\0" \
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"addip=" \
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"setenv bootargs ${bootargs} " \
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"ip=${ipaddr}:${serverip}:${gatewayip}:" \
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"${netmask}:${hostname}:${netdev}:off\0" \
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"addmisc=" \
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"setenv bootargs ${bootargs} ${miscargs}\0" \
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"adddfltmtd=" \
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"if test \"x${mtdparts}\" == \"x\" ; then " \
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"mtdparts default ; " \
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"fi\0" \
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"addmtd=" \
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"run adddfltmtd ; " \
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"setenv bootargs ${bootargs} ${mtdparts}\0" \
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"addargs=run addcons addmtd addmisc\0" \
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"mmcload=" \
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"mmc rescan ; " \
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"load mmc 0:1 ${kernel_addr_r} ${bootfile}\0" \
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"ubiload=" \
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"ubi part UBI ; ubifsmount ubi0:rootfs ; " \
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"ubifsload ${kernel_addr_r} /boot/${bootfile}\0" \
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"netload=" \
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"tftp ${kernel_addr_r} ${hostname}/${bootfile}\0" \
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"miscargs=nohlt panic=1\0" \
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"mmcargs=setenv bootargs root=${rootdev} rw rootwait\0" \
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"ubiargs=" \
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"setenv bootargs ubi.mtd=5 " \
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"root=ubi0:rootfs rootfstype=ubifs\0" \
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"nfsargs=" \
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"setenv bootargs root=/dev/nfs rw " \
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"nfsroot=${serverip}:${rootpath},v3,tcp\0" \
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"mmc_mmc=" \
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"run mmcload mmcargs addargs ; " \
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"bootm ${kernel_addr_r}\0" \
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"mmc_ubi=" \
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"run mmcload ubiargs addargs ; " \
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"bootm ${kernel_addr_r}\0" \
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"mmc_nfs=" \
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"run mmcload nfsargs addip addargs ; " \
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"bootm ${kernel_addr_r}\0" \
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"ubi_mmc=" \
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"run ubiload mmcargs addargs ; " \
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"bootm ${kernel_addr_r}\0" \
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"ubi_ubi=" \
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"run ubiload ubiargs addargs ; " \
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"bootm ${kernel_addr_r}\0" \
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"ubi_nfs=" \
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"run ubiload nfsargs addip addargs ; " \
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"bootm ${kernel_addr_r}\0" \
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"net_mmc=" \
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"run netload mmcargs addargs ; " \
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"bootm ${kernel_addr_r}\0" \
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"net_ubi=" \
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"run netload ubiargs addargs ; " \
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"bootm ${kernel_addr_r}\0" \
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"net_nfs=" \
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"run netload nfsargs addip addargs ; " \
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"bootm ${kernel_addr_r}\0" \
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"try_bootscript=" \
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"mmc rescan;" \
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"if test -e mmc 0:1 ${bootscript} ; then " \
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"if load mmc 0:1 ${kernel_addr_r} ${bootscript};" \
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"then ; " \
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"echo Running bootscript... ; " \
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"source ${kernel_addr_r} ; " \
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"fi ; " \
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"fi\0"
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#endif /* __M53EVK_CONFIG_H__ */
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