188 lines
		
	
	
		
			6.1 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			188 lines
		
	
	
		
			6.1 KiB
		
	
	
	
		
			C
		
	
	
	
| /*
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|  * (C) Copyright 2007
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|  * Heiko Schocher, DENX Software Engineering, hs@denx.de.
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|  *
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|  * SPDX-License-Identifier:	GPL-2.0+
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|  */
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| 
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| #ifndef __CONFIG_H
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| #define __CONFIG_H
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| /*
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|  * High Level Configuration Options
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|  * (easy to change)
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|  */
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| #define CONFIG_MPC5200		1	/* This is an MPC5200 CPU */
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| #define CONFIG_MPC5200_DDR	1	/* (with DDR-SDRAM) */
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| #define CONFIG_MUNICES		1	/* ... on MUNICes board */
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| 
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| #ifndef CONFIG_SYS_TEXT_BASE
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| #define CONFIG_SYS_TEXT_BASE	0xFFF00000
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| #endif
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| 
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| #define CONFIG_SYS_MPC5XXX_CLKIN	33333333 /* ... running at 33.333333MHz */
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| #define CONFIG_SYS_CACHELINE_SIZE	32	/* For MPC5xxx CPUs */
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| #define CONFIG_HIGH_BATS	1	/* High BATs supported */
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| 
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| /*
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|  * Command line configuration.
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|  */
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| #define CONFIG_CMD_IMMAP
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| #define CONFIG_CMD_REGINFO
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| 
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| #if defined(CONFIG_CMD_KGDB)
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| #  define CONFIG_SYS_CACHELINE_SHIFT	5	/* log base 2 of the above value */
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| #endif
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| 
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| /*
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|  * Serial console configuration
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|  */
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| #define CONFIG_PSC_CONSOLE	1	/* console is on PSC1 */
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| #define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200, 230400 }
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| 
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| #define	CONFIG_TIMESTAMP	1	/* Print image info with timestamp */
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| #undef	CONFIG_BOOTARGS
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| 
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| #define CONFIG_PREBOOT	"echo;"	\
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| 	"echo Type \"run net_nfs\" to load Kernel over TFTP and to mount root filesystem over NFS;" \
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| 	"echo"
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| 
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| #define	CONFIG_EXTRA_ENV_SETTINGS					\
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| 	"netdev=eth0\0"							\
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| 	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
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| 		"nfsroot=$(serverip):$(rootpath)\0"			\
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| 	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
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| 	"addip=setenv bootargs $(bootargs) "				\
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| 		"ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)"	\
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| 		":$(hostname):$(netdev):off panic=5\0"			\
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| 	"flash_nfs=run nfsargs addip;"					\
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| 		"bootm $(kernel_addr)\0"				\
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| 	"flash_self=run ramargs addip;"					\
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| 		"bootm $(kernel_addr) $(ramdisk_addr)\0"		\
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| 	"net_nfs=tftp 200000 $(bootfile);run nfsargs addip;bootm\0"	\
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| 	"rootpath=/opt/eldk/ppc_6xx\0"					\
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| 	"bootfile=/tftpboot/munices/u-boot.bin\0"			\
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| 	"update=tftpboot 200000 ${bootfile};protect off fff00000 fff3ffff;" \
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| 	"erase fff00000 fff3ffff; cp.b 200000 FFF00000 ${filesize}\0"	\
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| 	""
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| #define CONFIG_BOOTCOMMAND	"run net_nfs"
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| 
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| /*
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|  * IPB Bus clocking configuration.
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|  */
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| #define  CONFIG_SYS_IPBSPEED_133		/* define for 133MHz speed */
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| #if defined(CONFIG_SYS_IPBSPEED_133)
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| /*
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|  * PCI Bus clocking configuration
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|  *
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|  * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
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|  * CONFIG_SYS_IPBSPEED_133 is defined. This is because a PCI Clock of 66 MHz yet hasn't
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|  * been tested with a IPB Bus Clock of 66 MHz.
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|  */
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| #define CONFIG_SYS_PCISPEED_66		/* define for 66MHz speed */
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| #else
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| #undef CONFIG_SYS_PCISPEED_66			/* for 33MHz speed */
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| #endif
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| 
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| /*
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|  * Memory map
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|  */
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| #define CONFIG_SYS_MBAR		0xF0000000 /* MBAR hast to be switched by other bootloader or debugger config  */
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| 
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| #define CONFIG_SYS_DEFAULT_MBAR	0x80000000
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| #define CONFIG_SYS_SDRAM_BASE		0x00000000
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| /* Use SRAM until RAM will be available */
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| #define CONFIG_SYS_INIT_RAM_ADDR	MPC5XXX_SRAM
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| #define CONFIG_SYS_INIT_RAM_SIZE	MPC5XXX_SRAM_SIZE	/* Size of used area in DPRAM */
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| #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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| #define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
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| 
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| #define CONFIG_SYS_MONITOR_BASE    CONFIG_SYS_TEXT_BASE
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| #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
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| #   define CONFIG_SYS_RAMBOOT		1
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| #endif
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| 
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| #define CONFIG_SYS_MONITOR_LEN		(192 << 10)	/* Reserve 192 kB for Monitor	*/
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| #define CONFIG_SYS_MALLOC_LEN		(128 << 10)	/* Reserve 128 kB for malloc()	*/
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| #define CONFIG_SYS_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */
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| 
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| /*
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|  * Flash configuration
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|  */
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| #define CONFIG_SYS_FLASH_BASE		0xFF000000
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| #define CONFIG_SYS_FLASH_CFI		1	/* Flash is CFI conformant */
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| #define CONFIG_FLASH_CFI_DRIVER	1	/* Use the common driver */
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| #define CONFIG_SYS_FLASH_BANKS_LIST	{ CONFIG_SYS_FLASH_BASE }
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| #define CONFIG_SYS_FLASH_EMPTY_INFO
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| #define CONFIG_SYS_FLASH_SIZE		0x01000000 /* 16 MByte */
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| #define CONFIG_SYS_MAX_FLASH_SECT	128	/* max num of sects on one chip */
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| #define CONFIG_SYS_MAX_FLASH_BANKS	1	 /* max num of flash banks (= chip selects) */
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| #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/* not supported yet for AMD */
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| 
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| /*
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|  * Chip selects configuration
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|  */
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| /* Boot Chipselect */
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| #define CONFIG_SYS_BOOTCS_START	CONFIG_SYS_FLASH_BASE
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| #define CONFIG_SYS_BOOTCS_SIZE		CONFIG_SYS_FLASH_SIZE
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| #define CONFIG_SYS_BOOTCS_CFG		0x00047800
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| 
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| /*
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|  * Environment settings
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|  */
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| #define CONFIG_ENV_IS_IN_FLASH	1
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| #define CONFIG_ENV_OFFSET		0x40000
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| #define CONFIG_ENV_ADDR		(CONFIG_SYS_TEXT_BASE + CONFIG_ENV_OFFSET)
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| #define CONFIG_ENV_SECT_SIZE	0x20000
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| #define CONFIG_ENV_SIZE		0x4000
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| #define CONFIG_ENV_OFFSET_REDUND   (CONFIG_ENV_OFFSET + CONFIG_ENV_SECT_SIZE)
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| #define CONFIG_ENV_ADDR_REDUND	(CONFIG_SYS_TEXT_BASE + CONFIG_ENV_OFFSET_REDUND)
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| #define CONFIG_ENV_SIZE_REDUND     (CONFIG_ENV_SIZE)
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| #define CONFIG_ENV_OVERWRITE	1
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| 
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| /*
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|  * Ethernet configuration
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|  */
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| #define CONFIG_MPC5xxx_FEC	1
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| #define CONFIG_MPC5xxx_FEC_MII100
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| #define CONFIG_PHY_ADDR		0x01
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| #define CONFIG_MII		1
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| 
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| /*
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|  * GPIO configuration
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|  */
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| #define CONFIG_SYS_GPS_PORT_CONFIG	0x00058044 /* PSC1=UART, PSC2=UART ; Ether=100MBit with MD
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| 						no PCI */
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| 
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| /*
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|  * Miscellaneous configurable options
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|  */
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| #define CONFIG_SYS_LONGHELP			/* undef to save memory	    */
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| #define CONFIG_SYS_CBSIZE		1024	/* Console I/O Buffer Size  */
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| #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)	/* Print Buffer Size */
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| #define CONFIG_SYS_MAXARGS		16		/* max number of command args	*/
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| #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size	*/
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| 
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| #define CONFIG_SYS_MEMTEST_START	0x00100000	/* memtest works on */
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| #define CONFIG_SYS_MEMTEST_END		0x00f00000	/* 1 ... 15 MB in DRAM	*/
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| 
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| #define CONFIG_SYS_LOAD_ADDR		0x200000	/* default load address */
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| 
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| #define CONFIG_CMDLINE_EDITING  1
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| 
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| /*
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|  * Various low-level settings
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|  */
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| #define CONFIG_SYS_HID0_INIT		HID0_ICE | HID0_ICFI
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| #define CONFIG_SYS_HID0_FINAL		HID0_ICE
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| 
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| #define CONFIG_SYS_CS_BURST		0x00000000
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| #define CONFIG_SYS_CS_DEADCYCLE	0x33333333
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| #define CONFIG_SYS_RESET_ADDRESS	0xff000000
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| 
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| #define OF_CPU			"PowerPC,5200@0"
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| #define OF_TBCLK		(bd->bi_busfreq / 4)
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| #define OF_SOC                  "soc5200@f0000000"
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| #define OF_STDOUT_PATH		"/soc5200@f0000000/serial@2000"
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| 
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| #endif /* __CONFIG_H */
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