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nmhw21 - change PMIC config to synchronous mode 

in rare cases the default automatic mode switching can disable a power
rail. To prevent this all used buck regulators are configured to
synchronous mode.
This commit is contained in:
Rene Straub 2019-09-07 11:05:09 +02:00
parent 5488c0795d
commit 88426e4041
2 changed files with 36 additions and 0 deletions
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24
board/nm/nmhw21/board.c
View File

@ -382,6 +382,27 @@ static void pmic_fix_config(void)
} }
} }
static void pmic_disable_auto_mode(void)
{
/*
* In some rare cases the automatic mode switching between synchronous and sleep
* mode can lead to PMIC issues. In this case the rail output is disabled.
* The following code fixes the operation mode to synchronous operation.
*/
uint8_t val = 0;
/* Check whether config has automatic mode defined */
(void)da9063_get_reg(PMIC_REG_BCORE1_CONF, &val);
if ((val & PMIC_CONF_MODE_MASK) == PMIC_CONF_MODE_AUTO)
{
(void)da9063_set_reg(PMIC_REG_BCORE1_CONF, PMIC_CONF_MODE_SYNC | 0x01);
(void)da9063_set_reg(PMIC_REG_BCORE2_CONF, PMIC_CONF_MODE_SYNC | 0x01);
(void)da9063_set_reg(PMIC_REG_BPERI_CONF, PMIC_CONF_MODE_SYNC | 0x01);
(void)da9063_set_reg(PMIC_REG_BIO_CONF, PMIC_CONF_MODE_SYNC | 0x01);
(void)da9063_set_reg(PMIC_REG_BMEM_CONF, PMIC_CONF_MODE_SYNC | 0x01);
}
}
static void pmic_ignition_gate_on(void) static void pmic_ignition_gate_on(void)
{ {
uint8_t val; uint8_t val;
@ -415,6 +436,9 @@ static void init_pmic_spl(void)
/* Fix old configs (mainly prototype boards) */ /* Fix old configs (mainly prototype boards) */
pmic_fix_config(); pmic_fix_config();
/* Disable automatic mode switching */
pmic_disable_auto_mode();
/* Enable +3V3_GNSS (LDO6) */ /* Enable +3V3_GNSS (LDO6) */
(void)da9063_set_reg(PMIC_REG_LDO6_CONT, PMIC_LDOx_EN_MASK); (void)da9063_set_reg(PMIC_REG_LDO6_CONT, PMIC_LDOx_EN_MASK);
mdelay(2); mdelay(2);

12
board/nm/nmhw21/da9063.h
View File

@ -41,6 +41,18 @@
#define PMIC_REG_BUCK_ILIM_B 0x9B #define PMIC_REG_BUCK_ILIM_B 0x9B
#define PMIC_REG_BUCK_ILIM_C 0x9C #define PMIC_REG_BUCK_ILIM_C 0x9C
#define PMIC_REG_BCORE1_CONF 0x9E /* Configuration register of BCORE1 */
#define PMIC_REG_BCORE2_CONF 0x9D /* Configuration register of BCORE2 */
#define PMIC_REG_BPERI_CONF 0xA2 /* Configuration register of BPERI */
#define PMIC_REG_BIO_CONF 0xA0 /* Configuration register of BIO */
#define PMIC_REG_BMEM_CONF 0xA1 /* Configuration register of BMEM */
#define PMIC_CONF_MODE_MASK 0xC0
#define PMIC_CONF_MODE_SLEEP 0x40
#define PMIC_CONF_MODE_SYNC 0x80
#define PMIC_CONF_MODE_AUTO 0xC0
#define PMIC_REG_BBAT_CONT 0xC5 /* Control register for backup battery */ #define PMIC_REG_BBAT_CONT 0xC5 /* Control register for backup battery */
#define PMIC_REG_CONFIG_E 0x10A #define PMIC_REG_CONFIG_E 0x10A