nbhw16: create a separate board under nm/netbird
Because i2c must be available extremly early (before RAM setup) to get the board configuration, I decided to create a new board instead of adding everything to the am335 stuff rom ti. This is not uncommon (see baltos) Now the a reset will start the SPL correctly again.
This commit is contained in:
Stefan Eichenberger
parent
de6cd2da88
commit
ac41d11958
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@ -878,6 +878,7 @@ source "board/hisilicon/hikey/Kconfig"
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source "board/imx31_phycore/Kconfig"
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source "board/isee/igep0033/Kconfig"
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source "board/mpl/vcma9/Kconfig"
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source "board/nm/netbird/Kconfig"
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source "board/olimex/mx23_olinuxino/Kconfig"
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source "board/phytec/pcm051/Kconfig"
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source "board/phytec/pcm052/Kconfig"
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@ -0,0 +1,26 @@
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if TARGET_AM335X_NETBIRD
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config SYS_BOARD
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default "netbird"
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config SYS_VENDOR
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default "nm"
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config SYS_SOC
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default "am33xx"
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config SYS_CONFIG_NAME
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default "am335x_netbird"
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config CONS_INDEX
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int "UART used for console"
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range 1 6
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default 1
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help
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The AM335x SoC has a total of 6 UARTs (UART0 to UART5 as referenced
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in documentation, etc) available to it. Depending on your specific
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board you may want something other than UART0 as for example the IDK
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uses UART3 so enter 4 here.
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endif
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@ -0,0 +1,13 @@
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#
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# Makefile
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#
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# Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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ifeq ($(CONFIG_SKIP_LOWLEVEL_INIT),)
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obj-y := mux.o
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endif
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obj-y += board.o bdparser.o board_descriptor.o
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@ -31,6 +31,7 @@
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/*--- includes --------------------------------------------------------------*/
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#include "bdparser.h" /* own header file */
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#include <asm/io.h>
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/* Platform specific include files */
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@ -1052,15 +1053,22 @@ bd_bool_t BD_GetPartition64( const BD_Context* pCtx, bd_uint16_t tag,
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/* Argument check */
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if ( (pCtx == 0)
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|| (pResult == 0)
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if (pCtx == 0) {
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return BD_FALSE;
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}
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writel(1<<14, 0x4804c13c); /* set gpio out */
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if ( (pResult == 0)
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|| !pCtx->initialized
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|| (index >= pCtx->entries)
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)
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{
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mdelay(1000);
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writel(1<<14, 0x4804c190); /* set gpio out */
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return BD_FALSE;
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}
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mdelay(1000);
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writel(1<<14, 0x4804c190); /* set gpio out */
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/* Clear result */
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memset( pResult, 0x00, sizeof(BD_PartitionEntry64) );
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@ -0,0 +1,402 @@
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/*
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* board.c
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*
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* Board functions for TI AM335X based boards
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*
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* Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <errno.h>
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#include <spl.h>
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#include <serial.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/omap.h>
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#include <asm/arch/ddr_defs.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/clk_synthesizer.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/mmc_host_def.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/mem.h>
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#include <asm/io.h>
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#include <asm/emif.h>
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#include <asm/gpio.h>
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#include <i2c.h>
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#include <miiphy.h>
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#include <cpsw.h>
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#include <power/tps65217.h>
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#include <power/tps65218.h>
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#include <power/tps65910.h>
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#include <environment.h>
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#include <watchdog.h>
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#include <environment.h>
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#include "board_descriptor.h"
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#include "board.h"
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DECLARE_GLOBAL_DATA_PTR;
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/* GPIO that controls power to DDR on EVM-SK */
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#define GPIO_TO_PIN(bank, gpio) (32 * (bank) + (gpio))
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#define GPIO_DDR_VTT_EN GPIO_TO_PIN(0, 7)
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#define ICE_GPIO_DDR_VTT_EN GPIO_TO_PIN(0, 18)
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#define GPIO_PR1_MII_CTRL GPIO_TO_PIN(3, 4)
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#define GPIO_MUX_MII_CTRL GPIO_TO_PIN(3, 10)
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#define GPIO_FET_SWITCH_CTRL GPIO_TO_PIN(0, 7)
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#define GPIO_PHY_RESET GPIO_TO_PIN(2, 5)
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#define NETBIRD_GPIO_RST_PHY_N GPIO_TO_PIN(0, 16)
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#define NETBIRD_GPIO_PWR_GSM GPIO_TO_PIN(1, 22)
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#define NETBIRD_GPIO_RST_GSM GPIO_TO_PIN(1, 24)
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#define NETBIRD_GPIO_WLAN_EN GPIO_TO_PIN(3, 10)
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#define NETBIRD_GPIO_BT_EN GPIO_TO_PIN(3, 4)
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#define NETBIRD_GPIO_EN_GPS_ANT GPIO_TO_PIN(2, 24)
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#define NETBIRD_GPIO_LED_A GPIO_TO_PIN(1, 14)
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#define NETBIRD_GPIO_LED_B GPIO_TO_PIN(1, 15)
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#if defined(CONFIG_SPL_BUILD) || \
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(defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_DM_ETH))
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static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
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#endif
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/*
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* Read header information from EEPROM into global structure.
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*/
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static inline int __maybe_unused read_eeprom(void)
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{
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return bd_read(-1, CONFIG_SYS_I2C_EEPROM_ADDR);
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}
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struct serial_device *default_serial_console(void)
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{
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return &eserial1_device;
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}
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#ifndef CONFIG_SKIP_LOWLEVEL_INIT
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static const struct ddr_data ddr3_netbird_data = {
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/* Ratios were optimized by DDR3 training software from TI */
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.datardsratio0 = 0x37,
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.datawdsratio0 = 0x42,
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.datafwsratio0 = 0x98,
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.datawrsratio0 = 0x7a,
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};
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static const struct cmd_control ddr3_netbird_cmd_ctrl_data = {
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.cmd0csratio = MT41K256M16HA125E_RATIO,
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.cmd0iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
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.cmd1csratio = MT41K256M16HA125E_RATIO,
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.cmd1iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
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.cmd2csratio = MT41K256M16HA125E_RATIO,
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.cmd2iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
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};
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static struct emif_regs ddr3_netbird_emif_reg_data = {
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.sdram_config = MT41K256M16HA125E_EMIF_SDCFG,
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.ref_ctrl = MT41K256M16HA125E_EMIF_SDREF,
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.sdram_tim1 = 0x0aaae51b, /* From AM335x_DDR_register_calc_tool.xls */
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.sdram_tim2 = 0x24437fda, /* From AM335x_DDR_register_calc_tool.xls */
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.sdram_tim3 = 0x50ffe3ff, /* From AM335x_DDR_register_calc_tool.xls */
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.zq_config = MT41K256M16HA125E_ZQ_CFG,
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.emif_ddr_phy_ctlr_1 = MT41K256M16HA125E_EMIF_READ_LATENCY,
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};
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#ifdef CONFIG_SPL_OS_BOOT
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int spl_start_uboot(void)
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{
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/* break into full u-boot on 'c' */
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if (serial_tstc() && serial_getc() == 'c')
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return 1;
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#ifdef CONFIG_SPL_ENV_SUPPORT
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env_init();
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env_relocate_spec();
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if (getenv_yesno("boot_os") != 1)
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return 1;
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#endif
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return 0;
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}
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#endif
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#define OSC (V_OSCK/1000000)
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const struct dpll_params dpll_ddr_nbhw16= {
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400, OSC-1, 1, -1, -1, -1, -1};
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void am33xx_spl_board_init(void)
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{
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/* Get the frequency */
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dpll_mpu_opp100.m = am335x_get_efuse_mpu_max_freq(cdev);
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/* Set CPU speed to 600 MHZ */
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dpll_mpu_opp100.m = MPUPLL_M_600;
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/* Set CORE Frequencies to OPP100 */
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do_setup_dpll(&dpll_core_regs, &dpll_core_opp100);
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/* Clear th PFM Flag on DCDC4 */
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if (tps65218_reg_write(TPS65218_PROT_LEVEL_2, TPS65218_DCDC4, 0x00, 0x80)) {
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puts ("tps65218_reg_write failure\n");
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};
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/* Set MPU Frequency to what we detected now that voltages are set */
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do_setup_dpll(&dpll_mpu_regs, &dpll_mpu_opp100);
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if (read_eeprom() < 0)
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puts("Could not get board ID.\n");
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}
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const struct dpll_params *get_dpll_ddr_params(void)
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{
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return &dpll_ddr_nbhw16;
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}
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void set_uart_mux_conf(void)
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{
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enable_uart0_pin_mux();
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}
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void set_mux_conf_regs(void)
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{
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enable_board_pin_mux();
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}
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const struct ctrl_ioregs ioregs_netbird = {
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.cm0ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
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.cm1ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
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.cm2ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
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.dt0ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
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.dt1ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
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};
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void sdram_init(void)
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{
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config_ddr(400, &ioregs_netbird,
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&ddr3_netbird_data,
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&ddr3_netbird_cmd_ctrl_data,
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&ddr3_netbird_emif_reg_data, 0);
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}
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#endif
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static void request_and_set_gpio(int gpio, char *name, int value)
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{
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int ret;
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ret = gpio_request(gpio, name);
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if (ret < 0) {
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printf("%s: Unable to request %s\n", __func__, name);
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return;
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}
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ret = gpio_direction_output(gpio, 0);
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if (ret < 0) {
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printf("%s: Unable to set %s as output\n", __func__, name);
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goto err_free_gpio;
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}
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gpio_set_value(gpio, value);
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return;
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err_free_gpio:
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gpio_free(gpio);
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}
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#define REQUEST_AND_SET_GPIO(N) request_and_set_gpio(N, #N, 1);
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#define REQUEST_AND_CLEAR_GPIO(N) request_and_set_gpio(N, #N, 0);
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/*
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* Basic board specific setup. Pinmux has been handled already.
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*/
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int board_init(void)
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{
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#if defined(CONFIG_HW_WATCHDOG)
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hw_watchdog_init();
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#endif
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gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
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#if defined(CONFIG_NOR) || defined(CONFIG_NAND)
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gpmc_init();
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#endif
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REQUEST_AND_CLEAR_GPIO(NETBIRD_GPIO_RST_GSM);
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udelay(10000);
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REQUEST_AND_SET_GPIO(NETBIRD_GPIO_PWR_GSM);
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mdelay(1200);
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gpio_set_value(NETBIRD_GPIO_PWR_GSM, 0);
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REQUEST_AND_SET_GPIO(NETBIRD_GPIO_LED_A);
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REQUEST_AND_SET_GPIO(NETBIRD_GPIO_RST_PHY_N);
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REQUEST_AND_CLEAR_GPIO(NETBIRD_GPIO_WLAN_EN);
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REQUEST_AND_CLEAR_GPIO(NETBIRD_GPIO_BT_EN);
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/* There are two funcions on the same mux mode for MMC2_DAT7 we want
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* to use RMII2_CRS_DV so we need to set SMA2 Register to 1
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* See SPRS717J site 49 (10)*/
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#define SMA2_REGISTER (CTRL_BASE + 0x1320)
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writel(0x01, SMA2_REGISTER); /* Select RMII2_CRS_DV instead of MMC2_DAT7 */
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return 0;
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}
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#ifdef CONFIG_BOARD_LATE_INIT
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int board_late_init(void)
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{
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#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
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int rc;
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char *name = NULL;
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set_board_info_env(name);
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#endif
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return 0;
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}
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#endif
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#ifndef CONFIG_DM_ETH
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#if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \
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(defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD))
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static void cpsw_control(int enabled)
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{
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/* VTP can be added here */
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return;
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}
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static struct cpsw_slave_data cpsw_slaves[] = {
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{
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.slave_reg_ofs = 0x208,
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.sliver_reg_ofs = 0xd80,
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.phy_addr = 0,
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},
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{
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.slave_reg_ofs = 0x308,
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.sliver_reg_ofs = 0xdc0,
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.phy_addr = 1,
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},
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};
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static struct cpsw_platform_data cpsw_data = {
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.mdio_base = CPSW_MDIO_BASE,
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.cpsw_base = CPSW_BASE,
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.mdio_div = 0xff,
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.channels = 8,
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.cpdma_reg_ofs = 0x800,
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.slaves = 1,
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.slave_data = cpsw_slaves,
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.ale_reg_ofs = 0xd00,
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.ale_entries = 1024,
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.host_port_reg_ofs = 0x108,
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.hw_stats_reg_ofs = 0x900,
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.bd_ram_ofs = 0x2000,
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.mac_control = (1 << 5),
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.control = cpsw_control,
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.host_port_num = 0,
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.version = CPSW_CTRL_VERSION_2,
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};
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#endif
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#if ((defined(CONFIG_SPL_ETH_SUPPORT) || defined(CONFIG_SPL_USBETH_SUPPORT)) &&\
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defined(CONFIG_SPL_BUILD)) || \
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((defined(CONFIG_DRIVER_TI_CPSW) || \
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defined(CONFIG_USB_ETHER) && defined(CONFIG_MUSB_GADGET)) && \
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!defined(CONFIG_SPL_BUILD))
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static void set_mac_address(int index, uchar mac[6])
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{
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/* Then take mac from bd */
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if (is_valid_ethaddr(mac)) {
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eth_setenv_enetaddr_by_index("eth", index, mac);
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}
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else {
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printf("Trying to set invalid MAC address");
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}
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}
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/*
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* This function will:
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* Read the eFuse for MAC addresses, and set ethaddr/eth1addr/usbnet_devaddr
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* in the environment
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* Perform fixups to the PHY present on certain boards. We only need this
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* function in:
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* - SPL with either CPSW or USB ethernet support
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* - Full U-Boot, with either CPSW or USB ethernet
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* Build in only these cases to avoid warnings about unused variables
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* when we build an SPL that has neither option but full U-Boot will.
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*/
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int board_eth_init(bd_t *bis)
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{
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int rv, n = 0;
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uint8_t mac_addr0[6] = {02,00,00,00,00,01};
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uint8_t mac_addr1[6] = {02,00,00,00,00,02};
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__maybe_unused struct ti_am_eeprom *header;
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int boot_partition;
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#if !defined(CONFIG_SPL_BUILD)
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#ifdef CONFIG_DRIVER_TI_CPSW
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cpsw_data.mdio_div = 0x3E;
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if (read_eeprom() < 0)
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puts("Could not get board ID.\n");
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bd_get_mac_address(0, mac_addr0, sizeof(mac_addr0));
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set_mac_address(0, mac_addr0);
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bd_get_mac_address(1, mac_addr1, sizeof(mac_addr1));
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set_mac_address(1, mac_addr1);
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boot_partition = bd_get_boot_partition();
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if (boot_partition > 1) {
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boot_partition = 0;
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}
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/* mmcblk0p1 => u-boot, mmcblk0p2 => root0 so +2 */
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setenv_ulong("root_part", boot_partition + 2);
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writel(RMII_MODE_ENABLE | RMII_CHIPCKL_ENABLE, &cdev->miisel);
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||||
cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_RMII;
|
||||
cpsw_slaves[1].phy_if = PHY_INTERFACE_MODE_RMII;
|
||||
cpsw_slaves[0].phy_addr = 0;
|
||||
cpsw_slaves[1].phy_addr = 1;
|
||||
|
||||
rv = cpsw_register(&cpsw_data);
|
||||
if (rv < 0)
|
||||
printf("Error %d registering CPSW switch\n", rv);
|
||||
else
|
||||
n += rv;
|
||||
#endif
|
||||
|
||||
#endif
|
||||
#if defined(CONFIG_USB_ETHER) && \
|
||||
(!defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_USBETH_SUPPORT))
|
||||
if (is_valid_ethaddr(mac_addr0))
|
||||
eth_setenv_enetaddr("usbnet_devaddr", mac_addr0);
|
||||
|
||||
rv = usb_eth_initialize(bis);
|
||||
if (rv < 0)
|
||||
printf("Error %d registering USB_ETHER\n", rv);
|
||||
else
|
||||
n += rv;
|
||||
#endif
|
||||
return n;
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* CONFIG_DM_ETH */
|
||||
|
||||
#ifdef CONFIG_SPL_LOAD_FIT
|
||||
int board_fit_config_name_match(const char *name)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
|
@ -0,0 +1,27 @@
|
|||
/*
|
||||
* board.h
|
||||
*
|
||||
* TI AM335x boards information header
|
||||
*
|
||||
* Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#ifndef _BOARD_H_
|
||||
#define _BOARD_H_
|
||||
/*
|
||||
* We have three pin mux functions that must exist. We must be able to enable
|
||||
* uart0, for initial output and i2c0 to read the main EEPROM. We then have a
|
||||
* main pinmux function that can be overridden to enable all other pinmux that
|
||||
* is required on the board.
|
||||
*/
|
||||
void enable_uart0_pin_mux(void);
|
||||
void enable_uart1_pin_mux(void);
|
||||
void enable_uart2_pin_mux(void);
|
||||
void enable_uart3_pin_mux(void);
|
||||
void enable_uart4_pin_mux(void);
|
||||
void enable_uart5_pin_mux(void);
|
||||
void enable_i2c0_pin_mux(void);
|
||||
void enable_board_pin_mux(void);
|
||||
#endif
|
||||
|
|
@ -0,0 +1,213 @@
|
|||
/*
|
||||
* Library to support early TI EVM EEPROM handling
|
||||
*
|
||||
* Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/
|
||||
* Lokesh Vutla
|
||||
* Steve Kipisz
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/omap_common.h>
|
||||
#include <i2c.h>
|
||||
#include <malloc.h>
|
||||
#include <asm/io.h>
|
||||
|
||||
#include "board_descriptor.h"
|
||||
#include "bdparser.h"
|
||||
|
||||
#define SYSINFO_ADDRESS 0x0000 /* Board descriptor at beginning of EEPROM */
|
||||
#define SYSCONFIG_ADDRESS 0x0600 /* Board descriptor at beginning of EEPROM */
|
||||
#define MAX_PARTITION_ENTRIES 4
|
||||
|
||||
static BD_Context *bd_board_info = 0;
|
||||
static BD_Context *bd_system_config = 0;
|
||||
|
||||
static int i2c_eeprom_init(int i2c_bus, int dev_addr)
|
||||
{
|
||||
int rc;
|
||||
|
||||
if (i2c_bus >= 0) {
|
||||
rc = i2c_set_bus_num(i2c_bus);
|
||||
if (rc)
|
||||
return rc;
|
||||
}
|
||||
|
||||
return i2c_probe(dev_addr);
|
||||
}
|
||||
|
||||
static int i2c_eeprom_read(int offset, void *data, size_t len)
|
||||
{
|
||||
return i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR,
|
||||
offset,
|
||||
CONFIG_SYS_I2C_EEPROM_ADDR_LEN,
|
||||
data,
|
||||
len);
|
||||
}
|
||||
|
||||
static int boardinfo_read(BD_Context **context, size_t start_addr)
|
||||
{
|
||||
char bd_header_buffer[8];
|
||||
void *bd_data = NULL;
|
||||
|
||||
if(*context)
|
||||
return 0;
|
||||
|
||||
*context = calloc(sizeof(BD_Context), 1);
|
||||
if(!*context)
|
||||
{
|
||||
printf("Couldn't allocate memory for board information\n");
|
||||
goto failed;
|
||||
}
|
||||
|
||||
if (i2c_eeprom_read(start_addr, bd_header_buffer, sizeof(bd_header_buffer))) {
|
||||
printf("%s() Can't read BD header from EEPROM\n", __FUNCTION__);
|
||||
goto failed;
|
||||
}
|
||||
|
||||
if (!BD_CheckHeader(*context, bd_header_buffer))
|
||||
{
|
||||
printf("Invalid board information header\n");
|
||||
goto failed;
|
||||
}
|
||||
|
||||
bd_data = malloc((*context)->size);
|
||||
if (bd_data == NULL)
|
||||
{
|
||||
printf("Can not allocate memory for board info");
|
||||
goto failed;
|
||||
}
|
||||
|
||||
if (i2c_eeprom_read(start_addr + sizeof(bd_header_buffer), bd_data, (*context)->size))
|
||||
{
|
||||
printf("Can not read board information data");
|
||||
goto failed;
|
||||
}
|
||||
|
||||
if (!BD_ImportData(*context, bd_data))
|
||||
{
|
||||
printf("Invalid board information!\n");
|
||||
goto failed;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
failed:
|
||||
if (bd_data != NULL)
|
||||
{
|
||||
free(bd_data);
|
||||
bd_data = NULL;
|
||||
}
|
||||
|
||||
if (*context != NULL)
|
||||
{
|
||||
free(*context);
|
||||
*context = NULL;
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
static void read_sysinfo(void)
|
||||
{
|
||||
int err;
|
||||
|
||||
err = boardinfo_read(&bd_board_info, SYSINFO_ADDRESS);
|
||||
if (err ) {
|
||||
printf("Could not read sysinf boarddescriptor\n");
|
||||
return;
|
||||
}
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
static void read_sysconfig(void)
|
||||
{
|
||||
int err;
|
||||
|
||||
err = boardinfo_read(&bd_system_config, SYSCONFIG_ADDRESS);
|
||||
if (err ) {
|
||||
printf("Could not read sysconfig boarddescriptor\n");
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
int bd_read (int bus_addr, int dev_addr)
|
||||
{
|
||||
if (i2c_eeprom_init(bus_addr, dev_addr)) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
read_sysinfo();
|
||||
read_sysconfig();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static u8 try_partition_read(void)
|
||||
{
|
||||
BD_PartitionEntry64 partition;
|
||||
int i;
|
||||
int rc;
|
||||
int partition_count = 0;
|
||||
int boot_partition = 0;
|
||||
|
||||
for (i = 0; i < MAX_PARTITION_ENTRIES; i++)
|
||||
{
|
||||
rc = BD_GetPartition64( bd_system_config, BD_Partition64, i, &partition );
|
||||
if (rc) {
|
||||
partition_count++;
|
||||
if (((partition.flags & BD_Partition_Flags_Active) != 0) &&
|
||||
(i > 0)) {
|
||||
boot_partition = i - 1; /* The first one is a dummy partition for u-boot */
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if (partition_count < 1)
|
||||
{
|
||||
printf("ERROR: Too few partitions defined, taking default 0\n");
|
||||
}
|
||||
|
||||
return boot_partition;
|
||||
|
||||
}
|
||||
|
||||
u8 bd_get_boot_partition(void)
|
||||
{
|
||||
u8 boot_part;
|
||||
|
||||
if ((bd_system_config == 0)) {
|
||||
puts("System config not valid, can not get boot partition\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* If we have a new Bootpartition entry take this as boot part */
|
||||
if ( BD_GetUInt8( bd_system_config, BD_BootPart, 0, &boot_part) ) {
|
||||
if (boot_part >= 0 && boot_part <= 1) {
|
||||
return boot_part;
|
||||
}
|
||||
}
|
||||
|
||||
/* If we not have a Bootpartition entry, perhaps we have a partition table */
|
||||
return try_partition_read();
|
||||
|
||||
}
|
||||
|
||||
int bd_get_mac_address(uint index, u8 *mac, u32 len)
|
||||
{
|
||||
if (bd_board_info == 0) {
|
||||
puts("Board info not valid, can not get mac address\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (len != 6) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (BD_GetMAC( bd_board_info, BD_Eth_Mac, index, mac))
|
||||
return 0;
|
||||
else
|
||||
return -1;
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
/*
|
||||
* Library to support early TI EVM EEPROM handling
|
||||
*
|
||||
* Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#ifndef __BOARD_DESCRIPTOR_H
|
||||
#define __BOARD_DESCRIPTOR_H
|
||||
|
||||
int bd_read(int bus_addr, int dev_addr);
|
||||
u8 bd_get_boot_partition(void);
|
||||
int bd_get_mac_address(uint index, u8 *mac_address, u32 len);
|
||||
|
||||
#endif /* __BOARD_DESCRIPTOR_H */
|
||||
|
|
@ -0,0 +1,288 @@
|
|||
/*
|
||||
* mux.c
|
||||
*
|
||||
* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation version 2.
|
||||
*
|
||||
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
|
||||
* kind, whether express or implied; without even the implied warranty
|
||||
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/arch/sys_proto.h>
|
||||
#include <asm/arch/hardware.h>
|
||||
#include <asm/arch/mux.h>
|
||||
#include <asm/io.h>
|
||||
#include <i2c.h>
|
||||
#include "board.h"
|
||||
|
||||
static struct module_pin_mux uart2_pin_mux[] = {
|
||||
{OFFSET(spi0_sclk), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* UART2_RXD */
|
||||
{OFFSET(spi0_d0), (MODE(1) | PULLUDEN)}, /* UART2_TXD */
|
||||
{-1},
|
||||
};
|
||||
|
||||
static struct module_pin_mux uart3_pin_mux[] = {
|
||||
{OFFSET(spi0_cs1), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* UART3_RXD */
|
||||
{OFFSET(ecap0_in_pwm0_out), (MODE(1) | PULLUDEN)}, /* UART3_TXD */
|
||||
{-1},
|
||||
};
|
||||
|
||||
static struct module_pin_mux uart4_pin_mux[] = {
|
||||
{OFFSET(gpmc_wait0), (MODE(6) | PULLUP_EN | RXACTIVE)}, /* UART4_RXD */
|
||||
{OFFSET(gpmc_wpn), (MODE(6) | PULLUDEN)}, /* UART4_TXD */
|
||||
{-1},
|
||||
};
|
||||
|
||||
static struct module_pin_mux uart5_pin_mux[] = {
|
||||
{OFFSET(lcd_data9), (MODE(4) | PULLUP_EN | RXACTIVE)}, /* UART5_RXD */
|
||||
{OFFSET(lcd_data8), (MODE(4) | PULLUDEN)}, /* UART5_TXD */
|
||||
{-1},
|
||||
};
|
||||
|
||||
static struct module_pin_mux i2c0_pin_mux[] = {
|
||||
{OFFSET(i2c0_sda), (MODE(0) | RXACTIVE |
|
||||
PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* I2C_DATA */
|
||||
{OFFSET(i2c0_scl), (MODE(0) | RXACTIVE |
|
||||
PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* I2C_SCLK */
|
||||
{-1},
|
||||
};
|
||||
|
||||
|
||||
#ifdef CONFIG_NAND
|
||||
static struct module_pin_mux nand_pin_mux[] = {
|
||||
{OFFSET(gpmc_ad0), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD0 */
|
||||
{OFFSET(gpmc_ad1), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD1 */
|
||||
{OFFSET(gpmc_ad2), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD2 */
|
||||
{OFFSET(gpmc_ad3), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD3 */
|
||||
{OFFSET(gpmc_ad4), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD4 */
|
||||
{OFFSET(gpmc_ad5), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD5 */
|
||||
{OFFSET(gpmc_ad6), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD6 */
|
||||
{OFFSET(gpmc_ad7), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD7 */
|
||||
#ifdef CONFIG_SYS_NAND_BUSWIDTH_16BIT
|
||||
{OFFSET(gpmc_ad8), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD8 */
|
||||
{OFFSET(gpmc_ad9), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD9 */
|
||||
{OFFSET(gpmc_ad10), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD10 */
|
||||
{OFFSET(gpmc_ad11), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD11 */
|
||||
{OFFSET(gpmc_ad12), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD12 */
|
||||
{OFFSET(gpmc_ad13), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD13 */
|
||||
{OFFSET(gpmc_ad14), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD14 */
|
||||
{OFFSET(gpmc_ad15), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD15 */
|
||||
#endif
|
||||
{OFFSET(gpmc_wait0), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* nWAIT */
|
||||
{OFFSET(gpmc_wpn), (MODE(7) | PULLUP_EN)}, /* nWP */
|
||||
{OFFSET(gpmc_csn0), (MODE(0) | PULLUP_EN)}, /* nCS */
|
||||
{OFFSET(gpmc_wen), (MODE(0) | PULLDOWN_EN)}, /* WEN */
|
||||
{OFFSET(gpmc_oen_ren), (MODE(0) | PULLDOWN_EN)}, /* OE */
|
||||
{OFFSET(gpmc_advn_ale), (MODE(0) | PULLDOWN_EN)}, /* ADV_ALE */
|
||||
{OFFSET(gpmc_be0n_cle), (MODE(0) | PULLDOWN_EN)}, /* BE_CLE */
|
||||
{-1},
|
||||
};
|
||||
#elif defined(CONFIG_NOR)
|
||||
static struct module_pin_mux bone_norcape_pin_mux[] = {
|
||||
{OFFSET(gpmc_a0), MODE(0) | PULLUDDIS}, /* NOR_A0 */
|
||||
{OFFSET(gpmc_a1), MODE(0) | PULLUDDIS}, /* NOR_A1 */
|
||||
{OFFSET(gpmc_a2), MODE(0) | PULLUDDIS}, /* NOR_A2 */
|
||||
{OFFSET(gpmc_a3), MODE(0) | PULLUDDIS}, /* NOR_A3 */
|
||||
{OFFSET(gpmc_a4), MODE(0) | PULLUDDIS}, /* NOR_A4 */
|
||||
{OFFSET(gpmc_a5), MODE(0) | PULLUDDIS}, /* NOR_A5 */
|
||||
{OFFSET(gpmc_a6), MODE(0) | PULLUDDIS}, /* NOR_A6 */
|
||||
{OFFSET(gpmc_a7), MODE(0) | PULLUDDIS}, /* NOR_A7 */
|
||||
{OFFSET(gpmc_ad0), MODE(0) | PULLUDDIS | RXACTIVE}, /* NOR_AD0 */
|
||||
{OFFSET(gpmc_ad1), MODE(0) | PULLUDDIS | RXACTIVE}, /* NOR_AD1 */
|
||||
{OFFSET(gpmc_ad2), MODE(0) | PULLUDDIS | RXACTIVE}, /* NOR_AD2 */
|
||||
{OFFSET(gpmc_ad3), MODE(0) | PULLUDDIS | RXACTIVE}, /* NOR_AD3 */
|
||||
{OFFSET(gpmc_ad4), MODE(0) | PULLUDDIS | RXACTIVE}, /* NOR_AD4 */
|
||||
{OFFSET(gpmc_ad5), MODE(0) | PULLUDDIS | RXACTIVE}, /* NOR_AD5 */
|
||||
{OFFSET(gpmc_ad6), MODE(0) | PULLUDDIS | RXACTIVE}, /* NOR_AD6 */
|
||||
{OFFSET(gpmc_ad7), MODE(0) | PULLUDDIS | RXACTIVE}, /* NOR_AD7 */
|
||||
{OFFSET(gpmc_ad8), MODE(0) | PULLUDDIS | RXACTIVE}, /* NOR_AD8 */
|
||||
{OFFSET(gpmc_ad9), MODE(0) | PULLUDDIS | RXACTIVE}, /* NOR_AD9 */
|
||||
{OFFSET(gpmc_ad10), MODE(0) | PULLUDDIS | RXACTIVE}, /* NOR_AD10 */
|
||||
{OFFSET(gpmc_ad11), MODE(0) | PULLUDDIS | RXACTIVE}, /* NOR_AD11 */
|
||||
{OFFSET(gpmc_ad12), MODE(0) | PULLUDDIS | RXACTIVE}, /* NOR_AD12 */
|
||||
{OFFSET(gpmc_ad13), MODE(0) | PULLUDDIS | RXACTIVE}, /* NOR_AD13 */
|
||||
{OFFSET(gpmc_ad14), MODE(0) | PULLUDDIS | RXACTIVE}, /* NOR_AD14 */
|
||||
{OFFSET(gpmc_ad15), MODE(0) | PULLUDDIS | RXACTIVE}, /* NOR_AD15 */
|
||||
{OFFSET(gpmc_csn0), MODE(0) | PULLUDEN | PULLUP_EN}, /* CE */
|
||||
{OFFSET(gpmc_advn_ale), MODE(0) | PULLUDEN | PULLDOWN_EN}, /* ALE */
|
||||
{OFFSET(gpmc_oen_ren), MODE(0) | PULLUDEN | PULLDOWN_EN},/* OEn_REN */
|
||||
{OFFSET(gpmc_be0n_cle), MODE(0) | PULLUDEN | PULLDOWN_EN},/* unused */
|
||||
{OFFSET(gpmc_wen), MODE(0) | PULLUDEN | PULLDOWN_EN}, /* WEN */
|
||||
{OFFSET(gpmc_wait0), MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE},/*WAIT*/
|
||||
{-1},
|
||||
};
|
||||
#endif
|
||||
|
||||
static struct module_pin_mux uart0_netbird_pin_mux[] = {
|
||||
{OFFSET(uart0_rxd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* UART0_RXD */
|
||||
{OFFSET(uart0_txd), (MODE(0) | PULLUDEN | PULLUP_EN)}, /* UART0_TXD */
|
||||
{-1},
|
||||
};
|
||||
|
||||
static struct module_pin_mux uart1_netbird_pin_mux[] = {
|
||||
{OFFSET(uart1_rxd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (D16) uart1_rxd.uart1_rxd */
|
||||
{OFFSET(uart1_txd), (MODE(0) | PULLUDEN | PULLUP_EN)}, /* (D15) uart1_txd.uart1_txd */
|
||||
{OFFSET(uart1_ctsn), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (D18) uart1_ctsn.uart1_ctsn */
|
||||
{OFFSET(uart1_rtsn), (MODE(0) | PULLUDEN | PULLUP_EN)}, /* (D17) uart1_rtsn.uart1_rtsn */
|
||||
{-1},
|
||||
};
|
||||
|
||||
static struct module_pin_mux rmii0_netbird_pin_mux[] = {
|
||||
{OFFSET(mii1_crs), MODE(1) | PULLUDDIS | RXACTIVE}, /* MII1_CRS */
|
||||
{OFFSET(mii1_rxerr), MODE(1) | PULLUDDIS | RXACTIVE}, /* MII1_RXERR */
|
||||
{OFFSET(mii1_txen), MODE(1) | PULLUDDIS }, /* MII1_TXEN */
|
||||
{OFFSET(mii1_txd0), MODE(1) | PULLUDDIS }, /* MII1_TXD0 */
|
||||
{OFFSET(mii1_txd1), MODE(1) | PULLUDDIS }, /* MII1_TXD1 */
|
||||
{OFFSET(mii1_rxd0), MODE(1) | PULLUDDIS | RXACTIVE }, /* MII1_RXD0 */
|
||||
{OFFSET(mii1_rxd1), MODE(1) | PULLUDDIS | RXACTIVE }, /* MII1_RXD1 */
|
||||
{OFFSET(rmii1_refclk), MODE(0) | PULLUDDIS | RXACTIVE}, /* RMII1_REFCLK */
|
||||
{OFFSET(mdio_clk), MODE(0) | PULLUDDIS }, /* MDIO_CLK */
|
||||
{OFFSET(mdio_data), MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE }, /* MDIO_DATA */
|
||||
{-1},
|
||||
};
|
||||
|
||||
static struct module_pin_mux rmii1_netbird_pin_mux[] = {
|
||||
{OFFSET(gpmc_a9), MODE(3) | PULLUDDIS | RXACTIVE}, /* MII2_CRS */
|
||||
{OFFSET(gpmc_wpn), MODE(3) | PULLUDDIS | RXACTIVE}, /* MII2_RXERR */
|
||||
{OFFSET(gpmc_a0), MODE(3) | PULLUDDIS}, /* MII2_TXEN */
|
||||
{OFFSET(gpmc_a5), MODE(3) | PULLUDDIS}, /* MII2_TXD0 */
|
||||
{OFFSET(gpmc_a4), MODE(3) | PULLUDDIS}, /* MII2_TXD1 */
|
||||
{OFFSET(gpmc_a11), MODE(3) | PULLUDDIS | RXACTIVE}, /* MII1_RXD0 */
|
||||
{OFFSET(gpmc_a10), MODE(3) | PULLUDDIS | RXACTIVE}, /* MII1_RXD1 */
|
||||
{OFFSET(mii1_col), MODE(1) | PULLUDDIS | RXACTIVE}, /* RMII1_REFCLK */
|
||||
{-1},
|
||||
};
|
||||
|
||||
static struct module_pin_mux mmc0_sdio_netbird_pin_mux[] = {
|
||||
{OFFSET(mmc0_clk), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* MMC0_CLK */
|
||||
{OFFSET(mmc0_cmd), (MODE(0) | PULLUDEN | PULLUP_EN)}, /* MMC0_CMD */
|
||||
{OFFSET(mmc0_dat0), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE )}, /* MMC0_DAT0 */
|
||||
{OFFSET(mmc0_dat1), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE )}, /* MMC0_DAT1 */
|
||||
{OFFSET(mmc0_dat2), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE )}, /* MMC0_DAT2 */
|
||||
{OFFSET(mmc0_dat3), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE )}, /* MMC0_DAT3 */
|
||||
{-1},
|
||||
};
|
||||
|
||||
static struct module_pin_mux mmc1_emmc_netbird_pin_mux[] = {
|
||||
{OFFSET(gpmc_csn1), (MODE(2) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* MMC1_CLK */
|
||||
{OFFSET(gpmc_csn2), (MODE(2) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* MMC1_CMD */
|
||||
{OFFSET(gpmc_ad0), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE )}, /* MMC1_DAT0 */
|
||||
{OFFSET(gpmc_ad1), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE )}, /* MMC1_DAT1 */
|
||||
{OFFSET(gpmc_ad2), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE )}, /* MMC1_DAT2 */
|
||||
{OFFSET(gpmc_ad3), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE )}, /* MMC1_DAT3 */
|
||||
{OFFSET(gpmc_ad4), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE )}, /* MMC1_DAT3 */
|
||||
{OFFSET(gpmc_ad5), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE )}, /* MMC1_DAT3 */
|
||||
{OFFSET(gpmc_ad6), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE )}, /* MMC1_DAT3 */
|
||||
{OFFSET(gpmc_ad7), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE )}, /* MMC1_DAT3 */
|
||||
{-1},
|
||||
};
|
||||
|
||||
static struct module_pin_mux gpio_netbird_pin_mux[] = {
|
||||
/* Bank 0 */
|
||||
{OFFSET(ecap0_in_pwm0_out), (MODE(7) | PULLUDDIS | RXACTIVE)}, /* (C18) eCAP0_in_PWM0_out.gpio0[7] */ /* PWM */
|
||||
{OFFSET(mii1_txd3), (MODE(7) | PULLUDDIS)}, /* (J18) gmii1_txd3.gpio0[16] */ /* RST_PHY~ */
|
||||
{OFFSET(gpmc_ad11), (MODE(7) | PULLUDDIS)}, /* (U12) gpmc_ad11.gpio0[27] */ /* RST_EXT~ */
|
||||
/* Bank 1 */
|
||||
{OFFSET(gpmc_ad13), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (R12) gpmc_ad13.gpio1[13] */ /* BUTTON */
|
||||
{OFFSET(gpmc_ad14), (MODE(7) | PULLUDDIS)}, /* (V13) gpmc_ad14.gpio1[14] */ /* LED_A */
|
||||
{OFFSET(gpmc_ad15), (MODE(7) | PULLUDDIS)}, /* (U13) gpmc_ad15.gpio1[15] */ /* LED_B */
|
||||
{OFFSET(gpmc_a6), (MODE(7) | PULLUDDIS)}, /* (U15) gpmc_a6.gpio1[22] */ /* GSM_PWR_EN */
|
||||
{OFFSET(gpmc_a8), (MODE(7) | PULLUDDIS)}, /* (V16) gpmc_a8.gpio1[24] */ /* RST_GSM~ */
|
||||
/* Bank 2 */
|
||||
{OFFSET(lcd_pclk), (MODE(7) | PULLUDDIS)}, /* (V5) lcd_pclk.gpio2[24] */ /* EN_GPS_ANT */
|
||||
{OFFSET(lcd_data3), (MODE(7) | PULLUDEN| PULLUP_EN)}, /* (V5) lcd_pclk.gpio2[9] */ /* SYSBOOT */
|
||||
{OFFSET(lcd_data4), (MODE(7) | PULLUDEN| PULLUP_EN)}, /* (V5) lcd_pclk.gpio2[10] */ /* SYSBOOT */
|
||||
/* Bank 3 */
|
||||
{OFFSET(mii1_rxdv), (MODE(7) | PULLUDDIS)}, /* (J17) gmii1_rxdv.gpio3[4] */ /* BT_EN */
|
||||
{OFFSET(mii1_rxdv), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (K18) gmii1_txclk.gpio3[9] */ /* WLAN_IRQ */
|
||||
{OFFSET(mii1_rxdv), (MODE(7) | PULLUDDIS)}, /* (L18) gmii1_rxclk.gpio3[10] */ /* WLAN_EN */
|
||||
{-1},
|
||||
};
|
||||
|
||||
static struct module_pin_mux usb_netbird_pin_mux[] = {
|
||||
{OFFSET(usb0_drvvbus), (MODE(0) | PULLUDEN | PULLDOWN_EN)}, /* (F16) USB0_DRVVBUS.USB0_DRVVBUS */ /* PWM */
|
||||
{OFFSET(usb1_drvvbus), (MODE(0) | PULLUDDIS | PULLDOWN_EN)}, /* (F15) USB1_DRVVBUS.USB1_DRVVBUS */ /* RST_PHY~ */
|
||||
{-1},
|
||||
};
|
||||
|
||||
#if defined(CONFIG_NOR_BOOT)
|
||||
void enable_norboot_pin_mux(void)
|
||||
{
|
||||
configure_module_pin_mux(bone_norcape_pin_mux);
|
||||
}
|
||||
#endif
|
||||
|
||||
void enable_uart0_pin_mux(void)
|
||||
{
|
||||
configure_module_pin_mux(uart0_netbird_pin_mux);
|
||||
}
|
||||
|
||||
void enable_uart1_pin_mux(void)
|
||||
{
|
||||
configure_module_pin_mux(uart1_netbird_pin_mux);
|
||||
}
|
||||
|
||||
void enable_uart2_pin_mux(void)
|
||||
{
|
||||
configure_module_pin_mux(uart2_pin_mux);
|
||||
}
|
||||
|
||||
void enable_uart3_pin_mux(void)
|
||||
{
|
||||
configure_module_pin_mux(uart3_pin_mux);
|
||||
}
|
||||
|
||||
void enable_uart4_pin_mux(void)
|
||||
{
|
||||
configure_module_pin_mux(uart4_pin_mux);
|
||||
}
|
||||
|
||||
void enable_uart5_pin_mux(void)
|
||||
{
|
||||
configure_module_pin_mux(uart5_pin_mux);
|
||||
}
|
||||
|
||||
void enable_i2c0_pin_mux(void)
|
||||
{
|
||||
configure_module_pin_mux(i2c0_pin_mux);
|
||||
}
|
||||
|
||||
/*
|
||||
* The AM335x GP EVM, if daughter card(s) are connected, can have 8
|
||||
* different profiles. These profiles determine what peripherals are
|
||||
* valid and need pinmux to be configured.
|
||||
*/
|
||||
#define PROFILE_NONE 0x0
|
||||
#define PROFILE_0 (1 << 0)
|
||||
#define PROFILE_1 (1 << 1)
|
||||
#define PROFILE_2 (1 << 2)
|
||||
#define PROFILE_3 (1 << 3)
|
||||
#define PROFILE_4 (1 << 4)
|
||||
#define PROFILE_5 (1 << 5)
|
||||
#define PROFILE_6 (1 << 6)
|
||||
#define PROFILE_7 (1 << 7)
|
||||
#define PROFILE_MASK 0x7
|
||||
#define PROFILE_ALL 0xFF
|
||||
|
||||
/* CPLD registers */
|
||||
#define I2C_CPLD_ADDR 0x35
|
||||
#define CFG_REG 0x10
|
||||
|
||||
void enable_board_pin_mux(void)
|
||||
{
|
||||
/* Netbird board */
|
||||
configure_module_pin_mux(gpio_netbird_pin_mux);
|
||||
configure_module_pin_mux(rmii0_netbird_pin_mux);
|
||||
configure_module_pin_mux(rmii1_netbird_pin_mux);
|
||||
configure_module_pin_mux(mmc0_sdio_netbird_pin_mux);
|
||||
configure_module_pin_mux(mmc1_emmc_netbird_pin_mux);
|
||||
configure_module_pin_mux(usb_netbird_pin_mux);
|
||||
configure_module_pin_mux(usb_netbird_pin_mux);
|
||||
configure_module_pin_mux(i2c0_pin_mux);
|
||||
}
|
||||
|
|
@ -0,0 +1,158 @@
|
|||
/*
|
||||
* Copyright (c) 2004-2008 Texas Instruments
|
||||
*
|
||||
* (C) Copyright 2002
|
||||
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
|
||||
OUTPUT_ARCH(arm)
|
||||
ENTRY(_start)
|
||||
SECTIONS
|
||||
{
|
||||
. = 0x00000000;
|
||||
|
||||
. = ALIGN(4);
|
||||
.text :
|
||||
{
|
||||
*(.__image_copy_start)
|
||||
*(.vectors)
|
||||
CPUDIR/start.o (.text*)
|
||||
board/nm/netbird/built-in.o (.text*)
|
||||
*(.text*)
|
||||
}
|
||||
|
||||
. = ALIGN(4);
|
||||
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
|
||||
|
||||
. = ALIGN(4);
|
||||
.data : {
|
||||
*(.data*)
|
||||
}
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
. = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
.u_boot_list : {
|
||||
KEEP(*(SORT(.u_boot_list*)));
|
||||
}
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
.__efi_runtime_start : {
|
||||
*(.__efi_runtime_start)
|
||||
}
|
||||
|
||||
.efi_runtime : {
|
||||
*(efi_runtime_text)
|
||||
*(efi_runtime_data)
|
||||
}
|
||||
|
||||
.__efi_runtime_stop : {
|
||||
*(.__efi_runtime_stop)
|
||||
}
|
||||
|
||||
.efi_runtime_rel_start :
|
||||
{
|
||||
*(.__efi_runtime_rel_start)
|
||||
}
|
||||
|
||||
.efi_runtime_rel : {
|
||||
*(.relefi_runtime_text)
|
||||
*(.relefi_runtime_data)
|
||||
}
|
||||
|
||||
.efi_runtime_rel_stop :
|
||||
{
|
||||
*(.__efi_runtime_rel_stop)
|
||||
}
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
.image_copy_end :
|
||||
{
|
||||
*(.__image_copy_end)
|
||||
}
|
||||
|
||||
.rel_dyn_start :
|
||||
{
|
||||
*(.__rel_dyn_start)
|
||||
}
|
||||
|
||||
.rel.dyn : {
|
||||
*(.rel*)
|
||||
}
|
||||
|
||||
.rel_dyn_end :
|
||||
{
|
||||
*(.__rel_dyn_end)
|
||||
}
|
||||
|
||||
.hash : { *(.hash*) }
|
||||
|
||||
.end :
|
||||
{
|
||||
*(.__end)
|
||||
}
|
||||
|
||||
_image_binary_end = .;
|
||||
|
||||
/*
|
||||
* Deprecated: this MMU section is used by pxa at present but
|
||||
* should not be used by new boards/CPUs.
|
||||
*/
|
||||
. = ALIGN(4096);
|
||||
.mmutable : {
|
||||
*(.mmutable)
|
||||
}
|
||||
|
||||
/*
|
||||
* Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c
|
||||
* __bss_base and __bss_limit are for linker only (overlay ordering)
|
||||
*/
|
||||
|
||||
.bss_start __rel_dyn_start (OVERLAY) : {
|
||||
KEEP(*(.__bss_start));
|
||||
__bss_base = .;
|
||||
}
|
||||
|
||||
.bss __bss_base (OVERLAY) : {
|
||||
*(.bss*)
|
||||
. = ALIGN(4);
|
||||
__bss_limit = .;
|
||||
}
|
||||
|
||||
.bss_end __bss_limit (OVERLAY) : {
|
||||
KEEP(*(.__bss_end));
|
||||
}
|
||||
|
||||
.dynsym _image_binary_end : { *(.dynsym) }
|
||||
.dynbss : { *(.dynbss) }
|
||||
.dynstr : { *(.dynstr*) }
|
||||
.dynamic : { *(.dynamic*) }
|
||||
.gnu.hash : { *(.gnu.hash) }
|
||||
.plt : { *(.plt*) }
|
||||
.interp : { *(.interp*) }
|
||||
.gnu : { *(.gnu*) }
|
||||
.ARM.exidx : { *(.ARM.exidx*) }
|
||||
}
|
||||
|
|
@ -41,32 +41,3 @@ config NOR_BOOT
|
|||
source "board/ti/common/Kconfig"
|
||||
|
||||
endif
|
||||
|
||||
if TARGET_AM335X_NETBIRD
|
||||
|
||||
config SYS_BOARD
|
||||
default "am335x"
|
||||
|
||||
config SYS_VENDOR
|
||||
default "ti"
|
||||
|
||||
config SYS_SOC
|
||||
default "am33xx"
|
||||
|
||||
config SYS_CONFIG_NAME
|
||||
default "am335x_netbird"
|
||||
|
||||
config CONS_INDEX
|
||||
int "UART used for console"
|
||||
range 1 6
|
||||
default 1
|
||||
help
|
||||
The AM335x SoC has a total of 6 UARTs (UART0 to UART5 as referenced
|
||||
in documentation, etc) available to it. Depending on your specific
|
||||
board you may want something other than UART0 as for example the IDK
|
||||
uses UART3 so enter 4 here.
|
||||
|
||||
source "board/ti/common/Kconfig"
|
||||
|
||||
endif
|
||||
|
||||
|
|
|
|||
|
|
@ -29,7 +29,6 @@
|
|||
#include <miiphy.h>
|
||||
#include <cpsw.h>
|
||||
#include <power/tps65217.h>
|
||||
#include <power/tps65218.h>
|
||||
#include <power/tps65910.h>
|
||||
#include <environment.h>
|
||||
#include <watchdog.h>
|
||||
|
|
@ -48,15 +47,6 @@ DECLARE_GLOBAL_DATA_PTR;
|
|||
#define GPIO_FET_SWITCH_CTRL GPIO_TO_PIN(0, 7)
|
||||
#define GPIO_PHY_RESET GPIO_TO_PIN(2, 5)
|
||||
|
||||
#define NETBIRD_GPIO_RST_PHY_N GPIO_TO_PIN(0, 16)
|
||||
#define NETBIRD_GPIO_PWR_GSM GPIO_TO_PIN(1, 22)
|
||||
#define NETBIRD_GPIO_RST_GSM GPIO_TO_PIN(1, 24)
|
||||
#define NETBIRD_GPIO_WLAN_EN GPIO_TO_PIN(3, 10)
|
||||
#define NETBIRD_GPIO_BT_EN GPIO_TO_PIN(3, 4)
|
||||
#define NETBIRD_GPIO_EN_GPS_ANT GPIO_TO_PIN(2, 24)
|
||||
#define NETBIRD_GPIO_LED_A GPIO_TO_PIN(1, 14)
|
||||
#define NETBIRD_GPIO_LED_B GPIO_TO_PIN(1, 15)
|
||||
|
||||
#if defined(CONFIG_SPL_BUILD) || \
|
||||
(defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_DM_ETH))
|
||||
static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
|
||||
|
|
@ -118,14 +108,6 @@ static const struct ddr_data ddr3_beagleblack_data = {
|
|||
.datawrsratio0 = MT41K256M16HA125E_PHY_WR_DATA,
|
||||
};
|
||||
|
||||
static const struct ddr_data ddr3_netbird_data = {
|
||||
/* Ratios were optimized by DDR3 training software from TI */
|
||||
.datardsratio0 = 0x37,
|
||||
.datawdsratio0 = 0x42,
|
||||
.datafwsratio0 = 0x98,
|
||||
.datawrsratio0 = 0x7a,
|
||||
};
|
||||
|
||||
static const struct ddr_data ddr3_evm_data = {
|
||||
.datardsratio0 = MT41J512M8RH125_RD_DQS,
|
||||
.datawdsratio0 = MT41J512M8RH125_WR_DQS,
|
||||
|
|
@ -162,17 +144,6 @@ static const struct cmd_control ddr3_beagleblack_cmd_ctrl_data = {
|
|||
.cmd2iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
|
||||
};
|
||||
|
||||
static const struct cmd_control ddr3_netbird_cmd_ctrl_data = {
|
||||
.cmd0csratio = MT41K256M16HA125E_RATIO,
|
||||
.cmd0iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
|
||||
|
||||
.cmd1csratio = MT41K256M16HA125E_RATIO,
|
||||
.cmd1iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
|
||||
|
||||
.cmd2csratio = MT41K256M16HA125E_RATIO,
|
||||
.cmd2iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
|
||||
};
|
||||
|
||||
static const struct cmd_control ddr3_evm_cmd_ctrl_data = {
|
||||
.cmd0csratio = MT41J512M8RH125_RATIO,
|
||||
.cmd0iclkout = MT41J512M8RH125_INVERT_CLKOUT,
|
||||
|
|
@ -216,16 +187,6 @@ static struct emif_regs ddr3_beagleblack_emif_reg_data = {
|
|||
.emif_ddr_phy_ctlr_1 = MT41K256M16HA125E_EMIF_READ_LATENCY,
|
||||
};
|
||||
|
||||
static struct emif_regs ddr3_netbird_emif_reg_data = {
|
||||
.sdram_config = MT41K256M16HA125E_EMIF_SDCFG,
|
||||
.ref_ctrl = MT41K256M16HA125E_EMIF_SDREF,
|
||||
.sdram_tim1 = 0x0aaae51b, /* From AM335x_DDR_register_calc_tool.xls */
|
||||
.sdram_tim2 = 0x24437fda, /* From AM335x_DDR_register_calc_tool.xls */
|
||||
.sdram_tim3 = 0x50ffe3ff, /* From AM335x_DDR_register_calc_tool.xls */
|
||||
.zq_config = MT41K256M16HA125E_ZQ_CFG,
|
||||
.emif_ddr_phy_ctlr_1 = MT41K256M16HA125E_EMIF_READ_LATENCY,
|
||||
};
|
||||
|
||||
static struct emif_regs ddr3_evm_emif_reg_data = {
|
||||
.sdram_config = MT41J512M8RH125_EMIF_SDCFG,
|
||||
.ref_ctrl = MT41J512M8RH125_EMIF_SDREF,
|
||||
|
|
@ -377,18 +338,6 @@ void am33xx_spl_board_init(void)
|
|||
TPS65217_LDO_VOLTAGE_OUT_3_3,
|
||||
TPS65217_LDO_MASK))
|
||||
puts("tps65217_reg_write failure\n");
|
||||
} else if (board_is_nbhw16()) {
|
||||
/* Set CPU speed to 600 MHZ */
|
||||
dpll_mpu_opp100.m = MPUPLL_M_600;
|
||||
|
||||
/* Set CORE Frequencies to OPP100 */
|
||||
do_setup_dpll(&dpll_core_regs, &dpll_core_opp100);
|
||||
|
||||
/* Clear th PFM Flag on DCDC4 */
|
||||
if (tps65218_reg_write(TPS65218_PROT_LEVEL_2, TPS65218_DCDC4, 0x00, 0x80)) {
|
||||
puts ("tps65218_reg_write failure\n");
|
||||
};
|
||||
|
||||
} else {
|
||||
int sil_rev;
|
||||
|
||||
|
|
@ -437,7 +386,7 @@ const struct dpll_params *get_dpll_ddr_params(void)
|
|||
|
||||
if (board_is_evm_sk())
|
||||
return &dpll_ddr_evm_sk;
|
||||
else if (board_is_bone_lt() || board_is_icev2() || board_is_nbhw16())
|
||||
else if (board_is_bone_lt() || board_is_icev2())
|
||||
return &dpll_ddr_bone_black;
|
||||
else if (board_is_evm_15_or_later())
|
||||
return &dpll_ddr_evm_sk;
|
||||
|
|
@ -486,14 +435,6 @@ const struct ctrl_ioregs ioregs_bonelt = {
|
|||
.dt1ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
|
||||
};
|
||||
|
||||
const struct ctrl_ioregs ioregs_netbird = {
|
||||
.cm0ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
|
||||
.cm1ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
|
||||
.cm2ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
|
||||
.dt0ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
|
||||
.dt1ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
|
||||
};
|
||||
|
||||
const struct ctrl_ioregs ioregs_evm15 = {
|
||||
.cm0ioctl = MT41J512M8RH125_IOCTRL_VALUE,
|
||||
.cm1ioctl = MT41J512M8RH125_IOCTRL_VALUE,
|
||||
|
|
@ -537,11 +478,6 @@ void sdram_init(void)
|
|||
&ddr3_beagleblack_data,
|
||||
&ddr3_beagleblack_cmd_ctrl_data,
|
||||
&ddr3_beagleblack_emif_reg_data, 0);
|
||||
else if (board_is_nbhw16())
|
||||
config_ddr(400, &ioregs_netbird,
|
||||
&ddr3_netbird_data,
|
||||
&ddr3_netbird_cmd_ctrl_data,
|
||||
&ddr3_netbird_emif_reg_data, 0);
|
||||
else if (board_is_evm_15_or_later())
|
||||
config_ddr(303, &ioregs_evm15, &ddr3_evm_data,
|
||||
&ddr3_evm_cmd_ctrl_data, &ddr3_evm_emif_reg_data, 0);
|
||||
|
|
@ -557,23 +493,7 @@ void sdram_init(void)
|
|||
|
||||
#if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \
|
||||
(defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD))
|
||||
|
||||
/**
|
||||
* RMII mode on ICEv2 board needs 50MHz clock. Given the clock
|
||||
* synthesizer With a capacitor of 18pF, and 25MHz input clock cycle
|
||||
* PLL1 gives an output of 100MHz. So, configuring the div2/3 as 2 to
|
||||
* give 50MHz output for Eth0 and 1.
|
||||
*/
|
||||
static struct clk_synth cdce913_data = {
|
||||
.id = 0x81,
|
||||
.capacitor = 0x90,
|
||||
.mux = 0x6d,
|
||||
.pdiv2 = 0x2,
|
||||
.pdiv3 = 0x2,
|
||||
};
|
||||
#endif
|
||||
|
||||
static void request_and_set_gpio(int gpio, char *name, int value)
|
||||
static void request_and_set_gpio(int gpio, char *name)
|
||||
{
|
||||
int ret;
|
||||
|
||||
|
|
@ -589,7 +509,7 @@ static void request_and_set_gpio(int gpio, char *name, int value)
|
|||
goto err_free_gpio;
|
||||
}
|
||||
|
||||
gpio_set_value(gpio, value);
|
||||
gpio_set_value(gpio, 1);
|
||||
|
||||
return;
|
||||
|
||||
|
|
@ -597,8 +517,22 @@ err_free_gpio:
|
|||
gpio_free(gpio);
|
||||
}
|
||||
|
||||
#define REQUEST_AND_SET_GPIO(N) request_and_set_gpio(N, #N, 1);
|
||||
#define REQUEST_AND_CLEAR_GPIO(N) request_and_set_gpio(N, #N, 0);
|
||||
#define REQUEST_AND_SET_GPIO(N) request_and_set_gpio(N, #N);
|
||||
|
||||
/**
|
||||
* RMII mode on ICEv2 board needs 50MHz clock. Given the clock
|
||||
* synthesizer With a capacitor of 18pF, and 25MHz input clock cycle
|
||||
* PLL1 gives an output of 100MHz. So, configuring the div2/3 as 2 to
|
||||
* give 50MHz output for Eth0 and 1.
|
||||
*/
|
||||
static struct clk_synth cdce913_data = {
|
||||
.id = 0x81,
|
||||
.capacitor = 0x90,
|
||||
.mux = 0x6d,
|
||||
.pdiv2 = 0x2,
|
||||
.pdiv3 = 0x2,
|
||||
};
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Basic board specific setup. Pinmux has been handled already.
|
||||
|
|
@ -630,23 +564,6 @@ int board_init(void)
|
|||
}
|
||||
#endif
|
||||
|
||||
if (board_is_nbhw16()) {
|
||||
REQUEST_AND_CLEAR_GPIO(NETBIRD_GPIO_RST_GSM);
|
||||
udelay(10000);
|
||||
REQUEST_AND_SET_GPIO(NETBIRD_GPIO_PWR_GSM);
|
||||
mdelay(1200);
|
||||
gpio_set_value(NETBIRD_GPIO_PWR_GSM, 0);
|
||||
REQUEST_AND_SET_GPIO(NETBIRD_GPIO_LED_A);
|
||||
REQUEST_AND_SET_GPIO(NETBIRD_GPIO_RST_PHY_N);
|
||||
REQUEST_AND_CLEAR_GPIO(NETBIRD_GPIO_WLAN_EN);
|
||||
REQUEST_AND_CLEAR_GPIO(NETBIRD_GPIO_BT_EN);
|
||||
/* There are two funcions on the same mux mode for MMC2_DAT7 we want
|
||||
* to use RMII2_CRS_DV so we need to set SMA2 Register to 1
|
||||
* See SPRS717J site 49 (10)*/
|
||||
#define SMA2_REGISTER (CTRL_BASE + 0x1320)
|
||||
writel(0x01, SMA2_REGISTER); /* Select RMII2_CRS_DV instead of MMC2_DAT7 */
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -720,17 +637,6 @@ static struct cpsw_platform_data cpsw_data = {
|
|||
defined(CONFIG_USB_ETHER) && defined(CONFIG_MUSB_GADGET)) && \
|
||||
!defined(CONFIG_SPL_BUILD))
|
||||
|
||||
static void set_mac_address(int index, uchar mac[6])
|
||||
{
|
||||
/* Then take mac from bd */
|
||||
if (is_valid_ethaddr(mac)) {
|
||||
eth_setenv_enetaddr_by_index("eth", index, mac);
|
||||
}
|
||||
else {
|
||||
printf("No valid MAC found in boarddescriptor");
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* This function will:
|
||||
* Read the eFuse for MAC addresses, and set ethaddr/eth1addr/usbnet_devaddr
|
||||
|
|
@ -745,50 +651,53 @@ static void set_mac_address(int index, uchar mac[6])
|
|||
int board_eth_init(bd_t *bis)
|
||||
{
|
||||
int rv, n = 0;
|
||||
uint8_t mac_addr0[6];
|
||||
uint8_t mac_addr1[6];
|
||||
uint8_t mac_addr[6];
|
||||
uint32_t mac_hi, mac_lo;
|
||||
__maybe_unused struct ti_am_eeprom *header;
|
||||
int boot_partition;
|
||||
|
||||
/* try reading mac address from efuse */
|
||||
mac_lo = readl(&cdev->macid0l);
|
||||
mac_hi = readl(&cdev->macid0h);
|
||||
mac_addr[0] = mac_hi & 0xFF;
|
||||
mac_addr[1] = (mac_hi & 0xFF00) >> 8;
|
||||
mac_addr[2] = (mac_hi & 0xFF0000) >> 16;
|
||||
mac_addr[3] = (mac_hi & 0xFF000000) >> 24;
|
||||
mac_addr[4] = mac_lo & 0xFF;
|
||||
mac_addr[5] = (mac_lo & 0xFF00) >> 8;
|
||||
|
||||
#if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \
|
||||
(defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD))
|
||||
if (!getenv("ethaddr")) {
|
||||
printf("<ethaddr> not set. Validating first E-fuse MAC\n");
|
||||
|
||||
if (is_valid_ethaddr(mac_addr))
|
||||
eth_setenv_enetaddr("ethaddr", mac_addr);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_DRIVER_TI_CPSW
|
||||
|
||||
if (board_is_nbhw16()) {
|
||||
/* Clock should be 2MHz */
|
||||
cpsw_data.mdio_div = 0x3E;
|
||||
mac_lo = readl(&cdev->macid1l);
|
||||
mac_hi = readl(&cdev->macid1h);
|
||||
mac_addr[0] = mac_hi & 0xFF;
|
||||
mac_addr[1] = (mac_hi & 0xFF00) >> 8;
|
||||
mac_addr[2] = (mac_hi & 0xFF0000) >> 16;
|
||||
mac_addr[3] = (mac_hi & 0xFF000000) >> 24;
|
||||
mac_addr[4] = mac_lo & 0xFF;
|
||||
mac_addr[5] = (mac_lo & 0xFF00) >> 8;
|
||||
|
||||
if (!getenv("eth1addr")) {
|
||||
if (is_valid_ethaddr(mac_addr))
|
||||
eth_setenv_enetaddr("eth1addr", mac_addr);
|
||||
}
|
||||
|
||||
if (read_eeprom() < 0)
|
||||
puts("Could not get board ID.\n");
|
||||
|
||||
board_ti_get_eth_mac_addr(0, mac_addr0);
|
||||
board_ti_get_eth_mac_addr(1, mac_addr1);
|
||||
|
||||
set_mac_address(0, mac_addr0);
|
||||
set_mac_address(1, mac_addr1);
|
||||
|
||||
boot_partition = get_boot_partition();
|
||||
if (boot_partition > 1) {
|
||||
boot_partition = 0;
|
||||
}
|
||||
|
||||
/* mmcblk0p1 => u-boot, mmcblk0p2 => root0 so +2 */
|
||||
setenv_ulong("root_part", boot_partition + 2);
|
||||
|
||||
if (board_is_bone() || board_is_bone_lt() ||
|
||||
board_is_idk()) {
|
||||
writel(MII_MODE_ENABLE, &cdev->miisel);
|
||||
cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if =
|
||||
PHY_INTERFACE_MODE_MII;
|
||||
} else if (board_is_nbhw16()) {
|
||||
writel(RMII_MODE_ENABLE | RMII_CHIPCKL_ENABLE, &cdev->miisel);
|
||||
cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_RMII;
|
||||
cpsw_slaves[1].phy_if = PHY_INTERFACE_MODE_RMII;
|
||||
cpsw_slaves[0].phy_addr = 0;
|
||||
cpsw_slaves[1].phy_addr = 1;
|
||||
} else if (board_is_icev2()) {
|
||||
writel(RMII_MODE_ENABLE | RMII_CHIPCKL_ENABLE, &cdev->miisel);
|
||||
cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_RMII;
|
||||
|
|
@ -832,8 +741,8 @@ int board_eth_init(bd_t *bis)
|
|||
#endif
|
||||
#if defined(CONFIG_USB_ETHER) && \
|
||||
(!defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_USBETH_SUPPORT))
|
||||
if (is_valid_ethaddr(mac_addr0))
|
||||
eth_setenv_enetaddr("usbnet_devaddr", mac_addr0);
|
||||
if (is_valid_ethaddr(mac_addr))
|
||||
eth_setenv_enetaddr("usbnet_devaddr", mac_addr);
|
||||
|
||||
rv = usb_eth_initialize(bis);
|
||||
if (rv < 0)
|
||||
|
|
@ -856,8 +765,6 @@ int board_fit_config_name_match(const char *name)
|
|||
return 0;
|
||||
else if (board_is_bone_lt() && !strcmp(name, "am335x-boneblack"))
|
||||
return 0;
|
||||
else if (board_is_nbhw16() && !strcmp(name, "am335x-nbhw16"))
|
||||
return 0;
|
||||
else if (board_is_evm_sk() && !strcmp(name, "am335x-evmsk"))
|
||||
return 0;
|
||||
else if (board_is_bbg1() && !strcmp(name, "am335x-bonegreen"))
|
||||
|
|
|
|||
|
|
@ -21,13 +21,6 @@ static inline int board_is_bone_lt(void)
|
|||
return board_ti_is("A335BNLT");
|
||||
}
|
||||
|
||||
static inline int board_is_nbhw16(void)
|
||||
{
|
||||
/* TODO: make this dynamic */
|
||||
return 1;
|
||||
/*return board_ti_is("NBHW16");*/
|
||||
}
|
||||
|
||||
static inline int board_is_bbg1(void)
|
||||
{
|
||||
return board_is_bone_lt() && !strncmp(board_ti_get_rev(), "BBG1", 4);
|
||||
|
|
|
|||
|
|
@ -106,17 +106,17 @@ static struct module_pin_mux mmc1_pin_mux[] = {
|
|||
|
||||
static struct module_pin_mux i2c0_pin_mux[] = {
|
||||
{OFFSET(i2c0_sda), (MODE(0) | RXACTIVE |
|
||||
PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* I2C_DATA */
|
||||
PULLUDEN | SLEWCTRL)}, /* I2C_DATA */
|
||||
{OFFSET(i2c0_scl), (MODE(0) | RXACTIVE |
|
||||
PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* I2C_SCLK */
|
||||
PULLUDEN | SLEWCTRL)}, /* I2C_SCLK */
|
||||
{-1},
|
||||
};
|
||||
|
||||
static struct module_pin_mux i2c1_pin_mux[] = {
|
||||
{OFFSET(spi0_d1), (MODE(2) | RXACTIVE |
|
||||
PULLUDEN | PULLUP_EN| SLEWCTRL)}, /* I2C_DATA */
|
||||
PULLUDEN | SLEWCTRL)}, /* I2C_DATA */
|
||||
{OFFSET(spi0_cs0), (MODE(2) | RXACTIVE |
|
||||
PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* I2C_SCLK */
|
||||
PULLUDEN | SLEWCTRL)}, /* I2C_SCLK */
|
||||
{-1},
|
||||
};
|
||||
|
||||
|
|
@ -262,98 +262,6 @@ static struct module_pin_mux uart3_icev2_pin_mux[] = {
|
|||
{-1},
|
||||
};
|
||||
|
||||
static struct module_pin_mux uart0_netbird_pin_mux[] = {
|
||||
{OFFSET(uart0_rxd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* UART0_RXD */
|
||||
{OFFSET(uart0_txd), (MODE(0) | PULLUDEN | PULLUP_EN)}, /* UART0_TXD */
|
||||
{-1},
|
||||
};
|
||||
|
||||
static struct module_pin_mux uart1_netbird_pin_mux[] = {
|
||||
{OFFSET(uart1_rxd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (D16) uart1_rxd.uart1_rxd */
|
||||
{OFFSET(uart1_txd), (MODE(0) | PULLUDEN | PULLUP_EN)}, /* (D15) uart1_txd.uart1_txd */
|
||||
{OFFSET(uart1_ctsn), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (D18) uart1_ctsn.uart1_ctsn */
|
||||
{OFFSET(uart1_rtsn), (MODE(0) | PULLUDEN | PULLUP_EN)}, /* (D17) uart1_rtsn.uart1_rtsn */
|
||||
{-1},
|
||||
};
|
||||
|
||||
static struct module_pin_mux rmii0_netbird_pin_mux[] = {
|
||||
{OFFSET(mii1_crs), MODE(1) | PULLUDDIS | RXACTIVE}, /* MII1_CRS */
|
||||
{OFFSET(mii1_rxerr), MODE(1) | PULLUDDIS | RXACTIVE}, /* MII1_RXERR */
|
||||
{OFFSET(mii1_txen), MODE(1) | PULLUDDIS }, /* MII1_TXEN */
|
||||
{OFFSET(mii1_txd0), MODE(1) | PULLUDDIS }, /* MII1_TXD0 */
|
||||
{OFFSET(mii1_txd1), MODE(1) | PULLUDDIS }, /* MII1_TXD1 */
|
||||
{OFFSET(mii1_rxd0), MODE(1) | PULLUDDIS | RXACTIVE }, /* MII1_RXD0 */
|
||||
{OFFSET(mii1_rxd1), MODE(1) | PULLUDDIS | RXACTIVE }, /* MII1_RXD1 */
|
||||
{OFFSET(rmii1_refclk), MODE(0) | PULLUDDIS | RXACTIVE}, /* RMII1_REFCLK */
|
||||
{OFFSET(mdio_clk), MODE(0) | PULLUDDIS }, /* MDIO_CLK */
|
||||
{OFFSET(mdio_data), MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE }, /* MDIO_DATA */
|
||||
{-1},
|
||||
};
|
||||
|
||||
static struct module_pin_mux rmii1_netbird_pin_mux[] = {
|
||||
{OFFSET(gpmc_a9), MODE(3) | PULLUDDIS | RXACTIVE}, /* MII2_CRS */
|
||||
{OFFSET(gpmc_wpn), MODE(3) | PULLUDDIS | RXACTIVE}, /* MII2_RXERR */
|
||||
{OFFSET(gpmc_a0), MODE(3) | PULLUDDIS}, /* MII2_TXEN */
|
||||
{OFFSET(gpmc_a5), MODE(3) | PULLUDDIS}, /* MII2_TXD0 */
|
||||
{OFFSET(gpmc_a4), MODE(3) | PULLUDDIS}, /* MII2_TXD1 */
|
||||
{OFFSET(gpmc_a11), MODE(3) | PULLUDDIS | RXACTIVE}, /* MII1_RXD0 */
|
||||
{OFFSET(gpmc_a10), MODE(3) | PULLUDDIS | RXACTIVE}, /* MII1_RXD1 */
|
||||
{OFFSET(mii1_col), MODE(1) | PULLUDDIS | RXACTIVE}, /* RMII1_REFCLK */
|
||||
{-1},
|
||||
};
|
||||
|
||||
static struct module_pin_mux mmc0_sdio_netbird_pin_mux[] = {
|
||||
{OFFSET(mmc0_clk), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* MMC0_CLK */
|
||||
{OFFSET(mmc0_cmd), (MODE(0) | PULLUDEN | PULLUP_EN)}, /* MMC0_CMD */
|
||||
{OFFSET(mmc0_dat0), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE )}, /* MMC0_DAT0 */
|
||||
{OFFSET(mmc0_dat1), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE )}, /* MMC0_DAT1 */
|
||||
{OFFSET(mmc0_dat2), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE )}, /* MMC0_DAT2 */
|
||||
{OFFSET(mmc0_dat3), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE )}, /* MMC0_DAT3 */
|
||||
{-1},
|
||||
};
|
||||
|
||||
static struct module_pin_mux mmc1_emmc_netbird_pin_mux[] = {
|
||||
{OFFSET(gpmc_csn1), (MODE(2) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* MMC1_CLK */
|
||||
{OFFSET(gpmc_csn2), (MODE(2) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* MMC1_CMD */
|
||||
{OFFSET(gpmc_ad0), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE )}, /* MMC1_DAT0 */
|
||||
{OFFSET(gpmc_ad1), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE )}, /* MMC1_DAT1 */
|
||||
{OFFSET(gpmc_ad2), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE )}, /* MMC1_DAT2 */
|
||||
{OFFSET(gpmc_ad3), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE )}, /* MMC1_DAT3 */
|
||||
{OFFSET(gpmc_ad4), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE )}, /* MMC1_DAT3 */
|
||||
{OFFSET(gpmc_ad5), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE )}, /* MMC1_DAT3 */
|
||||
{OFFSET(gpmc_ad6), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE )}, /* MMC1_DAT3 */
|
||||
{OFFSET(gpmc_ad7), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE )}, /* MMC1_DAT3 */
|
||||
{-1},
|
||||
};
|
||||
|
||||
static struct module_pin_mux gpio_netbird_pin_mux[] = {
|
||||
/* Bank 0 */
|
||||
{OFFSET(ecap0_in_pwm0_out), (MODE(7) | PULLUDDIS | RXACTIVE)}, /* (C18) eCAP0_in_PWM0_out.gpio0[7] */ /* PWM */
|
||||
{OFFSET(mii1_txd3), (MODE(7) | PULLUDDIS)}, /* (J18) gmii1_txd3.gpio0[16] */ /* RST_PHY~ */
|
||||
{OFFSET(gpmc_ad11), (MODE(7) | PULLUDDIS)}, /* (U12) gpmc_ad11.gpio0[27] */ /* RST_EXT~ */
|
||||
/* Bank 1 */
|
||||
{OFFSET(gpmc_ad13), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (R12) gpmc_ad13.gpio1[13] */ /* BUTTON */
|
||||
{OFFSET(gpmc_ad14), (MODE(7) | PULLUDDIS)}, /* (V13) gpmc_ad14.gpio1[14] */ /* LED_A */
|
||||
{OFFSET(gpmc_ad15), (MODE(7) | PULLUDDIS)}, /* (U13) gpmc_ad15.gpio1[15] */ /* LED_B */
|
||||
{OFFSET(gpmc_a6), (MODE(7) | PULLUDDIS)}, /* (U15) gpmc_a6.gpio1[22] */ /* GSM_PWR_EN */
|
||||
{OFFSET(gpmc_a8), (MODE(7) | PULLUDDIS)}, /* (V16) gpmc_a8.gpio1[24] */ /* RST_GSM~ */
|
||||
/* Bank 2 */
|
||||
{OFFSET(lcd_pclk), (MODE(7) | PULLUDDIS)}, /* (V5) lcd_pclk.gpio2[24] */ /* EN_GPS_ANT */
|
||||
{OFFSET(lcd_data3), (MODE(7) | PULLUDEN| PULLUP_EN)}, /* (V5) lcd_pclk.gpio2[9] */ /* SYSBOOT */
|
||||
{OFFSET(lcd_data4), (MODE(7) | PULLUDEN| PULLUP_EN)}, /* (V5) lcd_pclk.gpio2[10] */ /* SYSBOOT */
|
||||
/* Bank 3 */
|
||||
{OFFSET(mii1_rxdv), (MODE(7) | PULLUDDIS)}, /* (J17) gmii1_rxdv.gpio3[4] */ /* BT_EN */
|
||||
{OFFSET(mii1_rxdv), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (K18) gmii1_txclk.gpio3[9] */ /* WLAN_IRQ */
|
||||
{OFFSET(mii1_rxdv), (MODE(7) | PULLUDDIS)}, /* (L18) gmii1_rxclk.gpio3[10] */ /* WLAN_EN */
|
||||
{-1},
|
||||
};
|
||||
|
||||
static struct module_pin_mux usb_netbird_pin_mux[] = {
|
||||
{OFFSET(usb0_drvvbus), (MODE(0) | PULLUDEN | PULLDOWN_EN)}, /* (F16) USB0_DRVVBUS.USB0_DRVVBUS */ /* PWM */
|
||||
{OFFSET(usb1_drvvbus), (MODE(0) | PULLUDDIS | PULLDOWN_EN)}, /* (F15) USB1_DRVVBUS.USB1_DRVVBUS */ /* RST_PHY~ */
|
||||
{-1},
|
||||
};
|
||||
|
||||
#if defined(CONFIG_NOR_BOOT)
|
||||
void enable_norboot_pin_mux(void)
|
||||
{
|
||||
|
|
@ -363,20 +271,12 @@ void enable_norboot_pin_mux(void)
|
|||
|
||||
void enable_uart0_pin_mux(void)
|
||||
{
|
||||
if (board_is_nbhw16()) {
|
||||
configure_module_pin_mux(uart0_netbird_pin_mux);
|
||||
} else {
|
||||
configure_module_pin_mux(uart0_pin_mux);
|
||||
}
|
||||
}
|
||||
|
||||
void enable_uart1_pin_mux(void)
|
||||
{
|
||||
if (board_is_nbhw16()) {
|
||||
configure_module_pin_mux(uart1_netbird_pin_mux);
|
||||
} else {
|
||||
configure_module_pin_mux(uart1_pin_mux);
|
||||
}
|
||||
}
|
||||
|
||||
void enable_uart2_pin_mux(void)
|
||||
|
|
@ -490,14 +390,6 @@ void enable_board_pin_mux(void)
|
|||
#else
|
||||
configure_module_pin_mux(mmc1_pin_mux);
|
||||
#endif
|
||||
} else if (board_is_nbhw16()) {
|
||||
/* Netbird board */
|
||||
configure_module_pin_mux(gpio_netbird_pin_mux);
|
||||
configure_module_pin_mux(rmii0_netbird_pin_mux);
|
||||
configure_module_pin_mux(rmii1_netbird_pin_mux);
|
||||
configure_module_pin_mux(mmc0_sdio_netbird_pin_mux);
|
||||
configure_module_pin_mux(mmc1_emmc_netbird_pin_mux);
|
||||
configure_module_pin_mux(usb_netbird_pin_mux);
|
||||
} else if (board_is_icev2()) {
|
||||
configure_module_pin_mux(mmc0_pin_mux);
|
||||
configure_module_pin_mux(gpio0_18_pin_mux);
|
||||
|
|
|
|||
|
|
@ -4,4 +4,3 @@
|
|||
#
|
||||
|
||||
obj-${CONFIG_TI_I2C_BOARD_DETECT} += board_detect.o
|
||||
obj-${CONFIG_TARGET_AM335X_NETBIRD} += bdparser.o board_detect_netbird.o
|
||||
|
|
|
|||
|
|
@ -267,8 +267,6 @@ board_ti_get_eth_mac_addr(int index,
|
|||
if (index < 0 || index >= TI_EEPROM_HDR_NO_OF_MAC_ADDR)
|
||||
goto fail;
|
||||
|
||||
printf("Get MAC from bd\n");
|
||||
|
||||
memcpy(mac_addr, ep->mac_addr[index], TI_EEPROM_HDR_ETH_ALEN);
|
||||
return;
|
||||
|
||||
|
|
|
|||
|
|
@ -193,7 +193,4 @@ u64 board_ti_get_emif2_size(void);
|
|||
*/
|
||||
void set_board_info_env(char *name);
|
||||
|
||||
/* Get the active boot partition 0 - ... */
|
||||
u8 get_boot_partition(void);
|
||||
|
||||
#endif /* __BOARD_DETECT_H */
|
||||
|
|
|
|||
|
|
@ -1,301 +0,0 @@
|
|||
/*
|
||||
* Library to support early TI EVM EEPROM handling
|
||||
*
|
||||
* Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/
|
||||
* Lokesh Vutla
|
||||
* Steve Kipisz
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/omap_common.h>
|
||||
#include <i2c.h>
|
||||
#include <malloc.h>
|
||||
|
||||
#include "board_detect.h"
|
||||
#include "bdparser.h"
|
||||
|
||||
#define SYSINFO_ADDRESS 0x0000 /* Board descriptor at beginning of EEPROM */
|
||||
#define SYSCONFIG_ADDRESS 0x0600 /* Board descriptor at beginning of EEPROM */
|
||||
#define MAX_PARTITION_ENTRIES 4
|
||||
|
||||
static struct ti_common_eeprom bd_mirror;
|
||||
|
||||
static BD_Context *bd_board_info = 0;
|
||||
static BD_Context *bd_system_config = 0;
|
||||
|
||||
static u8 boot_partition = 0;
|
||||
|
||||
/**
|
||||
* ti_i2c_eeprom_init - Initialize an i2c bus and probe for a device
|
||||
* @i2c_bus: i2c bus number to initialize
|
||||
* @dev_addr: Device address to probe for
|
||||
*
|
||||
* Return: 0 on success or corresponding error on failure.
|
||||
*/
|
||||
static int __maybe_unused ti_i2c_eeprom_init(int i2c_bus, int dev_addr)
|
||||
{
|
||||
int rc;
|
||||
|
||||
if (i2c_bus >= 0) {
|
||||
rc = i2c_set_bus_num(i2c_bus);
|
||||
if (rc)
|
||||
return rc;
|
||||
}
|
||||
|
||||
return i2c_probe(dev_addr);
|
||||
}
|
||||
|
||||
/**
|
||||
* ti_i2c_eeprom_read - Read data from an EEPROM
|
||||
* @dev_addr: The device address of the EEPROM
|
||||
* @offset: Offset to start reading in the EEPROM
|
||||
* @ep: Pointer to a buffer to read into
|
||||
* @epsize: Size of buffer
|
||||
*
|
||||
* Return: 0 on success or corresponding result of i2c_read
|
||||
*/
|
||||
static int __maybe_unused ti_i2c_eeprom_read(int dev_addr, int offset,
|
||||
uchar *ep, int epsize)
|
||||
{
|
||||
return i2c_read(dev_addr, offset, 2, ep, epsize);
|
||||
}
|
||||
|
||||
static int i2c_eeprom_read(int offset, void *data, size_t len)
|
||||
{
|
||||
return i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR,
|
||||
offset,
|
||||
CONFIG_SYS_I2C_EEPROM_ADDR_LEN,
|
||||
data,
|
||||
len);
|
||||
}
|
||||
|
||||
static int boardinfo_read(BD_Context **context, size_t start_addr)
|
||||
{
|
||||
char bd_header_buffer[8];
|
||||
void *bd_data = NULL;
|
||||
|
||||
// TODO read from real eeprom
|
||||
if(*context)
|
||||
return 0;
|
||||
|
||||
*context = calloc(sizeof(BD_Context), 1);
|
||||
if(!*context)
|
||||
{
|
||||
printf("Couldn't allocate memory for board information\n");
|
||||
goto failed;
|
||||
}
|
||||
|
||||
if (i2c_eeprom_read(start_addr, bd_header_buffer, sizeof(bd_header_buffer))) {
|
||||
printf("%s() Can't read BD header from EEPROM\n", __FUNCTION__);
|
||||
goto failed;
|
||||
}
|
||||
|
||||
if (!BD_CheckHeader(*context, bd_header_buffer))
|
||||
{
|
||||
printf("Invalid board information header\n");
|
||||
goto failed;
|
||||
}
|
||||
|
||||
bd_data = malloc((*context)->size);
|
||||
if (bd_data == NULL)
|
||||
{
|
||||
printf("Can not allocate memory for board info");
|
||||
goto failed;
|
||||
}
|
||||
|
||||
if (i2c_eeprom_read(start_addr + sizeof(bd_header_buffer), bd_data, (*context)->size))
|
||||
{
|
||||
printf("Can not read board information data");
|
||||
goto failed;
|
||||
}
|
||||
|
||||
if (!BD_ImportData(*context, bd_data))
|
||||
{
|
||||
printf("Invalid board information!\n");
|
||||
goto failed;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
failed:
|
||||
if (bd_data != NULL)
|
||||
{
|
||||
free(bd_data);
|
||||
bd_data = NULL;
|
||||
}
|
||||
|
||||
if (*context != NULL)
|
||||
{
|
||||
free(*context);
|
||||
*context = NULL;
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
void read_sysinfo(void)
|
||||
{
|
||||
u8 bdHwVer = 0;
|
||||
u8 bdHwRev = 0;
|
||||
int err;
|
||||
int i;
|
||||
int j;
|
||||
|
||||
err = boardinfo_read(&bd_board_info, SYSINFO_ADDRESS);
|
||||
if (err ) {
|
||||
printf("Could not read sysinf boarddescriptor\n");
|
||||
goto do_fake_bd;
|
||||
}
|
||||
|
||||
/* Hardware version/revision */
|
||||
if ( !BD_GetUInt8( bd_board_info, BD_Hw_Ver, 0, &bdHwVer) ) {
|
||||
printf("%s() no Hw Version found\n", __FUNCTION__);
|
||||
}
|
||||
/* Hardware version/revision */
|
||||
if ( !BD_GetUInt8( bd_board_info, BD_Hw_Rel, 0, &bdHwRev) ) {
|
||||
printf("%s() no Hw Release found\n", __FUNCTION__);
|
||||
}
|
||||
snprintf(bd_mirror.version, sizeof(bd_mirror.version), "%d,%d", bdHwVer, bdHwRev);
|
||||
|
||||
/* MAC address */
|
||||
memset(bd_mirror.mac_addr, 0x00, TI_EEPROM_HDR_NO_OF_MAC_ADDR * TI_EEPROM_HDR_ETH_ALEN);
|
||||
for (i=0; i<TI_EEPROM_HDR_NO_OF_MAC_ADDR; i++) {
|
||||
u8 mac[6];
|
||||
BD_GetMAC( bd_board_info, BD_Eth_Mac, i, mac);
|
||||
/* Convert nm MAC to TI MAC */
|
||||
for (j=0; j<6; j++){
|
||||
bd_mirror.mac_addr[i][j] = mac[j];
|
||||
}
|
||||
}
|
||||
|
||||
return;
|
||||
|
||||
do_fake_bd:
|
||||
printf("%s() do fake boarddescriptor\n", __FUNCTION__);
|
||||
/* Fill in dummy mac addresses to get u-boot working without valid BD */
|
||||
memset(bd_mirror.mac_addr, 0x00, TI_EEPROM_HDR_NO_OF_MAC_ADDR * TI_EEPROM_HDR_ETH_ALEN);
|
||||
bd_mirror.mac_addr[0][5] = 1;
|
||||
bd_mirror.mac_addr[1][5] = 2;
|
||||
}
|
||||
|
||||
void try_partition_read(void)
|
||||
{
|
||||
BD_PartitionEntry64 partition;
|
||||
int i;
|
||||
int rc;
|
||||
int partition_count = 0;
|
||||
|
||||
for (i = 0; i < MAX_PARTITION_ENTRIES; i++)
|
||||
{
|
||||
rc = BD_GetPartition64( bd_system_config, BD_Partition64, i, &partition );
|
||||
if (rc) {
|
||||
partition_count++;
|
||||
if (((partition.flags & BD_Partition_Flags_Active) != 0) &&
|
||||
(i > 0)) {
|
||||
boot_partition = i - 1; /* The first one is a dummy partition for u-boot */
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if (partition_count < 1)
|
||||
{
|
||||
printf("ERROR: Too few partitions defined\n");
|
||||
}
|
||||
|
||||
printf("Found %d partitions\n", partition_count);
|
||||
}
|
||||
|
||||
void read_sysconfig(void)
|
||||
{
|
||||
int err;
|
||||
u8 boot_part;
|
||||
|
||||
err = boardinfo_read(&bd_system_config, SYSCONFIG_ADDRESS);
|
||||
if (err ) {
|
||||
printf("Could not read sysconfig boarddescriptor\n");
|
||||
}
|
||||
|
||||
/* If we have a new Bootpartition entry take this as boot part */
|
||||
if ( BD_GetUInt8( bd_system_config, BD_BootPart, 0, &boot_part) ) {
|
||||
if (boot_part >= 0 && boot_part <= 1) {
|
||||
boot_partition = boot_part;
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
/* If we not have a Bootpartition entry, perhaps we have a partition table */
|
||||
try_partition_read();
|
||||
}
|
||||
|
||||
int __maybe_unused ti_i2c_eeprom_am_get(int bus_addr, int dev_addr)
|
||||
{
|
||||
if (bd_mirror.header == TI_EEPROM_HEADER_MAGIC)
|
||||
return 0;
|
||||
|
||||
read_sysinfo();
|
||||
read_sysconfig();
|
||||
|
||||
bd_mirror.header = TI_EEPROM_HEADER_MAGIC;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
bool __maybe_unused board_ti_is(char *name_tag)
|
||||
{
|
||||
if (bd_mirror.header == TI_DEAD_EEPROM_MAGIC)
|
||||
return false;
|
||||
return !strncmp(bd_mirror.name, name_tag, TI_EEPROM_HDR_NAME_LEN);
|
||||
}
|
||||
|
||||
char * __maybe_unused board_ti_get_rev(void)
|
||||
{
|
||||
if (bd_mirror.header == TI_DEAD_EEPROM_MAGIC)
|
||||
return NULL;
|
||||
|
||||
return bd_mirror.version;
|
||||
}
|
||||
|
||||
char * __maybe_unused board_ti_get_config(void)
|
||||
{
|
||||
if (bd_mirror.header == TI_DEAD_EEPROM_MAGIC)
|
||||
return NULL;
|
||||
|
||||
return bd_mirror.config;
|
||||
}
|
||||
|
||||
char * __maybe_unused board_ti_get_name(void)
|
||||
{
|
||||
if (bd_mirror.header == TI_DEAD_EEPROM_MAGIC)
|
||||
return NULL;
|
||||
|
||||
return bd_mirror.name;
|
||||
}
|
||||
|
||||
void __maybe_unused set_board_info_env(char *name)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
void __maybe_unused
|
||||
board_ti_get_eth_mac_addr(int index,
|
||||
u8 mac_addr[TI_EEPROM_HDR_ETH_ALEN])
|
||||
{
|
||||
if (bd_mirror.header == TI_DEAD_EEPROM_MAGIC)
|
||||
goto fail;
|
||||
|
||||
if (index < 0 || index >= TI_EEPROM_HDR_NO_OF_MAC_ADDR)
|
||||
goto fail;
|
||||
|
||||
memcpy(mac_addr, bd_mirror.mac_addr[index], TI_EEPROM_HDR_ETH_ALEN);
|
||||
return;
|
||||
|
||||
fail:
|
||||
memset(mac_addr, 0, TI_EEPROM_HDR_ETH_ALEN);
|
||||
}
|
||||
|
||||
u8 get_boot_partition(void)
|
||||
{
|
||||
return boot_partition;
|
||||
}
|
||||
|
|
@ -38,45 +38,6 @@
|
|||
#define V_OSCK 24000000 /* Clock output from T2 */
|
||||
#define V_SCLK (V_OSCK)
|
||||
|
||||
/* Custom script for NOR */
|
||||
#define CONFIG_SYS_LDSCRIPT "board/ti/am335x/u-boot.lds"
|
||||
|
||||
/* Enhance our eMMC support / experience. */
|
||||
#define CONFIG_CMD_GPT
|
||||
#define CONFIG_EFI_PARTITION
|
||||
|
||||
#define NANDARGS ""
|
||||
|
||||
#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
|
||||
|
||||
#define BOOTENV_DEV_LEGACY_MMC(devtypeu, devtypel, instance) \
|
||||
"bootcmd_" #devtypel #instance "=" \
|
||||
"setenv mmcdev " #instance"; "\
|
||||
"setenv bootpart " #instance":2 ; "\
|
||||
"run mmcboot\0"
|
||||
|
||||
#define BOOTENV_DEV_NAME_LEGACY_MMC(devtypeu, devtypel, instance) \
|
||||
#devtypel #instance " "
|
||||
|
||||
#define BOOTENV_DEV_NAND(devtypeu, devtypel, instance) \
|
||||
"bootcmd_" #devtypel "=" \
|
||||
"run nandboot\0"
|
||||
|
||||
#define BOOTENV_DEV_NAME_NAND(devtypeu, devtypel, instance) \
|
||||
#devtypel #instance " "
|
||||
|
||||
#define BOOT_TARGET_DEVICES(func) \
|
||||
func(MMC, mmc, 0) \
|
||||
func(LEGACY_MMC, legacy_mmc, 0) \
|
||||
func(MMC, mmc, 1) \
|
||||
func(LEGACY_MMC, legacy_mmc, 1) \
|
||||
func(NAND, nand, 0) \
|
||||
func(PXE, pxe, na) \
|
||||
func(DHCP, dhcp, na)
|
||||
|
||||
#define CONFIG_BOOTCOMMAND \
|
||||
"run emmcboot"
|
||||
|
||||
#include <config_distro_bootcmd.h>
|
||||
|
||||
#ifndef CONFIG_SPL_BUILD
|
||||
|
|
@ -124,77 +85,22 @@
|
|||
#define CONFIG_ENV_IS_IN_EEPROM
|
||||
#define CONFIG_ENV_OFFSET 0x1000 /* The Environment is located at 4k */
|
||||
#define CONFIG_ENV_SIZE 0x800 /* The maximum size is 2k */
|
||||
#undef CONFIG_SPL_ENV_SUPPORT
|
||||
#undef CONFIG_SPL_NAND_SUPPORT
|
||||
#undef CONFIG_SPL_ONENAND_SUPPORT
|
||||
|
||||
|
||||
/* We need to disable SPI to not confuse the eeprom env driver */
|
||||
#undef CONFIG_SPI
|
||||
#undef CONFIG_SPI_BOOT
|
||||
#undef CONFIG_SPL_OS_BOOT
|
||||
|
||||
/* SPL */
|
||||
#ifndef CONFIG_NOR_BOOT
|
||||
#define CONFIG_SPL_POWER_SUPPORT
|
||||
#define CONFIG_SPL_YMODEM_SUPPORT
|
||||
|
||||
/* USB gadget RNDIS */
|
||||
#define CONFIG_SPL_MUSB_NEW_SUPPORT
|
||||
|
||||
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds"
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_NAND
|
||||
/* NAND: device related configs */
|
||||
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
|
||||
#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
|
||||
CONFIG_SYS_NAND_PAGE_SIZE)
|
||||
#define CONFIG_SYS_NAND_PAGE_SIZE 2048
|
||||
#define CONFIG_SYS_NAND_OOBSIZE 64
|
||||
#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
|
||||
/* NAND: driver related configs */
|
||||
#define CONFIG_NAND_OMAP_GPMC
|
||||
#define CONFIG_NAND_OMAP_GPMC_PREFETCH
|
||||
#define CONFIG_NAND_OMAP_ELM
|
||||
#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
|
||||
#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
|
||||
10, 11, 12, 13, 14, 15, 16, 17, \
|
||||
18, 19, 20, 21, 22, 23, 24, 25, \
|
||||
26, 27, 28, 29, 30, 31, 32, 33, \
|
||||
34, 35, 36, 37, 38, 39, 40, 41, \
|
||||
42, 43, 44, 45, 46, 47, 48, 49, \
|
||||
50, 51, 52, 53, 54, 55, 56, 57, }
|
||||
|
||||
#define CONFIG_SYS_NAND_ECCSIZE 512
|
||||
#define CONFIG_SYS_NAND_ECCBYTES 14
|
||||
#define CONFIG_SYS_NAND_ONFI_DETECTION
|
||||
#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW
|
||||
#define MTDIDS_DEFAULT "nand0=nand.0"
|
||||
#define MTDPARTS_DEFAULT "mtdparts=nand.0:" \
|
||||
"128k(NAND.SPL)," \
|
||||
"128k(NAND.SPL.backup1)," \
|
||||
"128k(NAND.SPL.backup2)," \
|
||||
"128k(NAND.SPL.backup3)," \
|
||||
"256k(NAND.u-boot-spl-os)," \
|
||||
"1m(NAND.u-boot)," \
|
||||
"128k(NAND.u-boot-env)," \
|
||||
"128k(NAND.u-boot-env.backup1)," \
|
||||
"8m(NAND.kernel)," \
|
||||
"-(NAND.file-system)"
|
||||
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x000c0000
|
||||
/* NAND: SPL related configs */
|
||||
#ifdef CONFIG_SPL_NAND_SUPPORT
|
||||
#define CONFIG_SPL_NAND_AM33XX_BCH
|
||||
#endif
|
||||
#ifdef CONFIG_SPL_OS_BOOT
|
||||
#define CONFIG_CMD_SPL_NAND_OFS 0x00080000 /* os parameters */
|
||||
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */
|
||||
#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
|
||||
#endif
|
||||
#endif /* !CONFIG_NAND */
|
||||
|
||||
/*
|
||||
* For NOR boot, we must set this to the start of where NOR is mapped
|
||||
* in memory.
|
||||
*/
|
||||
#ifdef CONFIG_NOR_BOOT
|
||||
#define CONFIG_SYS_TEXT_BASE 0x08000000
|
||||
#endif
|
||||
#define CONFIG_SUPPORT_EMMC_BOOT
|
||||
|
||||
/*
|
||||
* USB configuration. We enable MUSB support, both for host and for
|
||||
|
|
@ -212,7 +118,6 @@
|
|||
#define CONFIG_AM335X_USB1
|
||||
#define CONFIG_AM335X_USB1_MODE MUSB_HOST
|
||||
|
||||
#ifndef CONFIG_SPL_USBETH_SUPPORT
|
||||
/* Fastboot */
|
||||
#define CONFIG_USB_FUNCTION_FASTBOOT
|
||||
#define CONFIG_CMD_FASTBOOT
|
||||
|
|
@ -223,7 +128,6 @@
|
|||
/* To support eMMC booting */
|
||||
#define CONFIG_STORAGE_EMMC
|
||||
#define CONFIG_FASTBOOT_FLASH_MMC_DEV 1
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_USB_MUSB_HOST
|
||||
#define CONFIG_USB_STORAGE
|
||||
|
|
@ -247,21 +151,12 @@
|
|||
#undef CONFIG_TIMER
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_USBETH_SUPPORT)
|
||||
#if defined(CONFIG_SPL_BUILD)
|
||||
/* Remove other SPL modes. */
|
||||
#undef CONFIG_SPL_YMODEM_SUPPORT
|
||||
#undef CONFIG_SPL_NAND_SUPPORT
|
||||
#undef CONFIG_SPL_MMC_SUPPORT
|
||||
#define CONFIG_ENV_IS_NOWHERE
|
||||
#undef CONFIG_ENV_IS_IN_NAND
|
||||
/* disable host part of MUSB in SPL */
|
||||
/* disable EFI partitions and partition UUID support */
|
||||
#undef CONFIG_PARTITION_UUIDS
|
||||
#undef CONFIG_EFI_PARTITION
|
||||
/* General network SPL */
|
||||
#define CONFIG_SPL_NET_SUPPORT
|
||||
#define CONFIG_SPL_ENV_SUPPORT
|
||||
#define CONFIG_SPL_NET_VCI_STRING "AM335x U-Boot SPL"
|
||||
#endif
|
||||
|
||||
/* USB Device Firmware Update support */
|
||||
|
|
@ -281,21 +176,7 @@
|
|||
"spl-os-image fat 0 1;" \
|
||||
"u-boot.img fat 0 1;" \
|
||||
"uEnv.txt fat 0 1\0"
|
||||
#ifdef CONFIG_NAND
|
||||
#define CONFIG_DFU_NAND
|
||||
#define DFU_ALT_INFO_NAND \
|
||||
"dfu_alt_info_nand=" \
|
||||
"SPL part 0 1;" \
|
||||
"SPL.backup1 part 0 2;" \
|
||||
"SPL.backup2 part 0 3;" \
|
||||
"SPL.backup3 part 0 4;" \
|
||||
"u-boot part 0 5;" \
|
||||
"u-boot-spl-os part 0 6;" \
|
||||
"kernel part 0 8;" \
|
||||
"rootfs part 0 9\0"
|
||||
#else
|
||||
#define DFU_ALT_INFO_NAND ""
|
||||
#endif
|
||||
#define CONFIG_DFU_RAM
|
||||
#define DFU_ALT_INFO_RAM \
|
||||
"dfu_alt_info_ram=" \
|
||||
|
|
@ -314,33 +195,6 @@
|
|||
#define CONFIG_PHYLIB
|
||||
#define CONFIG_PHY_SMSC
|
||||
|
||||
/*
|
||||
* NOR Size = 16 MiB
|
||||
* Number of Sectors/Blocks = 128
|
||||
* Sector Size = 128 KiB
|
||||
* Word length = 16 bits
|
||||
* Default layout:
|
||||
* 0x000000 - 0x07FFFF : U-Boot (512 KiB)
|
||||
* 0x080000 - 0x09FFFF : First copy of U-Boot Environment (128 KiB)
|
||||
* 0x0A0000 - 0x0BFFFF : Second copy of U-Boot Environment (128 KiB)
|
||||
* 0x0C0000 - 0x4BFFFF : Linux Kernel (4 MiB)
|
||||
* 0x4C0000 - 0xFFFFFF : Userland (11 MiB + 256 KiB)
|
||||
*/
|
||||
#if defined(CONFIG_NOR)
|
||||
#undef CONFIG_SYS_NO_FLASH
|
||||
#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
|
||||
#define CONFIG_SYS_FLASH_PROTECTION
|
||||
#define CONFIG_SYS_FLASH_CFI
|
||||
#define CONFIG_FLASH_CFI_DRIVER
|
||||
#define CONFIG_FLASH_CFI_MTD
|
||||
#define CONFIG_SYS_MAX_FLASH_SECT 128
|
||||
#define CONFIG_SYS_MAX_FLASH_BANKS 1
|
||||
#define CONFIG_SYS_FLASH_BASE (0x08000000)
|
||||
#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
|
||||
#define CONFIG_SYS_FLASH_SIZE 0x01000000
|
||||
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
|
||||
#endif /* NOR support */
|
||||
|
||||
#ifdef CONFIG_DRIVER_TI_CPSW
|
||||
#define CONFIG_CLOCK_SYNTHESIZER
|
||||
#define CLK_SYNTHESIZER_I2C_ADDR 0x65
|
||||
|
|
|
|||
Loading…
Reference in New Issue