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Revert "spi: cadence-qspi: Fix PHY calibration for SPL" 

This reverts commit 2ad56641d2.

It causes a build break for at least am65x_hs_evm_r5_defconfig, due to
SPL size exceeding limits. Revert it till we can fix cleanly.

Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
This commit is contained in:
Anand Gadiyar 2022-07-05 10:27:26 -05:00
parent 2ad56641d2
commit e46b2925fc
1 changed files with 1 additions and 1 deletions
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2
drivers/spi/cadence_qspi.c
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@ -893,7 +893,7 @@ static void cadence_spi_mem_do_calibration(struct spi_slave *spi,
struct cadence_spi_platdata *plat = bus->platdata;
int ret;
if (!IS_ENABLED(CONFIG_CADENCE_QSPI_PHY) || !plat->has_phy)
if (!CONFIG_IS_ENABLED(CADENCE_QSPI_PHY) || !plat->has_phy)
return;
plat->phy_read_op = *op;