I copy pasted some content from other binman files and included
k3-binman.dtsi
Current problem is that the common dtsi from TI are looking for files in
board/ti, so I had to copy or symlink them to board/nm to have it build:
- board/nm/am64x => already present, some files were copied from
board/ti/am64x
- board/nm/common => copy from board/ti/common
- board/nm/keys => symlink to board/ti/keys
Build command:
make -j 20 ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- O=r5 BL31=../arm-trusted-firmware/build/k3/lite/release/bl31.bin TEE=../ti-optee-os/out/arm-plat-k3/core/tee-pager_v2.bin BINMAN_INDIRS="../a53 ../../ti-linux-firmware
Size of malloc was standardized to 2M for all am6*_r5_*_defconfigs, but
USB MSC defconfig was missed, update this config option now.
Fixes: 794614311a (configs: am6*_r5_defconfig: Standardize SPL_STACK_R_MALLOC_SIMPLE_LEN to 2M)
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Size of malloc was standardized to 2M for all am6*_r5_defconfigs, but
USB DFU defconfig was missed, update this config option now.
The following warning can be seen with usb-dfu boot:
SPL possible initial stack overflow detected!!
so increase SIZE_LIMIT_PROVIDE_STACK to match the default defconfig.
Fixes: 794614311a (configs: am6*_r5_defconfig: Standardize SPL_STACK_R_MALLOC_SIMPLE_LEN to 2M)
Fixes: beee241868 (configs: am62ax: Add a new USB DFU defconfig)
Signed-off-by: Judith Mendez <jm@ti.com>
Size of malloc was standardized to 2M for all am6*_r5_defconfigs, but
USB DFU defconfig was missed, update this config option now.
Fixes: 794614311a (configs: am6*_r5_defconfig: Standardize SPL_STACK_R_MALLOC_SIMPLE_LEN to 2M)
Signed-off-by: Judith Mendez <jm@ti.com>
Add the input and output delay values for the available speed modes
for the MMC controller for mmc1/mmc2 for the am62p5 allowing it
to operate at the highest speed modes available, exclude SDR12 since
the speed mode did pass validation.
The higher speed modes have not been finalized yet, but the process
is to set the base value, then update if characterization says
otherwise.
For mmc0, sync with TI's v6.1 kernel.
Signed-off-by: Judith Mendez <jm@ti.com>
Increasing SPL_STACK_R_MALLOC_SIMPLE_LEN to 16M seems to break
USB DFU boot. The default of 4M seems to be OK for NAND case
as well so stick to defaults.
Reported-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
Fixes: b1ba64d9ba ("configs: am64x_evm_a53_defconfig: add SPL_LOAD_FIT_APPLY_OVERLAY")
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Judith Mendez <jm@ti.com>
Tested-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
Share the MCU GPIO interrupts between A53 core and DM R5 core. Allocating
2 instances each to A53 and DM R5.
Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
Update am62ax rm-cfg with allocation entries for C7x core. Following
updates are added for C7x:
- Share split BCDMA tx and rx channels between DM R5 and C7x
- Share rings for split BCDMA tx and rx channels between DM R5 and C7x
- Add Global events and Virtual interrupts for C7x
Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
This reverts commit eff76d94a3.
This patch brought in cumulative updates from resource-partitioning
tool, including a change for latest TIFS firmware (v09.01.07) which
breaks backward compatibility. The TIFS firmware is updated to revert
the change that caused backward compatibility break (v09.01.08).
Reverting this patch and bringing in the updates (minus the change done
for the compatibility breaking TIFS firmware) in granular patches
subsequently.
Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
Actually we just do a resize to fix issue when apply overlay on device
tree without any free space but if overlay take more place as default
extra size added fdt apply will fail.
So to fix this issue add extra size corresponding to page size.
Signed-off-by: Guillaume La Roque <glaroque@baylibre.com>
Acked-by: Vishal Mahaveer <vishalm@ti.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
After leaving the Partial-IO mode or other deep sleep states, the IO
isolation needs to be removed. This routine is shared by at least am62,
am62a and am62p.
The original function for testing was developed by
Akashdeep Kaur <a-kaur@ti.com>
Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
commit af7c33c103450e06aecf8adba8cbc8c522295be1 upstream.
During LPDDR initialization we will loop through a series of frequency
changes in order to train at the various operating frequencies. During
this training, accessing the DRAM_CLASS bitfield could happen during a
frequency change and cause the read to hang.
Store the DRAM type into the main structure to avoid multiple readings
while the independent phy is training.
Signed-off-by: Bryan Brattlof <bb@ti.com>
[praneeth@ti.com: cherrypick from v2023.10]
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
OSPI Flashes have 256K sector size, match the DFU buffer size to the
same so that entire sector can be written at once.
W/o this OSPI DFU update fails with timeouts like
=> setenv dfu_alt_info ${dfu_alt_info_ospi}; dfu 0 sf 0:0;
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Add support for signing, detection and loading of FSSTUB images for
for HSSE and HSFS AM62P devices. Based on the binman code for AM625
with updates to the filenames and load address.
Signed-off-by: Dhruva Gole <d-gole@ti.com>
Acked-by: Vishal Mahaveer <vishalm@ti.com>
AM335x uses a special driver "am335x_spl_bch.c" as SPL
NAND loader. This driver expects 1 sector at a time ECC
and doesn't work well with multi-sector ECC that was implemented
in commit 04fcd25873.
Switch back to 1 sector at a time read/ECC.
Fixes: 04fcd25873 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction")
Signed-off-by: Roger Quadros <rogerq@kernel.org>
mtdids and mtdparts defined in nand.env are not suitable
for am64x-evm. Define its own here.
We deliberately don't define spi.nor partitions here as
it causes mtdparts and dfu to fail till user has done
"sf probe" command. This is because NOR flash is not
auto probed by u-boot.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
This is required for overlays to work at SPL.
Loading of symbol table depends on DT Overlay support in SPL
so make it compile-time dependent. Without this SPL fails to
boot some platforms where this feature is not enabled
(e.g. dra71-evm.)
Without including the <linux/kconfig.h> file, the symbol
CONFIG_SPL_LOAD_FIT_APPLY_OVERLAY will not be visible and
we will never include the symbol table.
So include <linux/kconfig.h>
Due to some reason it needs to be included after
[#include "fdt_host.h"] otherwise it causes a build error.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Enables configuration required for NAND in SPL and u-boot.
Enable MTD Driver model and MTD + UBI command line utilities.
Add mtdids/mtdparts for NAND as it is required for u-boot's
MTD subsystem commands to recognize NAND partitions.
Add u-boot partition location.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
We want SPL to apply DTB overlays (e.g. NAND card overlay) so
enable SPL_LOAD_FIT_APPLY_OVERLAY.
Increase SPL_LOAD_FIT_APPLY_OVERLAY_BUF_SZ and
SPL_STACK_R_MALLOC_SIMPLE_LEN. Without this SPL hangs.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Since we are using overlay for A53 SPL and A53 u-boot the
SPL must select the NAND overlay from the FIT image if
HSE card is present.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Add NAND support for A53 SPL and u-boot.
For A53 SPL & u-boot we use NAND overlay to add NAND support.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
move main_i2c0, main-i2c0-pins-default, and tca9554
definitions to where they belong i.e. k3-am642-evm.dts
k3-am642-r5-evm.dts is not cleaned up like in upstream
to include k3-am642-evm.dts so we have to add the
main-i2c0-pins-default and tca9554 nodes to it
as well.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
DSP core is going into abnormal state when load callback is called
after starting of DSP core.
Reload of firmware needs core to be stopped first, followed by
load.
So avoid loading of firmware, when core is started.
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Apurva Nandan <a-nandan@ti.com>
The following shall be the eMMC layout for AM64x platform:
boot0 partition
0x0+----------------------------------+
| tiboot3.bin (1 MB) |
0x800+----------------------------------+
| tispl.bin (2 MB) |
0x1800+-----------------------------------+
| u-boot.img (4 MB) |
0x3800+-----------------------------------+
| environment (128 KB) |
0x3900+-----------------------------------+
Move u-boot environment from 0x3400 to ox3800 since at 0x3400
it overlaps with u-boot.img.
Signed-off-by: Judith Mendez <jm@ti.com>
EMMC boot is broken for AM64x platform. This is due to the size of
tiboot3.bin growing beyond the 500KB of memory allocated in eMMC.
There was effort to move the offsets and give more space to tiboot3.bin,
but the offsets in defconfig were not updated. Update offsets in
defconfig to load each binary from the correct adress in eMMC according
to the following eMMC layout:
boot0/1 partition
0x0+----------------------------------+
| tiboot3.bin (1 MB) |
0x800+----------------------------------+
| tispl.bin (2 MB) |
0x1800+-----------------------------------+
| u-boot.img (4 MB) |
0x3800+-----------------------------------+
| environment (128 KB) |
0x3900+-----------------------------------+
Signed-off-by: Judith Mendez <jm@ti.com>
am62b_p1_skevm eeprom has been introduced with
commit 09b2c79a8d ("board: ti: am62x: Add support to detect AM62B-P1 board")
Since this support, board_name is updated and we can no longer boot android
since we don't set the proper dtb_index.
Add am62b_p1_skevm and load the same dtb as for am62x_skevm.
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Acked-by: Vishal Mahaveer <vishalm@ti.com>
The u-boot environment variable emmc_android_boot total size increased
to more than 1KB. U-boot hangs when the emmc_android_boot variable is
reused in the u-boot prompt as the maximum size of the u-boot commandÂ
line buffer is 1KB. Increase the CB_SIZE to 2KB for AM57x SoC family
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>