nbhw16: added nbsw style u-boot environment settings
nbhw16: added factory reset and recovery boot support via reset button
nbhw16: set hardware version on kernel command line
nbhw16: removed dummy u-boot partition
Because i2c must be available extremly early (before RAM setup) to get
the board configuration, I decided to create a new board instead of
adding everything to the am335 stuff rom ti. This is not uncommon (see
baltos)
Now the a reset will start the SPL correctly again.
When loading fit header, it should be loaded to a previous address
aligned to ARCH_DMA_MINALIGN and not 8. Fixing the same.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
If users of the library are happy with the default, e.g. config file
name. They can pass NULL as the opts pointer. This simplifies the
transition of existing library users.
FIXES a compile error. since common_args has been removed by
a previous patch
Signed-off-by: Andreas Fenkart <andreas.fenkart@digitalstrom.com>
This reverts commit 56adbb3872.
Since commit 56adbb3872 ("image.h: Tighten up content using handy
CONFIG_IS_ENABLED() macro."), I found my boards fail to boot Linux
because the commit changed the logic of macros it touched. Now,
IMAGE_ENABLE_RAMDISK_HIGH and IMAGE_BOOT_GET_CMDLINE are 0 for all
the boards.
As you can see in include/linux/kconfig.h, CONFIG_IS_ENABLE() (and
IS_ENABLED() as well) can only take a macro that is either defined
as 1 or undefined. This is met for boolean options defined in
Kconfig. On the other hand, CONFIG_SYS_BOOT_RAMDISK_HIGH and
CONFIG_SYS_BOOT_GET_CMDLINE are defined without any value in
arch/*/include/asm/config.h . This kind of clean-up is welcome,
but the options should be moved to Kconfig beforehand.
Moreover, CONFIG_IS_ENABLED(SPL_CRC32_SUPPORT) looks weird.
It should be either CONFIG_IS_ENABLED(CRC32_SUPPORT) or
IS_ENABLED(CONFIG_SPL_CRC32_SUPPORT). But, I see no define for
CONFIG_SPL_CRC32_SUPPORT anywhere. Likewise for the other three.
The logic of IMAGE_OF_BOARD_SETUP and IMAGE_OF_SYSTEM_SETUP were
also changed for SPL. This can be a problem for boards defining
CONFIG_SPL_OF_LIBFDT. I guess it should have been changed to
IS_ENABLED(CONFIG_OF_BOARD_SETUP).
In the first place, if we replace the references in C code,
the macros IMAGE_* will go away.
if (IS_ENABLED(CONFIG_OF_BOARD_SETUP) {
...
}
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Add a platform prefix for function name in order to make more readable,
and move it into ath79.h
Signed-off-by: Wills Wang <wills.wang@live.com>
Acked-by: Marek Vasut <marex@denx.de>
Add defconfigs for recently introduced MIPS64 support on
Malta boards to get more build coverage for MIPS64.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
The various cache maintenance routines perform a number of loops over
cache lines. Rather than duplicate the code for performing such loops,
abstract it out into a new cache_loop macro which performs an arbitrary
number of cache ops on a range of addresses. This reduces duplication in
the existing L1 cache maintenance code & will allow for not adding
further duplication when introducing L2 cache support.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Allow L1 Icache & L1 Dcache line size to be specified separately, since
there's no architectural mandate that they be the same. The
[id]cache_line_size functions are tidied up to take advantage of the
fact that the Kconfig entries are always present to simply check them
for zero rather than needing to #ifdef on their presence.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
[removed CONFIG_SYS_CACHELINE_SIZE in include/configs/pic32mzdask.h]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Move details of the L1 cache line sizes & total sizes into Kconfig,
defaulting to 0. A new CONFIG_SYS_CACHE_SIZE_AUTO Kconfig entry is
introduced to allow platforms to select auto-detection of cache sizes,
and it defaults to being enabled if none of the cache sizes are set by
the configuration (ie. sizes are all the default 0), and code is
adjusted to #ifdef on that rather than on the definition of the sizes
(which will always be defined even if 0).
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Those wrappers for linker symbols were once used in the MIPS
specific board.c implementation. Since the migration to generic
board.c, those wrappers are dead code and can be removed.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Add ethernet driver for the AR933x and AR934x Atheros MIPS machines.
The driver could be easily extended to other WiSoCs.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Wills Wang <wills.wang@live.com>
[fixed Kconfig dependency]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Provide a default linker script for SPL binaries. Start address
and size of text section and BSS section are configurable. All
sections are arranged in a way that only relevant sections are
kept in the code section for maximum size reduction. All other
sections are kept but moved outside the code section to help
with debugging.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
Both real Malta boards & emulators that mimic Malta (eg. QEMU) can
support MIPS64 CPUs. Allow MIPS64 builds of U-Boot for such boards,
which enables the user to make use of the whole 64 bit address space.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
If dev->iobase is 64 bits wide then writing the value of the BAR into a
pointer to iobase will not work on big endian systems, where the BAR
value will incorrectly get written to the upper 32 bits of the 64 bit
variable. Fix this by reading the BAR into a u32, matching the type
expected by pci_read_config_dword.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Fix the pcnet driver to build safely on 64 bit platforms, in preparation
for allowing MIPS64 builds for Malta boards.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Now that MIPS virt_to_phys can handle kseg1 addresses on MIPS32, stop
manually converting addresses to their kseg0 equivalents in the pcnet
driver.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Use CPHYSADDR to implement the virt_to_phys function for converting from
a virtual to a physical address for MIPS32, much as is already done for
MIPS64. This allows for virt_to_phys to work regardless of whether the
address being translated is in kseg0 or kseg1, unlike the previous
subtraction based approach which only worked for addresses in kseg0.
This allows for drivers to provide an address to virt_to_phys without
needing to manually ensure that kseg1 addresses are converted to
equivalent kseg0 addresses first.
This patch is equivalent to this Linux patch currently waiting to be
reviewed & merged:
https://patchwork.linux-mips.org/patch/12564/
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Stefan Eichenberger
Marcel Reichmuth
mr
Lokesh Vutla
Tom Rini
Andreas Fenkart
Masahiro Yamada
Wills Wang
Daniel Schwierzeck
Paul Burton
Marek Vasut