We are currently using SC_R_LAST as a marker for imx8 power domain tree
nodes without a resource attached. This value is compiled into dtb as
part of the linux build and used by uboot.
The SC_R_LAST constant changes frequently as SCFW resources are added
(by design) and every time we need to update linux and uboot headers
together or boot can fail.
Fix this by replacing SC_R_LAST usage with a new constant SC_R_NONE
defined to be 0xFFF0.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit 93f302a6642adedfdd6336b22d08f32284539e35)
To U-Boot on DomU, the lpuart0 is replaced with a xen paravirtual
consol driver, but reused the previous lpuart node. However
there is an power-domains entry in lpuart0 which will call
power_domain_on and failed to probe xen paravirtual driver,
because of recent change:
commit 8524ca764d8f("MLK-20945-2 dm: device: Check the power up result in probe ")
So remove the power-domains entry in lpuart0 to let DomU U-Boot could
output again.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Flynn xu <flynn.xu@nxp.com>
(cherry picked from commit 38155100481a07e961f375052241d9d03e20a899)
Add compatible strings and properties to i2c1 node for using virtual
i2c and i2c mux drivers
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 9dbdbec24b2d0cd67d16cf93034b3ab60bb312bc)
We use MU8 and MU9 to communicate with M4_0 and M4_1 in u-boot. Add
relevant nodes for the MU driver.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit b06674a91991fe3bfe5a2f6000195cb8546c72a6)
There are two new validation boards: LPDDR4 board (30123) and DDR3L board (30010)
for imx8x family 17x17 chips. These two boards have same design except the DDR.
Since SCFW is resposible for DDR initialization, U-boot could use one build to
cover two boards.
The 8DX 17x17 DDR3L ARM2 has been added into u-boot before, so we rename the config
CONFIG_TARGET_IMX8DX_DDR3_ARM2 to CONFIG_TARGET_IMX8X_17X17_VAL to cover DDR3L and
LPDDR4.
Considering 8DX and 8QXP 17x17 may solder to the boards, we create two defconfig:
one for DX and another for 8qxp to share with the CONFIG_TARGET_IMX8X_17X17_VAL
but with different FDTs.
Signed-off-by: Ye Li <ye.li@nxp.com>
Add i2c gpio pinctrl settings and properties to enable i2c force idle.
Avoid any i2c bus not released by device during reboot.
Signed-off-by: Ye Li <ye.li@nxp.com>
Add support for new target imx8mq_aiy.
Test: build and boot ok on imx8mq_aiy.
Change-Id: I7bb8b66e5235a7122073dcfb4cdc7f165036b9a6
Signed-off-by: Ji Luo <ji.luo@nxp.com>
Some platforms don't have alias for usb1 device, so when initialize the
second controller, its seq is allocated by u-boot automatically.
This introduces a problem if the initialization of first controller is failed,
for example nothing connect to first controller, then the seq allocated
for second controller is 0 not 1. EHCI driver uses the seq as index for
USB controller and phy, so it will cause initialization problem for second
controller.
Fix the issue by adding the usb1 alias for second USB controller.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Align the new pinfunc names with header file for all iMX7ULP EVK and ARM2
DTS files.
Also update the EVK DTS files to align with kernel for Rev A3
board. Removed the extcon node for USB ID, since A3 board uses USB ID pin
not GPIO.
Signed-off-by: Ye Li <ye.li@nxp.com>
i.MX7ULP B0 silicon has below updates in iomux
- GPIO function input buffer enable (IBE)/output buffer enable (OBE) is
now controlled by RGPIO module. IOMUXC IBE/OBE is used as an override.
- LPUART2_TX (I/O) to PTB12 (ALT4)
- LPUART2_RX (I) to PTB13 (ALT4)
- USB0_ID (I) to PTC13 (ALT11), PTC18 (ALT11) and PTC19 (ALT10)
- VIU_DE (I) to PTC18 (ALT12), PTC19 (ALT12) and PTE5 (ALT12)
- RTC_CLKOUT (O) to PTB5 (ALT11) and PTB14 (ALT11)
- SEC_VIO_B (I) to PTB4 (ALT11)
- Added new Input Selection Registers
PSMI1_USB0_ID Address: 0x40ac_0338 To select USB_ID input pad/source
PSMI1_VIU_DE Address: 0x40ac_033c To select VIU_DE input pad/source
Copy the imx7ulp-pinfunc.h from latest kernel dts
(commit 18cdeadfe1967ea33d3bdfc7ccead6d6d06a98a6), and update
the mx7ulp-pins.h accordingly.
Signed-off-by: Ye Li <ye.li@nxp.com>
Add DDR3 init codes, board codes, defconfig and DTS into u-boot.
Basic modules are ready: SD, UART, I2C, USB host and NAND.
There is a FPGA on this board. It controls WDOG_B, and ENET PHY RESET.
So reset and ethernet won't work at default.
Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Add i.MX6ULZ support. the i.MX6ULZ is SW compatible
with i.MX6ULL. so most code of i.MX6ULL can be reused
by i.MX6ULZ.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Default address of earlycon parameter is not correct,
use correct value for imx7ulp_evk.
Test: imx7ulp_evk boots ok.
Change-Id: I2cecb6bfacca573013313ba4ae3783784ccfd506
Signed-off-by: Luo Ji <ji.luo@nxp.com>
Android Auto need different bootargs for imx8q, override default
dts node "/chosen/bootargs" to change the bootargs.
Change-Id: I32f741624b7d3ed7e91f36a466ae641fe11dfe8e
Signed-off-by: Luo Ji <ji.luo@nxp.com>
Remove some unnecessary nodes based on default dts file to reduce
u-boot boot time, add node '/config/load-environment' and set its
value as '0' to tell u-boot not to load environment variables from
eMMC.
This commit can save about 220ms on imx8qxp and about 270ms on imx8qm..
Test: Boots ok on both imx8qm/imx8qxp.
Change-Id: If2010e0a537a6ae322f51c771d2eee723a089e50
Signed-off-by: Luo Ji <ji.luo@nxp.com>
Add DDR4 init codes, u-boot dtb and defconfig to support DDR4 EVK.
The DDR4 EVK removed eMMC and Flexspi, but use NAND instead. Current
codes support to boot from SD and enable NAND access in regular u-boot.
Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
By default, imx8qm b0 silicon set the IO voltage to 2.5v, but the arm2
board is designed as 1.8v voltage for enet IO, so force the IO voltage
to 1.8 by setting COMP_CTL_GPIO_1V8_3V3 pins like:
For ENET0: SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB
For ENET1: SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETA
The pin setting:
1.8V/3.3V : bit4=0, bit[30]=1, bit[2:0]=000
2.5V : bit4=1, bit[30]=1, bit[2:0]=010
The patch update PIN IO setting to 3.3V.
Reviewed-by: Ye Li <ye.li@nxp.com>
Tested-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
This is debug patch, pushed by mistake. Since we already support
DDR3 ARM2 in previous commit, must revert it.
This reverts commit d0602d2ee6.
Signed-off-by: Ye Li <ye.li@nxp.com>
Add new dts, config and defconfig file for DX DDR3 ARM2 board. Since
it does not have USB3.0 and SD, disable them in DTS and header file. Also move
gpio expander to i2c1 according with its schematic.
In defconfig, fastboot is default enabled due to we need uuu to program
eMMC.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit e5b822615a5aa2fadb481002c286f35d996999f8)
By default, imx8qm/qxp b0 silicon set the IO voltage to 2.5v, but mek/arm2
boards are designed as 1.8v voltage for enet IO, so force the IO voltage
to 1.8 by setting COMP_CTL_GPIO_1V8_3V3 pins like:
The pin setting:
1.8V/3.3V : bit4=0, bit[30]=1, bit[2:0]=000
2.5V : bit4=1, bit[30]=1, bit[2:0]=010
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
i.MX6SLL boards enable fastboot as default.
Support: mx6sllevk_defconfig
mx6sllevk_epdc_defconfig
mx6sllevk_optee_defconfig
mx6sllevk_plugin_defconfig
uuu will use fastboot command to write emmc.
Signed-off-by: Xiaoning Wang <xiaoning.wang@nxp.com>
Set the alert temperature = critical temperature - 20C, to avoid looping
the temperature at 85C
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit d4ccaa7c87576a5a9a246ee89a627dd8efd8ae07)
According to RM, usdhc 100MHz pad setting need to set SRE(slew rate
field) to 0x01(Medium Frequency Slew Rate 100MHz), usdhc 200MHz pad
setting need to set SRE to 0x11(Max Frequency Slew Rate 200MHz).
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
(cherry picked from commit 9d19a3627124ff4d61e62d3031777b6041c07810)
Add board level codes for enabling splash screen on imx8mm EVK. We
support two different display connecting to MIPI DSI miniSAS interfaces:
1. MIPI2HDMI daughter card (default)
2. RM67191 OLED panel
Users can set "panel" env vairable to "MIPI2HDMI" or "RM67191_OLED" to
switch them after reboot.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 41f896ce26aa0f518b5cacb1d9660a0a085ee691)
We enabled the DM for xhci-imx8m driver which uses compatible string
"fsl, imx8mq-dwc3". But found a issue that u-boot will get four USB bus not two.
The reason is the low level driver xhci-dwc3 also adds the DM support which uses
compatible string "snps,dwc3". Thus, one USB node and its dwc3 subnode are both
binded as independent USB bus.
Since the xhci-imx8m driver uses xhci-dwc3 as low level driver, to fix the issue
we add -u-boot.dtsi files to change the USB node compatible string to
"simple-bus" and change dwc3 node compatibe string to "fsl, imx8mq-dwc3". Then
xhci-dwc3 DM driver won't bind any node.
Signed-off-by: Ye Li <ye.li@nxp.com>
Add a DTS file for iMX8MM DDR4 validation board whose design is similar
as iMX8MM EVK.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit abe2268c73e409f8faafc80a182203f2fa6e39c2)
Because the Xen u-boot is using OTG port not typec port, the CONFIG_FASTBOOT_USB_DEV
should set to 0 not 1. Otherwise the fastboot will fail.
Remove duplicated "/dts-v1/;" from Xen DTB.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit ceaa529b34752045dcd294572c30c7c56a48abe7)
We are targeting let uboot loading images from emmc to boot android.
Currently only emmc1 is enabled, so other devices are disabled.
Also change memory layout according to VM layout. The memory layout
needs to be samesize as what you configured in as "memory = "3584"".
Add a new dts dedicated for this kind uboot, add a new defconfig
to select CONFIG_XEN/CONFIG_XEN_DEBUG_SERIAL, deselect CONFIG_DM_SERIAL,
select CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK, and disable some devices
compared with imx8qm_mek_androidauto_defconfig.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit a4e932cae433b9d2e1cff6a94b12e4abcac45543)
Porting the imx8m-phanbell android things board support from v2017.03
Signed-off-by: Haoran.Wang <elven.wang@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Add DTS files to support iMX7D 12x12 LPDDR3 and DDR3 ARM2 boards.
Due to pin conflicts, need specified DTS for SPINOR, QSPI on LPDDR3
ARM2.
Signed-off-by: Ye Li <ye.li@nxp.com>
Add DTS files to support iMX6SLL 14x14 LPDDR3/LPDDR2 ARM2.
Due to pin conflicts, need specified DTS for SPINOR enabled.
Signed-off-by: Ye Li <ye.li@nxp.com>
Add DTS files to support iMX6ULL 14x14 DDR3 ARM2.
Due to pin conflicts, need specified DTS for eMMC, EPDC, NAND/EIMNOR and tsc enabled.
Signed-off-by: Ye Li <ye.li@nxp.com>
Add DTS files to support iMX6UL 14x14 DDR3 ARM2 and 14x14 LPDDR2 ARM2.
Due to pin conflicts, need specified DTS for eMMC and NAND/EIMNOR enabled.
Signed-off-by: Ye Li <ye.li@nxp.com>
Andrejs Cainikovs
Leonid Lobachev
Leonard Crestez
Peng Fan
Ye Li
Ji Luo
Robby Cai
Bai Ping
Andy Duan
Shenwei Wang
Xiaoning Wang
Haibo Chen