Jagan Teki 33685372cf clk: sunxi: r40: Fix GMAC reset reg offset ... GMAC reset reg offset added by below commit seems to assume it as EMAC but R40 indeed using GMAC. "clk: sunxi: Implement EMAC, GMAC clocks, resets" (sha1: 68620c9698) So, fix by updating the reg offset for RST_BUS_GMAC. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>		2019-04-16 16:29:00 +05:30
..
Kconfig	clk: sunxi: Add Allwinner A80 CLK driver	2019-01-18 22:19:09 +05:30
Makefile	clk: sunxi: Add Allwinner A80 CLK driver	2019-01-18 22:19:09 +05:30
clk_a10.c	clk: sunxi: a10: Add CLK_AHB_GMAC	2019-04-01 21:45:15 +05:30
clk_a10s.c	clk: sunxi: Implement A10 EMAC clocks	2019-03-09 13:16:35 +05:30
clk_a23.c	clk: sunxi: Implement SPI clocks, resets	2019-03-04 18:08:56 +05:30
clk_a31.c	clk: sunxi: Implement EMAC, GMAC clocks, resets	2019-03-09 13:16:35 +05:30
clk_a64.c	clk: sunxi: Implement EMAC, GMAC clocks, resets	2019-03-09 13:16:35 +05:30
clk_a80.c	clk: sunxi: Implement SPI clocks, resets	2019-03-04 18:08:56 +05:30
clk_a83t.c	clk: sunxi: Implement EMAC, GMAC clocks, resets	2019-03-09 13:16:35 +05:30
clk_h3.c	clk: sunxi: h3: Implement EPHY CLK and RESET	2019-03-09 13:16:35 +05:30
clk_h6.c	clk: sunxi: Implement EMAC, GMAC clocks, resets	2019-03-09 13:16:35 +05:30
clk_r40.c	clk: sunxi: r40: Fix GMAC reset reg offset	2019-04-16 16:29:00 +05:30
clk_sunxi.c	sunxi: clk: enable clk and reset for CCU devices	2019-01-30 18:21:35 +05:30
clk_v3s.c	clk: sunxi: Implement SPI clocks, resets	2019-03-04 18:08:56 +05:30