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base_addr_a10.h
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arm: socfpga: Add onchip RAM size macro
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2020-03-31 02:52:38 +02:00 |
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base_addr_ac5.h
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arm: socfpga: Add onchip RAM size macro
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2020-03-31 02:52:38 +02:00 |
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base_addr_soc64.h
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arm: socfpga: Add base address for Intel N5X device
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2021-08-24 15:14:23 +08:00 |
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boot0.h
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ARM: socfpga: Add boot trampoline for Arria10
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2018-05-08 21:08:42 +02:00 |
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clock_manager.h
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arm: socfpga: Add clock manager for Intel N5X device
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2021-08-25 13:32:50 +08:00 |
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clock_manager_agilex.h
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arm: socfpga: Move cm_get_mpu_clk_hz function declaration to clock_manager.h
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2021-08-25 13:31:40 +08:00 |
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clock_manager_arria10.h
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arm: socfpga: Move cm_get_mpu_clk_hz function declaration to clock_manager.h
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2021-08-25 13:31:40 +08:00 |
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clock_manager_gen5.h
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arm: socfpga: Move cm_get_mpu_clk_hz function declaration to clock_manager.h
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2021-08-25 13:31:40 +08:00 |
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clock_manager_n5x.h
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arm: socfpga: Add clock manager for Intel N5X device
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2021-08-25 13:32:50 +08:00 |
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clock_manager_s10.h
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arm: socfpga: Move cm_get_mpu_clk_hz function declaration to clock_manager.h
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2021-08-25 13:31:40 +08:00 |
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clock_manager_soc64.h
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arm: socfpga: Fix CLKMGR_INTOSC_HZ to 400MHz
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2020-01-07 14:38:33 +01:00 |
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firewall.h
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ddr: altera: Add SDRAM driver for Intel N5X device
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2021-08-25 13:47:05 +08:00 |
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fpga_manager.h
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SPDX: Convert all of our single license tags to Linux Kernel style
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2018-05-07 09:34:12 -04:00 |
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fpga_manager_arria10.h
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WS cleanup: remove SPACE(s) followed by TAB
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2021-09-30 09:08:16 -04:00 |
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fpga_manager_gen5.h
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common: Drop linux/bitops.h from common header
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2020-05-18 21:19:23 -04:00 |
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freeze_controller.h
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SPDX: Convert all of our single license tags to Linux Kernel style
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2018-05-07 09:34:12 -04:00 |
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gpio.h
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SPDX: Convert all of our single license tags to Linux Kernel style
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2018-05-07 09:34:12 -04:00 |
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handoff_soc64.h
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arm: socfpga: Add handoff data support for Intel N5X device
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2021-08-24 17:13:35 +08:00 |
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mailbox_s10.h
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arm: socfpga: soc64: Support Vendor Authorized Boot (VAB)
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2021-03-08 10:59:10 +08:00 |
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misc.h
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arm: socfpga: soc64: Check FPGA Config status register before bridge reset
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2020-09-03 11:26:07 +08:00 |
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nic301.h
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SPDX: Convert all of our single license tags to Linux Kernel style
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2018-05-07 09:34:12 -04:00 |
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pinmux.h
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SPDX: Convert all of our single license tags to Linux Kernel style
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2018-05-07 09:34:12 -04:00 |
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reset_manager.h
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Prepare v2021.04-rc4
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2021-03-15 12:15:38 -04:00 |
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reset_manager_arria10.h
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common: Drop linux/bitops.h from common header
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2020-05-18 21:19:23 -04:00 |
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reset_manager_gen5.h
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arm: socfpga: Convert reset manager from struct to defines
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2020-01-07 14:38:33 +01:00 |
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reset_manager_soc64.h
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arm: socfpga: soc64: Show reset state in SPL
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2020-10-09 17:53:11 +08:00 |
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scan_manager.h
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SPDX: Convert all of our single license tags to Linux Kernel style
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2018-05-07 09:34:12 -04:00 |
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scu.h
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ARM: socfpga: Fix Documentation errors in scu_registers
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2018-05-18 10:30:47 +02:00 |
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sdram.h
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ARM: socfpga: Add DDR driver for Arria 10
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2018-05-18 10:30:47 +02:00 |
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sdram_arria10.h
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common: Drop linux/bitops.h from common header
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2020-05-18 21:19:23 -04:00 |
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sdram_gen5.h
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ddr: altera: Add DDR2 support to Gen5 driver
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2020-02-05 03:01:57 +01:00 |
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secure_reg_helper.h
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arm: socfpga: Add secure register access helper functions for SoC 64bits
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2021-01-15 17:48:36 +08:00 |
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secure_vab.h
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arm: socfpga: soc64: Support Vendor Authorized Boot (VAB)
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2021-03-08 10:59:10 +08:00 |
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smc_api.h
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arm: socfpga: smc: Add function to get usercode
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2021-04-08 17:29:13 +08:00 |
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system_manager.h
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arm: socfpga: Move Stratix10 and Agilex to use TARGET_SOCFPGA_SOC64
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2021-03-08 10:59:10 +08:00 |
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system_manager_arria10.h
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arm: socfpga: Convert system manager from struct to defines
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2020-01-07 14:38:33 +01:00 |
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system_manager_gen5.h
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arm: socfpga: fix Gen5 enable of EMAC via FPGA
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2020-10-21 11:45:54 +08:00 |
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system_manager_soc64.h
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ddr: altera: Add SDRAM driver for Intel N5X device
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2021-08-25 13:47:05 +08:00 |
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timer.h
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SPDX: Convert all of our single license tags to Linux Kernel style
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2018-05-07 09:34:12 -04:00 |
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