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nmhw21: fix several cppcheck warnings 

BugzID: 54211

Signed-off-by: Patrick Zysset <patrick.zysset@netmodule.com>
This commit is contained in:
Patrick Zysset 2018-11-23 01:16:37 +01:00
parent 750ce01f67
commit c67fb07a2a
3 changed files with 35 additions and 28 deletions
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47
board/nm/nmhw21/board.c
View File

@ -534,9 +534,12 @@ static void configure_broadr_phys(void)
devname = miiphy_get_current_dev(); devname = miiphy_get_current_dev();
/* configure BroadR PHY TJA1100 as slave and restart FSM*/ /* configure BroadR PHY TJA1100 as slave and restart FSM*/
for (phy = 6; phy <= 7 && err == 0; phy++) { for (phy = 6; phy <= 7 && err == 0; phy++) {
err = miiphy_write (devname, phy, 0x11, 0x0004);/*Extended control register : bit 15 ->link control disabled*/ /* Extended control register : bit 15 ->link control disabled */
err = miiphy_write (devname, phy, 0x12, 0x0910);/*Configuration register 1 : bit 15 -> PHY configured as Slave*/ if (0 != miiphy_write (devname, phy, 0x11, 0x0004)) { err++; }
err = miiphy_write (devname, phy, 0x11, 0x9A04);/*Extended control register : link control enable and training restart*/ /* Configuration register 1 : bit 15 -> PHY configured as Slave */
if (0 != miiphy_write (devname, phy, 0x12, 0x0910)) { err++; }
/* Extended control register : link control enable and training restart */
if (0 != miiphy_write (devname, phy, 0x11, 0x9A04)) { err++; }
} }
if (err != 0) { if (err != 0) {
puts("BroadR not ready, "); puts("BroadR not ready, ");
@ -1037,9 +1040,8 @@ static void set_mac_address(int index, uchar mac[6])
*/ */
int board_eth_init(bd_t *bis) int board_eth_init(bd_t *bis)
{ {
int rv, n = 0; int n = 0;
uint8_t mac_addr0[6] = {02,00,00,00,00,01}; __maybe_unused uint8_t mac_addr0[6] = {02,00,00,00,00,01};
__maybe_unused struct ti_am_eeprom *header;
#if !defined(CONFIG_SPL_BUILD) #if !defined(CONFIG_SPL_BUILD)
#ifdef CONFIG_DRIVER_TI_CPSW #ifdef CONFIG_DRIVER_TI_CPSW
cpsw_data.mdio_div = 0x3E; cpsw_data.mdio_div = 0x3E;
@ -1048,25 +1050,34 @@ int board_eth_init(bd_t *bis)
set_mac_address(0, mac_addr0); set_mac_address(0, mac_addr0);
writel(RMII_MODE_ENABLE | RMII_CHIPCKL_ENABLE, &cdev->miisel); writel(RMII_MODE_ENABLE | RMII_CHIPCKL_ENABLE, &cdev->miisel);
rv = cpsw_register(&cpsw_data); {
if (rv < 0) int rv = cpsw_register(&cpsw_data);
printf("Error %d registering CPSW switch\n", rv); if (rv < 0)
else {
n += rv; printf("Error %d registering CPSW switch\n", rv);
} else {
n += rv;
}
}
#endif #endif
#endif #endif
#if defined(CONFIG_USB_ETHER) && \ #if defined(CONFIG_USB_ETHER) && \
(!defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_USBETH_SUPPORT)) (!defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_USBETH_SUPPORT))
if (is_valid_ethaddr(mac_addr0)) if (is_valid_ethaddr(mac_addr0)) {
eth_setenv_enetaddr("usbnet_devaddr", mac_addr0); eth_setenv_enetaddr("usbnet_devaddr", mac_addr0);
}
rv = usb_eth_initialize(bis); {
if (rv < 0) int rv = usb_eth_initialize(bis);
printf("Error %d registering USB_ETHER\n", rv); if (rv < 0)
else {
n += rv; printf("Error %d registering USB_ETHER\n", rv);
} else {
n += rv;
}
}
#endif #endif
/* Enable BroadR PHYs, set to slave mode */ /* Enable BroadR PHYs, set to slave mode */
configure_broadr_phys(); configure_broadr_phys();

10
board/nm/nmhw21/sja1105.c
View File

@ -256,11 +256,11 @@ static int do_sjainfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
sja1105_release_bus(); sja1105_release_bus();
printf("Port MAC Stat Rx Tx\n"); printf("Port MAC Stat Rx Tx\n");
printf("0 (UM) : %08x %d %d\n", p0_mac_stat, p0_rxf, p0_txf); printf("0 (UM) : %08x %u %u\n", p0_mac_stat, p0_rxf, p0_txf);
printf("1 (BroadR-0) : %08x %d %d\n", p1_mac_stat, p1_rxf, p1_txf); printf("1 (BroadR-0) : %08x %u %u\n", p1_mac_stat, p1_rxf, p1_txf);
printf("2 (BroadR-1) : %08x %d %d\n", p2_mac_stat, p2_rxf, p2_txf); printf("2 (BroadR-1) : %08x %u %u\n", p2_mac_stat, p2_rxf, p2_txf);
printf("3 (100bTx) : %08x %d %d\n", p3_mac_stat, p3_rxf, p3_txf); printf("3 (100bTx) : %08x %u %u\n", p3_mac_stat, p3_rxf, p3_txf);
printf("4 (CPU) : %08x %d %d\n", p4_mac_stat, p4_rxf, p4_txf); printf("4 (CPU) : %08x %u %u\n", p4_mac_stat, p4_rxf, p4_txf);
return 0; return 0;
} }

6
board/nm/nmhw21/sja1105.h
View File

@ -10,13 +10,9 @@
#ifndef _SJA1105_H_ #ifndef _SJA1105_H_
#define _SJA1105_H_ #define _SJA1105_H_
#define SJA_REG_DEVICE_ID 0x000000 #define SJA_REG_DEVICE_ID 0x000000
#define SJA_REG_CONFIG_STATUS 0x000001 #define SJA_REG_CONFIG_STATUS 0x000001
/** /**
* Initializes the sja1105 driver. * Initializes the sja1105 driver.
* *
@ -45,7 +41,7 @@ void sja1105_release_bus(void);
* @param address register to read (range 0x0 to 0x100BC3) * @param address register to read (range 0x0 to 0x100BC3)
* @returns readback data * @returns readback data
*/ */
uint32_t sja1105_read_reg(uint32_t adress); uint32_t sja1105_read_reg(uint32_t address);
/** /**
* Writes switch register. * Writes switch register.