hw21/26: optimize extension module powerup

fixes 69e9c386dd

arch/arm/Kconfig

@@ -391,12 +391,12 @@ config TARGET_AM335X_NETBIRD_V2
 	select DM_GPIO
 
 config TARGET_AM335X_NRHW20
-        bool "Support am335x_nrhw20"
-        select CPU_V7
-        select SUPPORT_SPL
-        select DM
-        select DM_SERIAL
-        select DM_GPIO
+	bool "Support am335x_nrhw20"
+	select CPU_V7
+	select SUPPORT_SPL
+	select DM
+	select DM_SERIAL
+	select DM_GPIO
 
 config TARGET_AM335X_NMHW21
         bool "Support am335x_nmhw21"
@@ -406,6 +406,22 @@ config TARGET_AM335X_NMHW21
         select DM_SERIAL
         select DM_GPIO
 
+config TARGET_AM335X_NRHW24
+	bool "Support am335x_nrhw24"
+	select CPU_V7
+	select SUPPORT_SPL
+	select DM
+	select DM_SERIAL
+	select DM_GPIO
+
+config TARGET_AM335X_HW25
+	bool "Support am335x_hw25"
+	select CPU_V7
+	select SUPPORT_SPL
+	select DM
+	select DM_SERIAL
+	select DM_GPIO
+
 config TARGET_AM335X_SL50
 	bool "Support am335x_sl50"
 	select CPU_V7
@@ -906,6 +922,8 @@ source "board/nm/netbird/Kconfig"
 source "board/nm/netbird_v2/Kconfig"
 source "board/nm/nrhw20/Kconfig"
 source "board/nm/nmhw21/Kconfig"
+source "board/nm/nrhw24/Kconfig"
+source "board/nm/hw25/Kconfig"
 source "board/olimex/mx23_olinuxino/Kconfig"
 source "board/phytec/pcm051/Kconfig"
 source "board/phytec/pcm052/Kconfig"

arch/arm/cpu/armv7/am33xx/board.c

@@ -45,12 +45,9 @@ static const struct ns16550_platdata am33xx_serial[] = {
 	{ .base = CONFIG_SYS_NS16550_COM2, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
 #  ifdef CONFIG_SYS_NS16550_COM3
 	{ .base = CONFIG_SYS_NS16550_COM3, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
-
-#   if 0 /* TODO: @@@rs */
 	{ .base = CONFIG_SYS_NS16550_COM4, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
 	{ .base = CONFIG_SYS_NS16550_COM5, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
 	{ .base = CONFIG_SYS_NS16550_COM6, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
-#   endif
 #  endif
 # endif
 };
@@ -61,11 +58,9 @@ U_BOOT_DEVICES(am33xx_uarts) = {
 	{ "ns16550_serial", &am33xx_serial[1] },
 #   ifdef CONFIG_SYS_NS16550_COM3
 	{ "ns16550_serial", &am33xx_serial[2] },
-#    if 0 /* TODO: @@@rs */
 	{ "ns16550_serial", &am33xx_serial[3] },
 	{ "ns16550_serial", &am33xx_serial[4] },
 	{ "ns16550_serial", &am33xx_serial[5] },
-#    endif
 #   endif
 #  endif
 };

arch/arm/cpu/armv7/am33xx/clock_am33xx.c

@@ -170,7 +170,7 @@ void enable_basic_clocks(void)
 		&cmper->usb0clkctrl,
 		&cmper->emiffwclkctrl,
 		&cmper->emifclkctrl,
-		&cmper->i2c2clkctrl,	/* TODO: Check whether required now that I2C1 is used */
+		&cmper->i2c2clkctrl,
 		&cmper->spi1clkctrl,
 		0
 	};

arch/arm/include/asm/arch-am33xx/spl.h

@@ -47,6 +47,7 @@
 #define BOOT_DEVICE_UART	0x41
 #define BOOT_DEVICE_USBETH	0x44
 #define BOOT_DEVICE_CPGMAC	0x46
+#define BOOT_DEVICE_JTAG        0x58
 
 #define MMC_BOOT_DEVICES_START	BOOT_DEVICE_MMC1
 #define MMC_BOOT_DEVICES_END	BOOT_DEVICE_MMC2

board/nm/common/bdparser.h

@@ -30,6 +30,8 @@
  *                         Fixed wrong sizeof type in GetPartition()
  *                         Changed 64 bit type to "long long" from struct
  *                         Added BD_VerifySha1Hmac() function
+ *  20200615  rs           Added BD_Hw_Type tag
+ * 
  *****************************************************************************/
 
 /**
@@ -160,22 +162,32 @@ typedef enum _BD_Tags
 
   BD_BOM_Patch          =    33,   /**<  "UInt8"      -> Hardware BOM patch of the equipment (BOM changes, same PCB, not SW relevant) */
   BD_Prod_Variant_Name  =    34,   /**<  "String"     -> Product variant */
-
+  BD_Hw_Type            =    35,   /*<<  "UInt16"     -> Hardware Type, e.g. 24 for HW24, 26 for HW26 */
+  
   BD_Ui_Adapter_Type    =  4096,   /**<  "UInt16"     -> IV OG2 UI adapterboard type (0 = not present) */
-
-  BD_Pd_Module0         =  4100,
+  BD_Voltage            =  4098,   /**<  "UInt8"      -> Primary Voltage (1=12-60V, 2=40-160V, 3=24-60V, 4=?, 5=12-24V) */
+  
+  BD_Pd_Module0         =  4100,   /**<  "String"     -> */
   BD_Pd_Module1         =  4101,
   BD_Pd_Module2         =  4102,
   BD_Pd_Module3         =  4103,
   BD_Pd_Module4         =  4104,
   BD_Pd_Module5         =  4105,
-  BD_Pd_Sim             =  4122,
+  BD_Pd_Phy0            =  4110,   /**<  "String"     -> */
+  BD_Pd_Phy1            =  4111,   /**<  "String"     -> */
+  BD_Pd_DIO             =  4120,   /**<  "String"     -> */
+  BD_Pd_Serial          =  4121,   /**<  "String"     -> */
+  BD_Pd_Sim             =  4122,   /**<  "String"     -> */
+  BD_Pd_Led             =  4123,   /**<  "String"     -> */
+  BD_Pd_UsbHost         =  4124,   /**<  "String"     -> */
   PD_Dev_Tree           =  4125,   /**<  "String"     -> Devicetree file name */
-  PD_SerDes             =  4128,   /**<  "Uint16"     -> SERDES Configuration (e.g. NB1800) */
-  PD_Shield             =  4129,   /**<  "String"     -> Shield Population (e.g. CAN/RS485) for NB800 */
+  BD_Patch              =  4126,   /**<  "UInt8"      -> Board patch level (after production) */
+  BD_Pd_Phy2            =  4127,   /**<  "String"     -> */
+  PD_SerDes             =  4128,   /**<  "UInt16"     -> SERDES Configuration (e.g. NB1800) */
+  PD_Shield             =  4129,   /**<  "UInt16"     -> Assembled Shield (0=COM/IO, 1=DualCAN), 2=CAN/GNSS, 3=DualCAN Passive */
 
   /* project specific tags */
-  BD_BootPart			= 32768,   /**<  "UInt8" */
+  BD_BootPart           = 32768,   /**<  "UInt8" */
 
   BD_None_Type          = 65535,   /**<  "Void"       -> None */
 }

board/nm/common/board_descriptor.c

@@ -17,6 +17,7 @@
  *                         code cleanup (tabs/indentation)
  *  20110211  rs           partition table handling
  *  20190330  rs           cleanup after years of chaotic development
+ *  20200615  rs           added bd_get_hw_type()
  *
  *****************************************************************************/
 #include <common.h>
@@ -217,6 +218,16 @@ int bd_get_variantname(char *variantname, size_t len)
 	return 0;
 }
 
+void bd_get_hw_type(int* type)
+{
+	uint16_t hwtype = 0;
+
+	if ( !_get_uint16( BD_Hw_Type, 0, &hwtype) )
+		debug("%s() no Hw Type found\n", __func__);
+
+	*type = hwtype;
+}
+
 void bd_get_hw_version(int* ver, int* rev)
 {
 	uint8_t hwver = 0;
@@ -268,6 +279,26 @@ uint32_t bd_get_fpgainfo(void)
 	return fpgainfo;
 }
 
+int bd_get_pd_dio(char *config, size_t len)
+{
+	if ( !_get_string(BD_Pd_DIO, 0, config, len) ) {
+		debug("%s() no DIO info\n", __func__);
+		return -1;
+	}
+
+	return 0;
+}
+
+int bd_get_pd_serial(char *config, size_t len)
+{
+	if ( !_get_string(BD_Pd_Serial, 0, config, len) ) {
+		debug("%s() no serial port info\n", __func__);
+		return -1;
+	}
+
+	return 0;
+}
+
 int bd_get_pd_module(uint32_t slot, char *config, size_t len)
 {
 	if ( !_get_string(BD_Pd_Module0 + slot, 0, config, len) ) {

board/nm/common/board_descriptor.h

@@ -17,10 +17,13 @@ int bd_get_context(BD_Context *bdctx, uint32_t i2caddress, uint32_t offset);
 
 int bd_get_prodname(char *prodname, size_t len);
 int bd_get_variantname(char *variantname, size_t len);
+void bd_get_hw_type(int* type);
 void bd_get_hw_version(int* ver, int* rev);
 void bd_get_hw_patch(int* patch);
 int bd_get_mac(int index, uint8_t *macaddr, size_t len);
 uint32_t bd_get_fpgainfo(void);
+int bd_get_pd_dio(char *config, size_t len);
+int bd_get_pd_serial(char *config, size_t len);
 int bd_get_pd_module(uint32_t slot, char *config, size_t len);
 int bd_get_sim_config(char* simconfig, size_t len);
 int bd_get_devicetree(char* devicetreename, size_t len);

board/nm/common/da9063.c

@@ -58,10 +58,10 @@ void da9063_release_i2c_bus(int bus)
 	revert_i2c_bus(bus);
 }
 
-int da9063_get_reg(uint32_t reg, u8* val)
+int da9063_get_reg(uint32_t reg, uint8_t* val)
 {
 	int ret;
-	u8 temp;
+	uint8_t temp;
 
 	/* Argument check */
 	if ((reg >= 0x200) || (val==0)) {
@@ -86,7 +86,7 @@ int da9063_get_reg(uint32_t reg, u8* val)
 	return ret;
 }
 
-int da9063_set_reg(uint32_t reg, u8 val)
+int da9063_set_reg(uint32_t reg, uint8_t val)
 {
 	int ret;
 
@@ -116,8 +116,8 @@ void da9063_set_gpio(unsigned bit, int state)
 {
 	int pmic_reg;
 	int ret;
-	u8 bitmask;
-	u8 reg = 0x00;
+	uint8_t bitmask;
+	uint8_t reg = 0x00;
 
 	if (bit <= 7) {
 		pmic_reg = PMIC_REG_GPIO_MODE0_7;

board/nm/common/da9063.h

@@ -15,9 +15,30 @@
 #define CONFIG_PMIC_I2C_BUS	0
 #define CONFIG_PMIC_I2C_ADDR	0x58	/* Pages 0 and 1, Pages 2 and 3 -> 0x59 */
 
-#define PMIC_REG_STATUS_A	0x01	/* Status of ON_KEY, WAKE, COMP1V2, DVC */
-#define PMIC_REG_CONTROL_D      0x11    /* Control register for blink/watchdog */
-#define PMIC_REG_GPIO14_15      0x1C    /* Configuration of GPIO14/15 (mode, wake) */
+#define PMIC_REG_STATUS_A		0x01	/* Status of ON_KEY, WAKE, COMP1V2, DVC */
+#define PMIC_REG_STATUS_A_COMP1V2_MASK	0x08
+
+#define PMIC_REG_FAULT_LOG		0x05	/* PMIC fault log register, holding reset reason */
+#define PMIC_FAULT_TWD_ERROR_MASK	0x01	/* Watchdog timeout detected */
+#define PMIC_FAULT_POR_MASK		0x02	/* Startup from No-Power/RTC/Delivery mode */
+
+#define PMIC_REG_EVENT_A		0x06
+#define PMIC_REG_EVENT_ONKEY_MASK	0x01
+#define PMIC_REG_EVENT_RTC_ALARM_MASK	0x02
+#define PMIC_REG_EVENT_RTC_TICK_MASK	0x04
+#define PMIC_REG_EVENT_EVENTS_B_MASK	0x20
+
+#define PMIC_REG_EVENT_B		0x07
+#define PMIC_REG_EVENT_COMP1V2_MASK	0x04
+
+#define PMIC_REG_IRQ_MASK_A	0x0A
+#define PMIC_REG_IRQ_MASK_B	0x0B
+#define PMIC_REG_IRQ_MASK_C	0x0C
+#define PMIC_REG_IRQ_MASK_D	0x0D
+
+#define PMIC_REG_CONTROL_A      0x0E    /* Control register for power states */
+#define PMIC_REG_CONTROL_D	0x11    /* Control register for blink/watchdog */
+#define PMIC_REG_GPIO14_15	0x1C    /* Configuration of GPIO14/15 (mode, wake) */
 #define PMIC_REG_GPIO_MODE0_7	0x1D	/* Control register for GPIOs 0..7 */
 #define PMIC_REG_GPIO_MODE8_15	0x1E	/* Control register for GPIOs 8..15 */
 
@@ -36,11 +57,24 @@
 #define PMIC_LDOx_CONF_MASK	0x80
 
 #define PMIC_REG_ID_4_3		0x84
+#define PMIC_REG_ID_6_5		0x85
 
 #define PMIC_REG_BUCK_ILIM_A	0x9A
 #define PMIC_REG_BUCK_ILIM_B	0x9B
 #define PMIC_REG_BUCK_ILIM_C	0x9C
 
+#define PMIC_REG_BCORE1_CONF	0x9E	/* Configuration register of BCORE1 */
+#define PMIC_REG_BCORE2_CONF	0x9D	/* Configuration register of BCORE2 */
+#define PMIC_REG_BPERI_CONF	0xA2	/* Configuration register of BPERI */
+#define PMIC_REG_BIO_CONF	0xA0	/* Configuration register of BIO */
+#define PMIC_REG_BMEM_CONF	0xA1	/* Configuration register of BMEM */
+
+#define PMIC_CONF_MODE_MASK	0xC0
+#define PMIC_CONF_MODE_SLEEP	0x40
+#define PMIC_CONF_MODE_SYNC	0x80
+#define PMIC_CONF_MODE_AUTO	0xC0
+
+
 #define PMIC_REG_BBAT_CONT	0xC5	/* Control register for backup battery */
 
 #define PMIC_REG_CONFIG_E	0x10A
@@ -49,6 +83,9 @@
 
 #define PMIC_REG_TRIM_CLDR	0x120	/* Calendar Trim register, 2's complement, 1.9ppm per bit */
 
+#define PMIC_GP_ID_0		0x121	/* General purpose ID 0 (R/W) */
+#define PMIC_GP_ID_1		0x122	/* General purpose ID 1 (R/W) */
+
 #define PMIC_REG_CONFIG_ID	0x184	/* OTP Config ID <ver.rev> */
 
 
@@ -57,8 +94,8 @@ extern void da9063_init(int i2c_bus);
 extern int da9063_claim_i2c_bus(void);
 extern void da9063_release_i2c_bus(int bus);
 
-extern int da9063_get_reg(uint32_t reg, u8* val);
-extern int da9063_set_reg(uint32_t reg, u8 val);
+extern int da9063_get_reg(uint32_t reg, uint8_t* val);
+extern int da9063_set_reg(uint32_t reg, uint8_t val);
 
 extern void da9063_set_gpio(unsigned bit, int state);
 

board/nm/common/ether_crc.c

@@ -0,0 +1,36 @@
+/*
+ * ether_crc.c
+ *
+ * Ethernet CRC computation
+ *
+ * Copyright (C) 2018-2020 NetModule AG - http://www.netmodule.com/
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+
+#include "ether_crc.h"
+
+
+uint32_t ether_crc(size_t len, uint8_t const *p)
+{
+	uint32_t crc;
+	unsigned i;
+
+	crc = ~0;
+	while (len--) {
+		crc ^= *p++;
+		for (i = 0; i < 8; i++)
+			crc = (crc >> 1) ^ ((crc & 1) ? 0xedb88320 : 0);
+	}
+
+	/* an reverse the bits, cuz of way they arrive -- last-first */
+	crc = (crc >> 16) | (crc << 16);
+	crc = (crc >> 8 & 0x00ff00ff) | (crc << 8 & 0xff00ff00);
+	crc = (crc >> 4 & 0x0f0f0f0f) | (crc << 4 & 0xf0f0f0f0);
+	crc = (crc >> 2 & 0x33333333) | (crc << 2 & 0xcccccccc);
+	crc = (crc >> 1 & 0x55555555) | (crc << 1 & 0xaaaaaaaa);
+	
+	return crc;
+}

board/nm/common/ether_crc.h

@@ -0,0 +1,18 @@
+/*
+ * ether_crc.h
+ *
+ * Ethernet CRC computation
+ *
+ * Copyright (C) 2018-2020 NetModule AG - http://www.netmodule.com/
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef ETHER_CRC_H
+#define ETHER_CRC_H
+
+
+extern uint32_t ether_crc(size_t len, uint8_t const *p);
+
+
+#endif /* ETHER_CRC_H */

board/nm/hw25/Kconfig

@@ -0,0 +1,26 @@
+if TARGET_AM335X_HW25
+
+config SYS_BOARD
+        default "hw25"
+
+config SYS_VENDOR
+        default "nm"
+
+config SYS_SOC
+        default "am33xx"
+
+config SYS_CONFIG_NAME
+        default "am335x_hw25"
+
+config CONS_INDEX
+        int "UART used for console"
+        range 1 6
+        default 1
+        help
+          The AM335x SoC has a total of 6 UARTs (UART0 to UART5 as referenced
+          in documentation, etc) available to it.  Depending on your specific
+          board you may want something other than UART0 as for example the IDK
+          uses UART3 so enter 4 here.
+
+endif
+

board/nm/hw25/Makefile

@@ -0,0 +1,13 @@
+#
+# Makefile
+#
+# Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+ifeq ($(CONFIG_SKIP_LOWLEVEL_INIT),)
+obj-y	:= mux.o
+endif
+
+obj-y	+= board.o ../common/bdparser.o ../common/board_descriptor.o ../common/da9063.o ../common/ether_crc.o fileaccess.o

board/nm/hw25/board.h

@@ -0,0 +1,26 @@
+/*
+ * board.h
+ *
+ * TI AM335x boards information header
+ *
+ * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _BOARD_H_
+#define _BOARD_H_
+
+/*
+ * We have three pin mux functions that must exist.  We must be able to enable
+ * uart0, for initial output and i2c2 to read the main EEPROM.  We then have a
+ * main pinmux function that can be overridden to enable all other pinmux that
+ * is required on the board.
+ */
+void enable_uart0_pin_mux(void);
+
+void enable_board_pin_mux(void);
+
+#define GPIO_TO_PIN(bank, gpio)		(32 * (bank) + (gpio))
+
+#endif

board/nm/hw25/fileaccess.c

@@ -0,0 +1,40 @@
+#include <common.h>
+#include <fs.h>
+
+#define BLOCK_DEVICE "mmc"
+#define OVERLAY_PART "1:3"
+
+int read_file(const char* filename, char *buf, int size)
+{
+	loff_t filesize = 0;
+	loff_t len;
+	int ret;
+
+	if (fs_set_blk_dev(BLOCK_DEVICE, OVERLAY_PART, FS_TYPE_EXT) != 0) {
+		puts("Error, can not set blk device\n");
+		return -1;
+	}
+
+	/* Read at most file size bytes */
+	if (fs_size(filename, &filesize)) {
+		return -1;
+	}
+
+	if (filesize < size)
+		size = filesize;
+
+	/* For very unclear reasons the block device needs to be set again after the call to fs_size() */
+	if (fs_set_blk_dev(BLOCK_DEVICE, OVERLAY_PART, FS_TYPE_EXT) != 0) {
+		puts("Error, can not set blk device\n");
+		return -1;
+	}
+
+	if ((ret = fs_read(filename, (ulong)buf, 0, size, &len))) {
+		printf("Can't read file %s (size %d, len %lld, ret %d)\n", filename, size, len, ret);
+		return -1;
+	}
+
+	buf[len] = 0;
+
+	return len;
+}

board/nm/hw25/fileaccess.h

@@ -0,0 +1,14 @@
+/**@file	/home/eichenberger/projects/nbhw16/u-boot/board/nm/netbird_v2/fileaccess.h
+ * @author	eichenberger
+ * @version	704
+ * @date
+ * 	Created:	Tue 06 Jun 2017 02:02:33 PM CEST \n
+ * 	Last Update:	Tue 06 Jun 2017 02:02:33 PM CEST
+ */
+#ifndef FILEACCESS_H
+#define FILEACCESS_H
+
+void fs_set_console(void);
+int read_file(const char* filename, char *buf, int size);
+
+#endif // FILEACCESS_H

board/nm/hw25/mux.c

@@ -0,0 +1,223 @@
+/*
+ * mux.c
+ *
+ * Copyright (C) 2018-2019 NetModule AG - http://www.netmodule.com/
+ * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/mux.h>
+#include <asm/io.h>
+#include "board.h"
+
+static struct module_pin_mux gpio_pin_mux[] = {
+	/*
+	* CPU GPIOs
+	*
+	* (J18) GPIO0_16: RST_PHY~
+	* (U10) GPIO0_22: SEL_RS232/RS485~
+	* (T10) GPIO0_23: EN_RS485_TERM~
+	* (T11) GPIO0_26: IO_OUT1
+	* (U12) GPIO0_27: IO_OUT2
+	*
+	* (T12) GPIO1_12: IO_IN0
+	* (T13) GPIO1_13: IO_IN1
+	* (T14) GPIO1_14: IO_IN2
+	* (T15) GPIO1_15: IO_IN3
+	*
+	* (T13) GPIO2_0: RST_SDCARD~
+	* (L17) GPIO2_18: GSM_PWR_EN
+	* (L16) GPIO2_19: RST_GSM
+	*
+	* (K18) GPIO3_9: WLAN_IRQ
+	* (L18) GPIO3_10: WLAN_EN
+	* (C12) GPIO3_17: SIM_SEL
+	*/
+
+	/* Bank 0 */
+	{OFFSET(mii1_txd3), (MODE(7) | PULLUDDIS)},				/* (J18) gpio0[16] */  /* RST_PHY~ */
+	{OFFSET(gpmc_ad8), (MODE(7) | PULLUDDIS)},				/* (U10) gpio0[22] */  /* SEL_RS232/RS485~ */
+	{OFFSET(gpmc_ad9), (MODE(7) | PULLUDDIS)},				/* (T10) gpio0[23] */  /* EN_RS485_TERM~ */
+	{OFFSET(gpmc_ad10), (MODE(7) | PULLUDDIS)},				/* (T11) gpio0[26] */  /* IO_OUT1 */
+	{OFFSET(gpmc_ad11), (MODE(7) | PULLUDDIS)},				/* (U12) gpio0[27] */  /* IO_OUT2 */
+
+	/* Bank 1 */
+	{OFFSET(gpmc_ad12), (MODE(7) | PULLUDDIS | RXACTIVE)},			/* (T12) gpio1[12] */  /* IO_IN0 */
+	{OFFSET(gpmc_ad13), (MODE(7) | PULLUDDIS | RXACTIVE)},			/* (R12) gpio1[13] */  /* IO_IN1 */
+	{OFFSET(gpmc_ad14), (MODE(7) | PULLUDDIS | RXACTIVE)},			/* (V13) gpio1[14] */  /* IO_IN2 */
+	{OFFSET(gpmc_ad15), (MODE(7) | PULLUDDIS | RXACTIVE)},			/* (U13) gpio1[15] */  /* IO_IN3 */
+
+	/* TODO: What about all the unused GPMC pins ? */
+
+	/* Bank 2 */
+	{OFFSET(gpmc_be1n), (MODE(7) | PULLUDDIS)},				/* (T13) gpio2[0] */  /* RST_SDCARD~ */
+	{OFFSET(mii1_rxd3), (MODE(7) | PULLUDDIS)},				/* (L17) gpio2[18] */  /* GSM_PWR_EN */
+	{OFFSET(mii1_rxd2),  (MODE(7) | PULLUDDIS)},				/* (L16) gpio2[19] */  /* RST_GSM */
+
+
+#if 0
+	/* TODO: What is this meant for? */
+	{OFFSET(lcd_data3), (MODE(7) | PULLUDEN | PULLUP_EN)},	/* (R4) gpio2[9] */  /* SYSBOOT_3 */
+	{OFFSET(lcd_data4), (MODE(7) | PULLUDEN | PULLUP_EN)},	/* (T1) gpio2[10] */  /* SYSBOOT_4 */
+
+	/* TODO: Check other unued pins from sysboot block */
+	/* Ensure PU/PD does not work against external signal */
+	/*
+	 * SYSBOOT 0,1,5,12,13 = Low
+	 * SYSBOOT 2 = High
+	 */
+#endif
+
+	/* Bank 3 */
+	{OFFSET(mii1_txclk),  (MODE(7) | PULLUDDIS | RXACTIVE)},		/* (K18) gpio3[9] */  /* WLAN_IRQ */
+	{OFFSET(mii1_rxclk), (MODE(7) | PULLUDDIS)},				/* (L18) gpio3[10] */  /* WLAN_EN */
+	{OFFSET(mcasp0_ahclkr), (MODE(7) | PULLUDEN | PULLDOWN_EN)},		/* (C12) gpio3[17] */  /* SIM_SEL */
+	{-1}
+};
+
+/* I2C0 PMIC */
+static struct module_pin_mux i2c0_pin_mux[] = {
+	{OFFSET(i2c0_sda), (MODE(0) | RXACTIVE | PULLUDEN | PULLUP_EN | SLEWCTRL)},	/* (C17) I2C0_SDA */
+	{OFFSET(i2c0_scl), (MODE(0) | RXACTIVE | PULLUDEN | PULLUP_EN | SLEWCTRL)},	/* (C16) I2C0_SCL */
+	{-1}
+};
+
+/* I2C2 System */
+static struct module_pin_mux i2c2_pin_mux[] = {
+	{OFFSET(uart1_rtsn), (MODE(3) | RXACTIVE | PULLUDEN | PULLUP_EN | SLEWCTRL)},	/* (D17) I2C2_SCL */
+	{OFFSET(uart1_ctsn), (MODE(3) | RXACTIVE | PULLUDEN | PULLUP_EN | SLEWCTRL)},	/* (D18) I2C2_SDA */
+	{-1},
+};
+
+/* RMII1: Ethernet */
+static struct module_pin_mux rmii1_pin_mux[] = {
+	/* RMII */
+	{OFFSET(mii1_crs), MODE(1) | PULLUDDIS | RXACTIVE},			/* (H17) rmii1_crs */
+	{OFFSET(mii1_rxerr), MODE(7) | PULLUDEN | PULLDOWN_EN | RXACTIVE},	/* (J15) gpio (rxerr) */
+	{OFFSET(mii1_rxd0), MODE(1) | PULLUDDIS | RXACTIVE},			/* (M16) rmii1_rxd0 */
+	{OFFSET(mii1_rxd1), MODE(1) | PULLUDDIS | RXACTIVE},			/* (L15) rmii1_rxd1 */
+	{OFFSET(mii1_txen), MODE(1) | PULLUDDIS},				/* (J16) rmii1_txen */
+	{OFFSET(mii1_txd0), MODE(1) | PULLUDDIS},				/* (K17) rmii1_txd0 */
+	{OFFSET(mii1_txd1), MODE(1) | PULLUDDIS},				/* (K16) rmii1_txd1 */
+	{OFFSET(rmii1_refclk), MODE(0) | PULLUDDIS | RXACTIVE},			/* (H18) rmii1_refclk */
+
+	/* SMI */
+	{OFFSET(mdio_clk), MODE(0) | PULLUDDIS},				/* (M18) mdio_clk */
+	{OFFSET(mdio_data), MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE},		/* (M17) mdio_data */
+
+	/* 25MHz Clock Output */
+	{OFFSET(xdma_event_intr0), MODE(3)},					/* (A15) clkout1 (25 MHz clk for PHY) */
+	{-1}
+};
+
+/* RMII2: Ethernet */
+static struct module_pin_mux rmii2_pin_mux[] = {
+	/* RMII */
+	{OFFSET(gpmc_a9), MODE(3) | PULLUDDIS | RXACTIVE},			/* (U16) rmii2_crs */
+	{OFFSET(gpmc_wpn), MODE(7) | PULLUDEN | PULLDOWN_EN | RXACTIVE},	/* (U17) gpio (rxerr) */
+	{OFFSET(gpmc_a11), MODE(3) | PULLUDDIS | RXACTIVE},			/* (V17) rmii2_rxd0 */
+	{OFFSET(gpmc_a10), MODE(3) | PULLUDDIS | RXACTIVE},			/* (T16) rmii2_rxd1 */
+	{OFFSET(gpmc_a0), MODE(3) | PULLUDDIS},					/* (R13) rmii2_txen */
+	{OFFSET(gpmc_a5), MODE(3) | PULLUDDIS},					/* (V15) rmii2_txd0 */
+	{OFFSET(gpmc_a4), MODE(3) | PULLUDDIS},					/* (R14) rmii2_txd1 */
+	{OFFSET(mii1_col), MODE(1) | PULLUDDIS | RXACTIVE},			/* (H16) rmii2_refclk */
+	{-1},
+};
+
+/* MMC0: WiFi */
+static struct module_pin_mux mmc0_sdio_pin_mux[] = {
+	{OFFSET(mmc0_clk), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (G17) MMC0_CLK */
+	{OFFSET(mmc0_cmd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (G18) MMC0_CMD */
+	{OFFSET(mmc0_dat0), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (G16) MMC0_DAT0 */
+	{OFFSET(mmc0_dat1), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (G15) MMC0_DAT1 */
+	{OFFSET(mmc0_dat2), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (F18) MMC0_DAT2 */
+	{OFFSET(mmc0_dat3), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (F17) MMC0_DAT3 */
+	{-1}
+};
+
+/* MMC1: eMMC */
+static struct module_pin_mux mmc1_emmc_pin_mux[] = {
+	{OFFSET(gpmc_csn1), (MODE(2) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (U9) MMC1_CLK */
+	{OFFSET(gpmc_csn2), (MODE(2) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (V9) MMC1_CMD */
+	{OFFSET(gpmc_ad0), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (U7) MMC1_DAT0 */
+	{OFFSET(gpmc_ad1), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (V7) MMC1_DAT1 */
+	{OFFSET(gpmc_ad2), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (R8) MMC1_DAT2 */
+	{OFFSET(gpmc_ad3), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (T8) MMC1_DAT3 */
+	{OFFSET(gpmc_ad4), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (U8) MMC1_DAT4 */
+	{OFFSET(gpmc_ad5), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (V8) MMC1_DAT5 */
+	{OFFSET(gpmc_ad6), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (R9) MMC1_DAT6 */
+	{OFFSET(gpmc_ad7), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (T9) MMC1_DAT7 */
+	{-1}
+};
+
+/* USB_DRVBUS not used -> configure as GPIO */
+static struct module_pin_mux usb_pin_mux[] = {
+	{OFFSET(usb0_drvvbus), (MODE(7) | PULLUDDIS)},				/* (F16) USB0_DRVVBUS */
+	{OFFSET(usb1_drvvbus), (MODE(7) | PULLUDDIS)},				/* (F15) USB1_DRVVBUS */
+	{-1}
+};
+
+/* UART0: User (Debug/Console) */
+static struct module_pin_mux uart0_pin_mux[] = {
+	{OFFSET(uart0_rxd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (E15) UART0_RXD */
+	{OFFSET(uart0_txd), (MODE(0) | PULLUDEN | PULLUP_EN | SLEWCTRL)},	/* (E16) UART0_TXD */
+	{-1},
+};
+
+/* UART5: RS232/RS485 */
+/* CTS is unused - set to GPIO mode */
+static struct module_pin_mux uart5_pin_mux[] = {
+	{OFFSET(lcd_data9), (MODE(4) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (U2) UART5_RXD */
+	{OFFSET(lcd_data8), (MODE(4) | PULLUDEN | PULLUP_EN)},			/* (U1) UART5_TXD */
+	{OFFSET(lcd_data14), (MODE(7) | PULLUDEN | PULLDOWN_EN)},			/* (V4) uart5_ctsn */
+	{OFFSET(lcd_data15), (MODE(6) | PULLUDEN | PULLUP_EN)},			/* (T5) uart5_rtsn */
+	{-1}
+};
+
+static struct module_pin_mux unused_pin_mux[] = {
+	/* SYSBOOT6, 7, 10, 11: Not used pulldown active, receiver disabled */
+	{OFFSET(lcd_data6), (MODE(7) | PULLUDEN | PULLDOWN_EN)},
+	{OFFSET(lcd_data7), (MODE(7) | PULLUDEN | PULLDOWN_EN)},
+	{OFFSET(lcd_data10), (MODE(7) | PULLUDEN | PULLDOWN_EN)},
+	{OFFSET(lcd_data11), (MODE(7) | PULLUDEN | PULLDOWN_EN)},
+
+	/* TODO: GPMCA1..3, A6..8 */
+
+	{-1}
+};
+
+
+void enable_board_pin_mux(void)
+{
+	configure_module_pin_mux(gpio_pin_mux);
+
+	configure_module_pin_mux(rmii1_pin_mux);
+	configure_module_pin_mux(rmii2_pin_mux);
+	configure_module_pin_mux(mmc0_sdio_pin_mux);
+	configure_module_pin_mux(mmc1_emmc_pin_mux);
+	configure_module_pin_mux(usb_pin_mux);
+
+	configure_module_pin_mux(i2c0_pin_mux);
+	configure_module_pin_mux(i2c2_pin_mux);
+
+	configure_module_pin_mux(uart5_pin_mux);
+
+	configure_module_pin_mux(unused_pin_mux);
+}
+
+void enable_uart0_pin_mux(void)
+{
+	configure_module_pin_mux(uart0_pin_mux);
+}
+

board/nm/hw25/u-boot.lds

@@ -0,0 +1,158 @@
+/*
+ * Copyright (c) 2004-2008 Texas Instruments
+ *
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+	. = 0x00000000;
+
+	. = ALIGN(4);
+	.text :
+	{
+		*(.__image_copy_start)
+		*(.vectors)
+		CPUDIR/start.o (.text*)
+                board/nm/hw25/built-in.o (.text*)
+		*(.text*)
+	}
+
+	. = ALIGN(4);
+	.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
+
+	. = ALIGN(4);
+	.data : {
+		*(.data*)
+	}
+
+	. = ALIGN(4);
+
+	. = .;
+
+	. = ALIGN(4);
+	.u_boot_list : {
+		KEEP(*(SORT(.u_boot_list*)));
+	}
+
+	. = ALIGN(4);
+
+	.__efi_runtime_start : {
+		*(.__efi_runtime_start)
+	}
+
+	.efi_runtime : {
+		*(efi_runtime_text)
+		*(efi_runtime_data)
+	}
+
+	.__efi_runtime_stop : {
+		*(.__efi_runtime_stop)
+	}
+
+	.efi_runtime_rel_start :
+	{
+		*(.__efi_runtime_rel_start)
+	}
+
+	.efi_runtime_rel : {
+		*(.relefi_runtime_text)
+		*(.relefi_runtime_data)
+	}
+
+	.efi_runtime_rel_stop :
+	{
+		*(.__efi_runtime_rel_stop)
+	}
+
+	. = ALIGN(4);
+
+	.image_copy_end :
+	{
+		*(.__image_copy_end)
+	}
+
+	.rel_dyn_start :
+	{
+		*(.__rel_dyn_start)
+	}
+
+	.rel.dyn : {
+		*(.rel*)
+	}
+
+	.rel_dyn_end :
+	{
+		*(.__rel_dyn_end)
+	}
+
+	.hash : { *(.hash*) }
+
+	.end :
+	{
+		*(.__end)
+	}
+
+	_image_binary_end = .;
+
+	/*
+	 * Deprecated: this MMU section is used by pxa at present but
+	 * should not be used by new boards/CPUs.
+	 */
+	. = ALIGN(4096);
+	.mmutable : {
+		*(.mmutable)
+	}
+
+/*
+ * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c
+ * __bss_base and __bss_limit are for linker only (overlay ordering)
+ */
+
+	.bss_start __rel_dyn_start (OVERLAY) : {
+		KEEP(*(.__bss_start));
+		__bss_base = .;
+	}
+
+	.bss __bss_base (OVERLAY) : {
+		*(.bss*)
+		 . = ALIGN(4);
+		 __bss_limit = .;
+	}
+
+	.bss_end __bss_limit (OVERLAY) : {
+		KEEP(*(.__bss_end));
+	}
+
+	.dynsym _image_binary_end : { *(.dynsym) }
+	.dynbss : { *(.dynbss) }
+	.dynstr : { *(.dynstr*) }
+	.dynamic : { *(.dynamic*) }
+	.gnu.hash : { *(.gnu.hash) }
+	.plt : { *(.plt*) }
+	.interp : { *(.interp*) }
+	.gnu : { *(.gnu*) }
+	.ARM.exidx : { *(.ARM.exidx*) }
+}

board/nm/netbird/board.c

@@ -400,7 +400,7 @@ int board_late_init(void)
 		boot_partition = 0;
 	}
 
-	/* mmcblk0p1 => root0, mmcblk0p2 => root1 so +1 */
+	/* mmcblk1p1 => root0, mmcblk1p2 => root1 so +1 */
 	setenv_ulong("root_part", boot_partition + 1);
 
 	check_reset_button();

board/nm/netbird_v2/board.c

@@ -80,8 +80,6 @@ static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
 
 static BD_Context   bdctx[3];		/* The descriptor context */
 
-#define SHIELD_COM_IO	0
-#define SHIELD_DUALCAN	1
 
 static int _bd_init(void)
 {
@@ -591,6 +589,16 @@ static struct shield_command known_shield_commands[] = {
 		"fdt set $can1 status okay;",
 		can_shield_init
 	},
+	{
+		SHIELD_DUALCAN_PASSIVE,
+		"dualcan",
+		"shield dualcan termination off off",
+		"fdt get value can0 /aliases d_can0;" \
+		"fdt get value can1 /aliases d_can1;" \
+		"fdt set $can0 status okay;" \
+		"fdt set $can1 status okay;",
+		can_shield_init
+	}
 };
 
 static const struct shield_command* get_shield_command(int shield_id)
@@ -665,7 +673,7 @@ int board_late_init(void)
 		boot_partition = 0;
 	}
 
-	/* mmcblk0p1 => root0, mmcblk0p2 => root1 so +1 */
+	/* mmcblk1p1 => root0, mmcblk1p2 => root1 so +1 */
 	setenv_ulong("root_part", boot_partition + 1);
 
 	check_reset_button();

board/nm/netbird_v2/shield.h

@@ -8,6 +8,11 @@
 #ifndef SHIELD_H
 #define SHIELD_H
 
+#define SHIELD_COM_IO		0
+#define SHIELD_DUALCAN		1
+#define SHIELD_CAN_GNSS		2
+#define SHIELD_DUALCAN_PASSIVE	3
+
 struct shield_t{
     char name[64];
     int (*setmode)(char * const argv[], int argc);

board/nm/netbird_v2/shield_can.c

@@ -9,8 +9,8 @@
 
 #define NETBIRD_GPIO_RST_SHIELD_N GPIO_TO_PIN(0, 27)
 #define NETBIRD_GPIO_LATCH GPIO_TO_PIN(0, 7)
-#define NETBIRD_GPIO_MODE_0 GPIO_TO_PIN(1, 8)
-#define NETBIRD_GPIO_MODE_1 GPIO_TO_PIN(1, 10)
+#define NETBIRD_GPIO_MODE_0 GPIO_TO_PIN(1, 10)
+#define NETBIRD_GPIO_MODE_1 GPIO_TO_PIN(1, 8)
 
 
 static int shield_slot_initialized = 0;

board/nm/nmhw21/Kconfig

@@ -15,7 +15,7 @@ config SYS_CONFIG_NAME
 config CONS_INDEX
         int "UART used for console"
         range 1 6
-	default 3
+        default 3
         help
           The AM335x SoC has a total of 6 UARTs (UART0 to UART5 as referenced
           in documentation, etc) available to it.  Depending on your specific

board/nm/nmhw21/Makefile

@@ -10,4 +10,4 @@ ifeq ($(CONFIG_SKIP_LOWLEVEL_INIT),)
 obj-y	:= mux.o
 endif
 
-obj-y	+= board.o ../common/bdparser.o ../common/board_descriptor.o fileaccess.o da9063.o sja1105.o ui.o um.o
+obj-y	+= board.o ../common/bdparser.o ../common/board_descriptor.o ../common/da9063.o ../common/ether_crc.o fileaccess.o sja1105.o ui.o um.o reset_reason.o

board/nm/nmhw21/board.h

@@ -13,8 +13,10 @@
 
 void enable_uart0_pin_mux(void);
 void enable_uart2_pin_mux(void);
+void enable_uart4_pin_mux(void);
 void enable_spi1_mux(void);
-
+void enable_led_mux(void);
+void enable_led_mux_v32(void);
 void enable_board_pin_mux(void);
 
 #define GPIO_TO_PIN(bank, gpio)		(32 * (bank) + (gpio))

board/nm/nmhw21/fileaccess.c

@@ -1,6 +1,7 @@
 #include <common.h>
 #include <fs.h>
 
+#define BLOCK_DEVICE "mmc"
 #define OVERLAY_PART "1:3"
 
 int read_file(const char* filename, char *buf, int size)
@@ -9,14 +10,12 @@ int read_file(const char* filename, char *buf, int size)
 	loff_t len;
 	int ret;
 
-	/* If consoldev is set take this as productive conosle instead of default console */
-	if (fs_set_blk_dev("mmc", OVERLAY_PART, FS_TYPE_EXT) != 0) {
+	if (fs_set_blk_dev(BLOCK_DEVICE, OVERLAY_PART, FS_TYPE_EXT) != 0) {
 		puts("Error, can not set blk device\n");
 		return -1;
 	}
 
-
-	/* File does not exist, do not print an error message */
+	/* Read at most file size bytes */
 	if (fs_size(filename, &filesize)) {
 		return -1;
 	}
@@ -24,13 +23,12 @@ int read_file(const char* filename, char *buf, int size)
 	if (filesize < size)
 		size = filesize;
 
-	/* If consoldev is set take this as productive conosle instead of default console */
-	if (fs_set_blk_dev("mmc", OVERLAY_PART, FS_TYPE_EXT) != 0) {
+	/* For very unclear reasons the block device needs to be set again after the call to fs_size() */
+	if (fs_set_blk_dev(BLOCK_DEVICE, OVERLAY_PART, FS_TYPE_EXT) != 0) {
 		puts("Error, can not set blk device\n");
 		return -1;
 	}
 
-
 	if ((ret = fs_read(filename, (ulong)buf, 0, size, &len))) {
 		printf("Can't read file %s (size %d, len %lld, ret %d)\n", filename, size, len, ret);
 		return -1;

board/nm/nmhw21/mux.c

@@ -1,7 +1,7 @@
 /*
  * mux.c
  *
- * Copyright (C) 2018 NetModule AG - http://www.netmodule.com/
+ * Copyright (C) 2018-2019 NetModule AG - http://www.netmodule.com/
  * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
  *
  * This program is free software; you can redistribute it and/or
@@ -23,24 +23,22 @@
 
 static struct module_pin_mux gpio_pin_mux[] = {
 	/*
+	* (V2)  GPIO0_8: RS232_485n_SEL (V3.2)
+	* (V3)  GPIO0_9: RS485_DE (V3.2)
 	* (J18) GPIO0_16: ETH_SW_RST~ (V2.0)
 	* (K15) GPIO0_17: CTRL.INT~
 	* (T10) GPIO0_23: CAN_TERM1~ (V1.0)
-	* (T17) GPIO0_30: LED0.GN
 	*
 	* (T12) GPIO1_12: SIM_SW
 	* (V13) GPIO1_14: GNSS_RST~
 	* (U13) GPIO1_15: CAN_TERM0~ (V1.0)
 	* (R14) GPIO1_20: BT_EN
 	* (V15) GPIO1_21: GSM_PWR_EN
-	* (U15) GPIO1_22: LED1.RD
-	* (V16) GPIO1_24: LED1.GN
 	* (U16) GPIO1_25: RST_GSM
 	* (T16) GPIO1_26: WLAN_EN
 	* (V17) GPIO1_27: WLAN_IRQ
-	* (U18) GPIO1_28: LED0.RD
 	*
-	* (U3) GPIO2_16: SIM_PRES~ (V2.0)
+	* (U3) GPIO2_16: TIMEPULSE (HW26), see note [1]
 	* (R6) GPIO2_25: RST_ETH~
 	*
 	* (J17) GPIO3_4: GNSS_EXTINT
@@ -48,47 +46,31 @@ static struct module_pin_mux gpio_pin_mux[] = {
 	* (L18) GPIO3_10: CTRL.RST
 	* (C12) GPIO3_17: UI_RST~
 	* (A14) GPIO3_21: RST_HUB~ (USB)
+	*
+	* [1] No PU/PD allowed as TIMEPULSE is internally connected with SAFEBOOT_N.
+	*     SAFEBOOT_N must be left open/floating.
 	*/
 
 	/* Bank 0 */
 	{OFFSET(mii1_txd3), (MODE(7) | PULLUDDIS)},				/* (J18) GPIO0_16: ETH_SW_RST~ (V2.0) */
 	{OFFSET(mii1_txd2), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (K15) GPIO0_17: CTRL.INT~ */
 	{OFFSET(gpmc_ad9), (MODE(7) | PULLUDDIS)},				/* (T10) GPIO0_23: CAN_TERM1~ */
-	{OFFSET(gpmc_wait0), (MODE(7) | PULLUDDIS)},				/* (T17) GPIO0_30: LED0.GN */
 
 	/* Bank 1 */
-	{OFFSET(gpmc_ad12), (MODE(7) | PULLUDDIS)},				/* (T12) GPIO1_12: SIM_SW */
+	{OFFSET(gpmc_ad12), (MODE(7) | PULLUDEN | PULLUP_EN)},			/* (T12) GPIO1_12: SIM_SW */
 	{OFFSET(gpmc_ad14), (MODE(7) | PULLUDDIS)},				/* (V13) GPIO1_14: GNSS_RST~ */
 	{OFFSET(gpmc_ad15), (MODE(7) | PULLUDDIS)},				/* (U13) GPIO1_15: CAN_TERM0~ */
 
 	{OFFSET(gpmc_a4), (MODE(7) | PULLUDDIS)},				/* (R14) gpio1_20: BT_EN */
 	{OFFSET(gpmc_a5), (MODE(7) | PULLUDDIS)},				/* (V15) gpio1_21: GSM_PWR_EN */
-	{OFFSET(gpmc_a6), (MODE(7) | PULLUDDIS)},				/* (U15) GPIO1_22: LED1.RD */
-	{OFFSET(gpmc_a8), (MODE(7) | PULLUDDIS)},				/* (V16) GPIO1_24: LED1.GN */
 	{OFFSET(gpmc_a9), (MODE(7) | PULLUDDIS)},				/* (U16) gpio1_25: RST_GSM */
 	{OFFSET(gpmc_a10), (MODE(7) | PULLUDDIS)},				/* (T16) gpio1_26: WLAN_EN */
 	{OFFSET(gpmc_a11), (MODE(7) | PULLUDDIS | RXACTIVE)},			/* (V17) gpio1_27: WLAN_IRQ */
-	{OFFSET(gpmc_be1n), (MODE(7) | PULLUDDIS)},				/* (U18) GPIO1_28: LED0.RD */
-
-	/* TODO: What about all the unused GPMC pins ? */
 
 	/* Bank 2 */
-	{OFFSET(lcd_data10), (MODE(7) | PULLUDDIS)},				/* (U3) GPIO2_16: SIM_PRES~ */
+	{OFFSET(lcd_data10), (MODE(7) | PULLUDDIS | RXACTIVE)},			/* (U3) GPIO2_16: TIMEPULSE */
 	{OFFSET(lcd_ac_bias_en), (MODE(7) | PULLUDDIS)},			/* (R6) GPIO2_25: RST_ETH~ */
 
-#if 0
-	/* TODO: What is this meant for? */
-	{OFFSET(lcd_data3), (MODE(7) | PULLUDEN | PULLUP_EN)},	/* (R4) gpio2[9] */  /* SYSBOOT_3 */
-	{OFFSET(lcd_data4), (MODE(7) | PULLUDEN | PULLUP_EN)},	/* (T1) gpio2[10] */  /* SYSBOOT_4 */
-
-	/* TODO: Check other unued pins from sysboot block */
-	/* Ensure PU/PD does not work against external signal */
-	/*
-	 * SYSBOOT 0,1,5,12,13 = Low
-	 * SYSBOOT 2 = High
-	 */
-#endif
-
 	/* Bank 3 */
 	{OFFSET(mii1_rxdv), (MODE(7) | PULLUDDIS)},			/* (J17) GPIO3_4: GNSS_EXTINT */
 	{OFFSET(mii1_txclk), (MODE(7) | PULLUDDIS)},			/* (K18) GPIO3_9: CTRL.W_DIS */
@@ -98,6 +80,39 @@ static struct module_pin_mux gpio_pin_mux[] = {
 	{-1}
 };
 
+static struct module_pin_mux led_pin_mux[] = {
+	/*
+	* (T17) GPIO0_30: LED0.GN
+	* (U15) GPIO1_22: LED1.RD
+	* (V16) GPIO1_24: LED1.GN
+	* (U18) GPIO1_28: LED0.RD
+	*/
+
+	{OFFSET(gpmc_wait0), (MODE(7) | PULLUDDIS)},				/* (T17) GPIO0_30: LED0.GN */
+	{OFFSET(gpmc_a6), (MODE(7) | PULLUDDIS)},				/* (U15) GPIO1_22: LED1.RD */
+	{OFFSET(gpmc_a8), (MODE(7) | PULLUDDIS)},				/* (V16) GPIO1_24: LED1.GN */
+	{OFFSET(gpmc_be1n), (MODE(7) | PULLUDDIS)},				/* (U18) GPIO1_28: LED0.RD */
+	{-1}
+};
+
+static struct module_pin_mux led_pin_mux_v32[] = {
+	/*
+	* (C15) GPIO0_6: MB_LED_PWM
+	* (U15) GPIO1_22: LED1.RD
+	* (T15) GPIO1_23: LED0.GN (formerly: (T17) GPIO0_30)
+	* (V16) GPIO1_24: LED1.GN
+	* (U18) GPIO1_28: LED0.RD
+	*/
+
+	{OFFSET(spi0_cs1), (MODE(7) | PULLUDDIS)},				/* (C15) GPIO0_6: MB_LED_PWM */
+	{OFFSET(gpmc_a6), (MODE(7) | PULLUDDIS)},				/* (U15) GPIO1_22: LED1.RD */
+	{OFFSET(gpmc_a7), (MODE(7) | PULLUDDIS)},				/* (T15) GPIO1_23: LED0.GN */
+	{OFFSET(gpmc_a8), (MODE(7) | PULLUDDIS)},				/* (V16) GPIO1_24: LED1.GN */
+	{OFFSET(gpmc_be1n), (MODE(7) | PULLUDDIS)},				/* (U18) GPIO1_28: LED0.RD */
+	{-1}
+};
+
+
 /* I2C0 PMIC */
 static struct module_pin_mux i2c0_pin_mux[] = {
 	{OFFSET(i2c0_sda), (MODE(0) | RXACTIVE | PULLUDEN | PULLUP_EN | SLEWCTRL)},	/* (C17) I2C0_SDA */
@@ -129,33 +144,33 @@ static struct module_pin_mux rmii1_pin_mux[] = {
 	{OFFSET(mdio_data), MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE},		/* (M17) mdio_data */
 
 	/* 25MHz Clock Output */
-	{OFFSET(xdma_event_intr0), MODE(3)},					/* OK (A15) clkout1 (25 MHz clk for Switch) */
+	{OFFSET(xdma_event_intr0), MODE(3)},					/* (A15) clkout1 (25 MHz clk for Switch) */
 	{-1}
 };
 
 /* MMC0: WiFi */
 static struct module_pin_mux mmc0_sdio_pin_mux[] = {
-	{OFFSET(mmc0_clk), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* MMC0_CLK */
-	{OFFSET(mmc0_cmd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* MMC0_CMD */
-	{OFFSET(mmc0_dat0), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* MMC0_DAT0 */
-	{OFFSET(mmc0_dat1), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* MMC0_DAT1 */
-	{OFFSET(mmc0_dat2), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* MMC0_DAT2 */
-	{OFFSET(mmc0_dat3), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* MMC0_DAT3 */
+	{OFFSET(mmc0_clk), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (G17) MMC0_CLK */
+	{OFFSET(mmc0_cmd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (G18) MMC0_CMD */
+	{OFFSET(mmc0_dat0), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (G16) MMC0_DAT0 */
+	{OFFSET(mmc0_dat1), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (G15) MMC0_DAT1 */
+	{OFFSET(mmc0_dat2), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (F18) MMC0_DAT2 */
+	{OFFSET(mmc0_dat3), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (F17) MMC0_DAT3 */
 	{-1}
 };
 
 /* MMC1: eMMC */
 static struct module_pin_mux mmc1_emmc_pin_mux[] = {
-	{OFFSET(gpmc_csn1), (MODE(2) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* MMC1_CLK */
-	{OFFSET(gpmc_csn2), (MODE(2) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* MMC1_CMD */
-	{OFFSET(gpmc_ad0), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* MMC1_DAT0 */
-	{OFFSET(gpmc_ad1), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* MMC1_DAT1 */
-	{OFFSET(gpmc_ad2), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* MMC1_DAT2 */
-	{OFFSET(gpmc_ad3), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* MMC1_DAT3 */
-	{OFFSET(gpmc_ad4), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* MMC1_DAT4 */
-	{OFFSET(gpmc_ad5), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* MMC1_DAT5 */
-	{OFFSET(gpmc_ad6), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* MMC1_DAT6 */
-	{OFFSET(gpmc_ad7), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* MMC1_DAT7 */
+	{OFFSET(gpmc_csn1), (MODE(2) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (U9) MMC1_CLK */
+	{OFFSET(gpmc_csn2), (MODE(2) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (V9) MMC1_CMD */
+	{OFFSET(gpmc_ad0), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (U7) MMC1_DAT0 */
+	{OFFSET(gpmc_ad1), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (V7) MMC1_DAT1 */
+	{OFFSET(gpmc_ad2), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (R8) MMC1_DAT2 */
+	{OFFSET(gpmc_ad3), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (T8) MMC1_DAT3 */
+	{OFFSET(gpmc_ad4), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (U8) MMC1_DAT4 */
+	{OFFSET(gpmc_ad5), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (V8) MMC1_DAT5 */
+	{OFFSET(gpmc_ad6), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (R9) MMC1_DAT6 */
+	{OFFSET(gpmc_ad7), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (T9) MMC1_DAT7 */
 	{-1}
 };
 
@@ -203,8 +218,22 @@ static struct module_pin_mux uart2_pin_mux[] = {
 
 /* UART3: GNSS */
 static struct module_pin_mux uart3_pin_mux[] = {
-	{OFFSET(mii1_rxd3), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (L17) UART3_RXD */
-	{OFFSET(mii1_rxd2), (MODE(1) | PULLUDEN | PULLUP_EN | SLEWCTRL)},	/* (L16) UART3_TXD */
+	{OFFSET(mii1_rxd3), (MODE(1) | PULLUDDIS | RXACTIVE)},			/* (L17) UART3_RXD */
+	{OFFSET(mii1_rxd2), (MODE(1) | PULLUDDIS | SLEWCTRL)},			/* (L16) UART3_TXD */
+	{-1}
+};
+
+/* UART4: User RS232/485 (V3.2 only) */
+static struct module_pin_mux uart4_pin_mux[] = {
+	/*
+	 * CTSn = SEL_RS232/RS485~: Default = Low -> RS485 mode
+	 * RTSn = RS485_DE: Default = Low -> RS485 transmitter disabled
+	 *        Configure as GPIO in U-Boot to keep disabled, Linux will change to RTSn
+	 */
+	{OFFSET(gpmc_wait0), (MODE(6) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (T17) UART4_RXD */
+	{OFFSET(gpmc_wpn), (MODE(6) | PULLUDEN | PULLUP_EN | SLEWCTRL)},	/* (U17) UART4_TXD */
+	{OFFSET(lcd_data12), (MODE(7) | PULLUDEN | PULLDOWN_EN)},		/* (V2) uart4_ctsn */
+	{OFFSET(lcd_data13), (MODE(7) | PULLUDEN | PULLDOWN_EN)},		/* (V3) uart4_rtsn */
 	{-1}
 };
 
@@ -268,10 +297,22 @@ void enable_uart2_pin_mux(void)
 	configure_module_pin_mux(uart2_pin_mux);
 }
 
+void enable_uart4_pin_mux(void)
+{
+	configure_module_pin_mux(uart4_pin_mux);
+}
+
 void enable_spi1_mux(void)
 {
 	configure_module_pin_mux(spi1_pin_mux);
 }
 
+void enable_led_mux(void)
+{
+	configure_module_pin_mux(led_pin_mux);
+}
 
-
+void enable_led_mux_v32(void)
+{
+	configure_module_pin_mux(led_pin_mux_v32);
+}

board/nm/nmhw21/reset_reason.c

@@ -0,0 +1,81 @@
+/*
+ * reset_reason.c
+ *
+ * Reset/start reason handling
+ *
+ * Copyright (C) 2021 NetModule AG - https://www.netmodule.com/
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#include <common.h>
+#include "../common/ether_crc.h"
+#include "reset_reason.h"
+
+
+void rr_set_reset_reason(volatile struct reset_registers* reset_regs, uint32_t reason)
+{
+	reset_regs->rr_value = reason;
+	reset_regs->rr_value_crc = ether_crc(sizeof(reset_regs->rr_value),
+					     (const uint8_t*)&(reset_regs->rr_value));
+}
+
+bool rr_is_reset_reason_valid(volatile const struct reset_registers* reset_regs)
+{
+	const uint32_t crc = ether_crc(sizeof(reset_regs->rr_value), 
+				       (const uint8_t*)&(reset_regs->rr_value));
+	return crc == reset_regs->rr_value_crc;
+}
+
+void rr_set_start_reason(volatile struct reset_registers* reset_regs, uint32_t event)
+{
+	/* Store start events in shared memory region for OS */
+	reset_regs->sr_magic = SR_MAGIC;
+	reset_regs->sr_events = event;
+	reset_regs->sr_checksum = ether_crc(sizeof(reset_regs->sr_events),
+					    (const uint8_t*)&(reset_regs->sr_events));	
+}
+
+bool rr_is_start_reason_valid(volatile const struct reset_registers* reset_regs)
+{
+	if (reset_regs->sr_magic == SR_MAGIC) {
+		const uint32_t crc = ether_crc(sizeof(reset_regs->sr_events), 
+					(const uint8_t*)&(reset_regs->sr_events));
+		if (crc == reset_regs->sr_checksum) {
+			return true;
+		}
+	}
+	
+	return false;
+}
+
+void rr_start_reason_to_str(uint32_t events, char* buffer, size_t bufsize)
+{
+	if (events == 0) {
+		strncpy(buffer, "-\n", bufsize);
+	}
+	else {
+		buffer[0] = 0;
+		if (events & SR_POR)
+			strncat(buffer, "PowerOn, ", bufsize);
+		if (events & SR_WATCHDOG)
+			strncat(buffer, "Watchdog, ", bufsize);
+		if (events & SR_REBOOT)
+			strncat(buffer, "Reboot, ", bufsize);
+		if (events & SR_WAKEUP)
+			strncat(buffer, "Wakeup, ", bufsize);
+
+		if (events & SR_EVT_IGNITION)
+			strncat(buffer, "Ignition, ", bufsize);
+		if (events & SR_EVT_RTC_ALARM)
+			strncat(buffer, "RTC, ", bufsize);
+		if (events & SR_EVT_RTC_TICK)
+			strncat(buffer, "Tick, ", bufsize);
+		if (events & SR_EVT_GPI)
+			strncat(buffer, "GPI, ", bufsize);
+		if (events & SR_EVT_BUTTON)
+			strncat(buffer, "Button, ", bufsize);
+
+		/* Trim last comma, no 0 len check required, at least one entry is present */
+		buffer[strlen(buffer)-2] = 0;
+	}
+}

board/nm/nmhw21/reset_reason.h

@@ -0,0 +1,60 @@
+/*
+ * reset_reason.h
+ *
+ * Reset/start reason handling
+ *
+ * Copyright (C) 2021 NetModule AG - https://www.netmodule.com/
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef RESET_REASON_H
+#define RESET_REASON_H
+
+struct reset_registers {
+	/* Reboot Reasons, set by OS, expect watchdog set by bootloader */
+	uint32_t rr_value;
+	uint32_t rr_value_crc;
+
+	/* Start Reasons as determined by hardware */
+	uint32_t sr_magic;	/* Token to check presence of following fields */
+	uint32_t sr_events;	/* Events bitmask, see SE_... defines */
+	uint32_t sr_checksum;	/* Checksum over se_events */
+};
+
+/* Watchdog reboot reason event */
+#define RR_POWEROFF_PATTERN		0x00000000
+#define RR_EXTERNAL_WATCHDOG_PATTERN	0x781f9ce2
+#define RR_BOOT_PATTERN			0x424f4f54	/* ‘BOOT’, 0xb9808470 */
+#define RR_REBOOT_PATTERN		0x5245424f	/* ‘REBO’, 0x7d5d9d66 */
+#define RR_OOPS_PATTERN			0x4F4F5053	/* ‘OOPS’, 0x2b85bc5f */
+#define RR_WAKE_PATTERN			0x57414B45	/* 'WAKE', 0x7b0acb48 */
+
+/* Start reason token 'SRTE' */
+#define SR_MAGIC			0x53525445
+
+/* Possible start events (see sr_events) */
+#define SR_POR  			0x00000001
+#define SR_WATCHDOG  			0x00000010
+#define SR_REBOOT  			0x00000020
+#define SR_WAKEUP  			0x00000080	/* See SR_EVT_xx bits */
+
+/* In case of wake-up, these are the events that caused the start */
+#define SR_EVT_IGNITION  		0x00000100
+#define SR_EVT_RTC_ALARM  		0x00000200	/* RTC date/time alarm */
+#define SR_EVT_RTC_TICK  		0x00000400	/* RTC tick based alarm */
+#define SR_EVT_GPI			0x00000800	/* General purpose input(s) */
+#define SR_EVT_BUTTON			0x00001000	
+#define SR_EVT_WAKE_MASK		0x00001F00
+
+
+
+extern void rr_set_reset_reason(volatile struct reset_registers* reset_regs, uint32_t reason);
+extern bool rr_is_reset_reason_valid(volatile const struct reset_registers* reset_regs);
+
+extern void rr_set_start_reason(volatile struct reset_registers* reset_regs, uint32_t event);
+extern bool rr_is_start_reason_valid(volatile const struct reset_registers* reset_regs);
+extern void rr_start_reason_to_str(uint32_t events, char* buffer, size_t bufsize);
+
+
+#endif /* RESET_REASON_H */

board/nm/nmhw21/sja1105.c

@@ -90,10 +90,10 @@ void sja1105_write_reg(uint32_t address, uint32_t data)
 
 void sja1105_configure_firmware(void)
 {
-	static const uint8_t config_data_0[] = { 0x80, 0x20, 0x00, 0x00, 0x9E, 0x00, 0x03, 0x0E, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x21, 0x6F, 0x25, 0x6B, 0xFE, 0xF7, 0x00, 0x00, 0x03, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x03, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x03, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x03, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x03, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x03, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x03, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x03, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x07, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x07, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x07, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x07, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x07, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x07, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x07, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x07, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x0B, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x0B, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x0B, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x0B, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x0B, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x0B, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x0B, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x0B, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x0F, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x0F, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x0F, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x0F, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x0F, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x0F, 0xFF, 0xFF, 0xFF };
-	static const uint8_t config_data_1[] = { 0x80, 0x20, 0x04, 0x00, 0xFE, 0xF7, 0x00, 0x00, 0x0F, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x0F, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x13, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x13, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x13, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x13, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x13, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x13, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x13, 0xFF, 0xFF, 0xFF, 0xFE, 0xF7, 0x00, 0x00, 0x13, 0xFF, 0xFF, 0xFF, 0xFA, 0x2E, 0x19, 0xF8, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x7D, 0x0B, 0xCB, 0xF2, 0xF8, 0x00, 0x00, 0x00, 0x00, 0x31, 0x80, 0x7F, 0x09, 0x52, 0x68, 0x0D, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1A, 0x6A, 0xF6, 0x23, 0x53, 0x10, 0x00, 0x00, 0x00, 0xF7, 0xBD, 0xF5, 0x8D, 0x10, 0x00, 0x00, 0x00, 0xEF, 0x7B, 0xF5, 0x8D, 0x10, 0x00, 0x00, 0x00, 0xDE, 0xF7, 0xF5, 0x8D, 0x10, 0x00, 0x00, 0x00, 0xBD, 0xEF, 0xF5, 0x8D, 0x10, 0x00, 0x00, 0x00, 0x7B, 0xDF, 0xF5, 0x8D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC0, 0x04, 0xA6, 0x06, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23, 0xDA, 0xB5, 0xBD, 0xC8, 0x00, 0x3F, 0xFC, 0x08, 0x00, 0x00, 0x00, 0x00, 0x07, 0xFC, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00 };
-	static const uint8_t config_data_2[] = { 0x80, 0x20, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F, 0xFC, 0x08, 0x00, 0x00, 0x00, 0x00, 0x07, 0xFC, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F, 0xFC, 0x08, 0x00, 0x00, 0x00, 0x00, 0x07, 0xFC, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F, 0xFC, 0x0E, 0x00, 0x00, 0x00, 0x00, 0x07, 0xFC, 0x01, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F, 0xFC, 0x0E, 0x00, 0x00, 0x00, 0x00, 0x07, 0xFC, 0x01, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x83, 0x75, 0xF9, 0x8D, 0x0D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x25, 0x0E, 0x7C, 0xBD, 0x00, 0x01, 0x25, 0xC0, 0x70, 0x94, 0x84, 0x50, 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0xC8, 0xA7, 0xCE, 0xE6, 0x00, 0x71, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC3, 0xF7, 0x04, 0xB9, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0A, 0x57, 0x1F, 0x81, 0x3F, 0x06, 0x44, 0x00, 0x00, 0x00, 0x00, 0x04, 0x08, 0x00, 0x00, 0x00, 0x00, 0xFF, 0x0D, 0xB0, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x58, 0x00, 0x00, 0x00, 0x5A, 0x9C, 0x37, 0x20, 0x4E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x3A, 0x5D, 0x5E, 0x24, 0xA4, 0x9A, 0x00, 0x00, 0x7B, 0x51, 0xDA, 0x7D, 0x00, 0x00, 0x00, 0x00 };
-	static const uint8_t config_data_3[] = { 0x80, 0x20, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x37, 0x6E, 0x02, 0x8B };
+    static const uint8_t config_data_0[] = { 0x80, 0x20, 0x00, 0x00, 0x9E, 0x00, 0x03, 0x0E, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x21, 0x6F, 0x25, 0x6B, 0xFE, 0xF9, 0x00, 0x00, 0x03, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x03, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x03, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x03, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x03, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x03, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x03, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x03, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x07, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x07, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x07, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x07, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x07, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x07, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x07, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x07, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x0B, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x0B, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x0B, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x0B, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x0B, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x0B, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x0B, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x0B, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x0F, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x0F, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x0F, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x0F, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x0F, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x0F, 0xFF, 0xFF, 0xFF };
+    static const uint8_t config_data_1[] = { 0x80, 0x20, 0x04, 0x00, 0xFE, 0xF9, 0x00, 0x00, 0x0F, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x0F, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x13, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x13, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x13, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x13, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x13, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x13, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x13, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x13, 0xFF, 0xFF, 0xFF, 0x03, 0x68, 0x8B, 0xEA, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x7D, 0x0B, 0xCB, 0xF2, 0xF8, 0x00, 0x00, 0x00, 0x00, 0x31, 0x80, 0x7F, 0x09, 0x52, 0x68, 0x0D, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1A, 0x6A, 0xF6, 0x23, 0x53, 0x10, 0x00, 0x00, 0x00, 0xF7, 0xBD, 0xF5, 0x8D, 0x10, 0x00, 0x00, 0x00, 0xEF, 0x7B, 0xF5, 0x8D, 0x10, 0x00, 0x00, 0x00, 0xDE, 0xF7, 0xF5, 0x8D, 0x10, 0x00, 0x00, 0x00, 0xBD, 0xEF, 0xF5, 0x8D, 0x10, 0x00, 0x00, 0x00, 0x7B, 0xDF, 0xF5, 0x8D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC0, 0x04, 0xA6, 0x06, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23, 0xDA, 0xB5, 0xBD, 0xC8, 0x00, 0x3F, 0xFC, 0x08, 0x00, 0x00, 0x00, 0x00, 0x07, 0xFC, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00 };
+    static const uint8_t config_data_2[] = { 0x80, 0x20, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F, 0xFC, 0x08, 0x00, 0x00, 0x00, 0x00, 0x07, 0xFC, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F, 0xFC, 0x08, 0x00, 0x00, 0x00, 0x00, 0x07, 0xFC, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F, 0xFC, 0x0E, 0x00, 0x00, 0x00, 0x00, 0x07, 0xFC, 0x01, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F, 0xFC, 0x0E, 0x00, 0x00, 0x00, 0x00, 0x07, 0xFC, 0x01, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x83, 0x75, 0xF9, 0x8D, 0x0D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x25, 0x0E, 0x7C, 0xBD, 0x00, 0x01, 0x25, 0xC0, 0x70, 0x94, 0x84, 0x50, 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0xC8, 0xA7, 0xCE, 0xE6, 0x00, 0x71, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC3, 0xF7, 0x04, 0xB9, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0A, 0x57, 0x1F, 0x81, 0x3F, 0x06, 0x44, 0x00, 0x00, 0x00, 0x00, 0x04, 0x08, 0x00, 0x00, 0x00, 0x00, 0xFF, 0x0D, 0xB0, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x58, 0x00, 0x00, 0x00, 0x5A, 0x9C, 0x37, 0x20, 0x4E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x3A, 0x5D, 0x5E, 0x24, 0xA4, 0x9A, 0x00, 0x00, 0x7B, 0x51, 0xDA, 0x7D, 0x00, 0x00, 0x00, 0x00 };
+    static const uint8_t config_data_3[] = { 0x80, 0x20, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x37, 0x6E, 0x02, 0x8B };
 
 	uint32_t val;
 	int rc;

board/nm/nrhw20/Makefile

@@ -10,4 +10,4 @@ ifeq ($(CONFIG_SKIP_LOWLEVEL_INIT),)
 obj-y	:= mux.o
 endif
 
-obj-y	+= board.o ../common/bdparser.o ../common/board_descriptor.o shield.o shield_can.o shield_comio.o fileaccess.o da9063.o
+obj-y	+= board.o ../common/bdparser.o ../common/board_descriptor.o ../common/da9063.o shield.o shield_can.o shield_comio.o fileaccess.o

board/nm/nrhw20/board.h

@@ -10,6 +10,7 @@
 
 #ifndef _BOARD_H_
 #define _BOARD_H_
+
 /*
  * We have three pin mux functions that must exist.  We must be able to enable
  * uart0, for initial output and i2c2 to read the main EEPROM.  We then have a
@@ -19,15 +20,9 @@
 void enable_uart0_pin_mux(void);
 void disable_uart0_pin_mux(void);
 void enable_uart1_pin_mux(void);
-/*
-void enable_uart2_pin_mux(void);
-void enable_uart3_pin_mux(void);
-void enable_uart4_pin_mux(void);
-void enable_uart5_pin_mux(void);
-*/
-void enable_i2c0_pin_mux(void);
-void enable_i2c2_pin_mux(void);
+
 void enable_board_pin_mux(void);
 
 #define GPIO_TO_PIN(bank, gpio)		(32 * (bank) + (gpio))
+
 #endif

board/nm/nrhw20/da9063.c

@@ -1,92 +0,0 @@
-/*
- * da9063.c
- *
- * Dialog DA9063 PMIC
- *
- * Copyright (C) 2018 NetModule AG - http://www.netmodule.com/
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <errno.h>
-#include <i2c.h>
-
-#include "da9063.h"
-
-
-static int da9063_i2c_bus = 0;
-
-
-void da9063_init(int i2c_bus)
-{
-	da9063_i2c_bus = i2c_bus;
-}
-
-int da9063_get_reg(int reg, u8* val)
-{
-	int ret;
-	int old_bus;
-	u8 temp;
-
-	/* TODO: Check whether switching is required */
-	old_bus = i2c_get_bus_num();
-	i2c_set_bus_num(da9063_i2c_bus);
-
-	/* TODO: Use CONFIG_PMIC_I2C_ADDR+1 if reg > 0xFF */
-	*val = 0;
-	ret = i2c_read(CONFIG_PMIC_I2C_ADDR, reg, 1, &temp, 1);
-	if (ret == 0)
-		*val = temp;
-
-	i2c_set_bus_num(old_bus);
-
-	return ret;
-}
-
-int da9063_set_reg(int reg, u8 val)
-{
-	int ret;
-	int old_bus;
-
-	/* TODO: Check whether switching is required */
-	old_bus = i2c_get_bus_num();
-	i2c_set_bus_num(da9063_i2c_bus);
-
-	/* TODO: Use CONFIG_PMIC_I2C_ADDR+1 if reg > 0xFF */
-	ret = i2c_write(CONFIG_PMIC_I2C_ADDR, reg, 1, &val, 1);
-	if (ret != 0)
-		puts("da9063 write error\n");
-
-	i2c_set_bus_num(old_bus);
-
-	return ret;
-}
-
-void da9063_set_gpio(unsigned bit, int state)
-{
-	int pmic_reg;
-	int ret;
-	u8 bitmask;
-	u8 reg = 0x00;
-
-	if (bit <= 7) {
-		pmic_reg = PMIC_REG_GPIO_MODE0_7;
-		bitmask = 1U << (bit-0);
-	}
-	else  {
-		pmic_reg = PMIC_REG_GPIO_MODE8_15;
-		bitmask = 1U << (bit-8);
-	}
-
-/*	printf("da9063_set_gpio %d 0x%04x\n", pmic_reg, bitmask); */
-	ret = da9063_get_reg(pmic_reg, &reg);
-
-	if (ret == 0)  {
-		if (state)	reg |=  bitmask;
-		else		reg &= ~bitmask;
-
-		(void)da9063_set_reg(pmic_reg, reg);
-	}
-}
-

board/nm/nrhw20/da9063.h

@@ -1,36 +0,0 @@
-/*
- * da9063.c
- *
- * Dialog DA9063 PMIC
- *
- * Copyright (C) 2018 NetModule AG - http://www.netmodule.com/
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef DA9063_H
-#define DA9063_H
-
-
-#define CONFIG_PMIC_I2C_BUS	0
-#define CONFIG_PMIC_I2C_ADDR	0x58	/* Pages 0 and 1, Pages 2 and 3 -> 0x59 */
-
-#define PMIC_REG_STATUS_A	0x01	/* Status of ON_KEY, WAKE, COMP1V2, DVC */
-#define PMIC_REG_GPIO_MODE0_7	0x1D	/* Control register for GPIOs 0..7 */
-#define PMIC_REG_GPIO_MODE8_15	0x1E	/* Control register for GPIOs 8..15 */
-
-#define PMIC_REG_BBAT_CONT	0xC5	/* Control register for backup battery */
-
-#define PMIC_REG_BUCK_ILIM_A	0x9A
-#define PMIC_REG_BUCK_ILIM_B	0x9B
-#define PMIC_REG_BUCK_ILIM_C	0x9C
-
-
-extern void da9063_init(int i2c_bus);
-extern int da9063_get_reg(int reg, u8* val);
-extern int da9063_set_reg(int reg, u8 val);
-
-extern void da9063_set_gpio(unsigned bit, int state);
-
-
-#endif /* DA9063_H */

board/nm/nrhw20/mux.c

@@ -1,7 +1,7 @@
 /*
  * mux.c
  *
- * Copyright (C) 2018 NetModule AG - http://www.netmodule.com/
+ * Copyright (C) 2018-2019 NetModule AG - http://www.netmodule.com/
  * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
  *
  * This program is free software; you can redistribute it and/or
@@ -23,50 +23,52 @@
 
 static struct module_pin_mux gpio_pin_mux[] = {
 	/*
-	* GPIO0_2: RST_GNSS~
-	* GPIO0_3: GEOFENCE_GNSS
-	* GPIO0_4: RTK_STAT_GNSS
-	* GPIO0_5: EXTINT_GNSS
-	* GPIO0_6: TIMEPULSE_GNSS
-	* GPIO0_7: PWM / SHIELD LATCH
-	* GPIO0_16: RST_PHY~
-	* GPIO0_17: PMIC FAULT
-	* GPIO0_27: RST_SHIELD~
+	* CPU GPIOs
 	*
-	* GPIO1_14: DIG_OUT
-	* GPIO1_15: DIG_IN
-	* GPIO1_20: BT_EN
-	* GPIO1_21: GSM_PWR_EN
-	* GPIO1_25: RST_GSM
-	* GPIO1_26: WLAN_EN
-	* GPIO1_27: WLAN_IRQ
+	* (A17) GPIO0_2: RST_GNSS~
+	* (B17) GPIO0_3: GEOFENCE_GNSS
+	* (B16) GPIO0_4: RTK_STAT_GNSS
+	* (A16) GPIO0_5: EXTINT_GNSS
+	* (C15) GPIO0_6: TIMEPULSE
+	* (C18) GPIO0_7: PWM / SHIELD LATCH
+	* (J18) GPIO0_16: RST_PHY~
+	* (K15) GPIO0_17: PMIC FAULT
+	* (U12) GPIO0_27: RST_SHIELD~
 	*
-	* GPIO3_4: PCIe_IO.WAKE
-	* GPIO3_9: PCIe_IO.W_DIS
-	* GPIO3_10: PCIe_IO.RST
-	* GPIO3_17: SIM_SEL
-	* GPIO3_21: RST_HUB~ (USB)
+	* (V13) GPIO1_14: DIG_OUT
+	* (U13) GPIO1_15: DIG_IN
+	* (R14) GPIO1_20: BT_EN
+	* (V15) GPIO1_21: GSM_PWR_EN
+	* (U16) GPIO1_25: RST_GSM
+	* (T16) GPIO1_26: WLAN_EN
+	* (V17) GPIO1_27: WLAN_IRQ
+	*
+	* (J17) GPIO3_4: PCIe_IO.WAKE
+	* (K18) GPIO3_9: PCIe_IO.W_DIS
+	* (L18) GPIO3_10: PCIe_IO.RST
+	* (C12) GPIO3_17: SIM_SEL
+	* (A14) GPIO3_21: RST_HUB~ (USB)
 	*/
 
 	/* Bank 0 */
-	{OFFSET(spi0_sclk), (MODE(7) | PULLUDDIS)},			/* (A17) gpio0[2] */  /* RST_GNSS */
-	{OFFSET(spi0_d0), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (B17) gpio0[3] */  /* GEOFENCE_GNSS */
-	{OFFSET(spi0_d1), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (B16) gpio0[4] */  /* RTK_STAT_GNSS */
-	{OFFSET(spi0_cs0), (MODE(7) | PULLUDEN | PULLDOWN_EN)},		/* (A16) gpio0[5] */  /* EXTINT_GNSS */
-	{OFFSET(spi0_cs1), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)},/* (C15) gpio0[6] */  /* TIMEPULSE_GNSS */
-	{OFFSET(ecap0_in_pwm0_out), (MODE(7) | PULLUDEN | PULLUP_EN)},	/* (C18) gpio0[7] */  /* IO_SHIELD */
-	{OFFSET(mii1_txd3), (MODE(7) | PULLUDDIS)},			/* (J18) gpio0[16] */  /* RST_PHY~ */
-	{OFFSET(mii1_txd2), (MODE(7) | PULLUDDIS | RXACTIVE)},		/* (K15) gpio0[17] */  /* PMIC_FAULT */
-	{OFFSET(gpmc_ad11), (MODE(7) | PULLUDDIS)},			/* (U12) gpio0[27] */  /* RST_SHIELD~ */
+	{OFFSET(spi0_sclk), (MODE(7) | PULLUDDIS)},				/* (A17) gpio0[2] */  /* RST_GNSS */
+	{OFFSET(spi0_d0), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)},		/* (B17) gpio0[3] */  /* GEOFENCE_GNSS */
+	{OFFSET(spi0_d1), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)},		/* (B16) gpio0[4] */  /* RTK_STAT_GNSS */
+	{OFFSET(spi0_cs0), (MODE(7) | PULLUDEN | PULLDOWN_EN)},			/* (A16) gpio0[5] */  /* EXTINT_GNSS */
+	{OFFSET(spi0_cs1), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (C15) gpio0[6] */  /* TIMEPULSE */
+	{OFFSET(ecap0_in_pwm0_out), (MODE(7) | PULLUDEN | PULLUP_EN)},		/* (C18) gpio0[7] */  /* IO_SHIELD */
+	{OFFSET(mii1_txd3), (MODE(7) | PULLUDDIS)},				/* (J18) gpio0[16] */  /* RST_PHY~ */
+	{OFFSET(mii1_txd2), (MODE(7) | PULLUDDIS | RXACTIVE)},			/* (K15) gpio0[17] */  /* PMIC_FAULT */
+	{OFFSET(gpmc_ad11), (MODE(7) | PULLUDDIS)},				/* (U12) gpio0[27] */  /* RST_SHIELD~ */
 
 	/* Bank 1 */
-	{OFFSET(gpmc_ad14), (MODE(7) | PULLUDDIS)},			/* (V13) gpio1[14] */  /* DIG_OUT */
-	{OFFSET(gpmc_ad15), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)},/* (U13) gpio1[15] */  /* DIG_IN */
-	{OFFSET(gpmc_a4), (MODE(7) | PULLUDDIS)},			/* (R14) gpio1[20] */  /* BT_EN */
-	{OFFSET(gpmc_a5), (MODE(7) | PULLUDDIS)},			/* (V15) gpio1[21] */  /* GSM_PWR_EN */
-	{OFFSET(gpmc_a9),  (MODE(7) | PULLUDDIS)},			/* (U16) gpio1[25] */  /* RST_GSM */
-	{OFFSET(gpmc_a10), (MODE(7) | PULLUDDIS)},			/* (T16) gpio1[26] */  /* WLAN_EN */
-	{OFFSET(gpmc_a11),  (MODE(7) | PULLUDDIS | RXACTIVE)},		/* (V17) gpio1[27] */  /* WLAN_IRQ */
+	{OFFSET(gpmc_ad14), (MODE(7) | PULLUDDIS)},				/* (V13) gpio1[14] */  /* DIG_OUT */
+	{OFFSET(gpmc_ad15), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (U13) gpio1[15] */  /* DIG_IN */
+	{OFFSET(gpmc_a4), (MODE(7) | PULLUDDIS)},				/* (R14) gpio1[20] */  /* BT_EN */
+	{OFFSET(gpmc_a5), (MODE(7) | PULLUDDIS)},				/* (V15) gpio1[21] */  /* GSM_PWR_EN */
+	{OFFSET(gpmc_a9),  (MODE(7) | PULLUDDIS)},				/* (U16) gpio1[25] */  /* RST_GSM */
+	{OFFSET(gpmc_a10), (MODE(7) | PULLUDDIS)},				/* (T16) gpio1[26] */  /* WLAN_EN */
+	{OFFSET(gpmc_a11),  (MODE(7) | PULLUDDIS | RXACTIVE)},			/* (V17) gpio1[27] */  /* WLAN_IRQ */
 
 	/* TODO: What about all the unused GPMC pins ? */
 
@@ -85,20 +87,20 @@ static struct module_pin_mux gpio_pin_mux[] = {
 #endif
 
 	/* Bank 3 */
-	{OFFSET(mii1_col), (MODE(7) | PULLUDEN | PULLUP_EN)},		/* (H16) gpio3[0] */  /* BUTTON */
-	{OFFSET(mii1_rxdv), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)},/* (J17) gpio3[4] */  /* PCIe_IO.WAKE */
-	{OFFSET(mii1_txclk), (MODE(7) | PULLUDDIS)},			/* (K18) gpio3[9] */  /* PCIe_IO.W_DIS */
-	{OFFSET(mii1_rxclk), (MODE(7) | PULLUDDIS)},			/* (L18) gpio3[10] */  /* PCIe_IO.RST */
-	{OFFSET(mcasp0_ahclkr), (MODE(7) | PULLUDEN | PULLDOWN_EN)},	/* (C12) gpio3[17] */  /* SIM_SEL */
-	{OFFSET(mcasp0_ahclkx), (MODE(7) | PULLUDEN)},			/* (A14) gpio3[21] */  /* RST_HUB~ */
-	{-1},
+	{OFFSET(mii1_col), (MODE(7) | PULLUDEN | PULLUP_EN)},			/* (H16) gpio3[0] */  /* BUTTON */
+	{OFFSET(mii1_rxdv), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (J17) gpio3[4] */  /* PCIe_IO.WAKE */
+	{OFFSET(mii1_txclk), (MODE(7) | PULLUDDIS)},				/* (K18) gpio3[9] */  /* PCIe_IO.W_DIS */
+	{OFFSET(mii1_rxclk), (MODE(7) | PULLUDDIS)},				/* (L18) gpio3[10] */  /* PCIe_IO.RST */
+	{OFFSET(mcasp0_ahclkr), (MODE(7) | PULLUDEN | PULLDOWN_EN)},		/* (C12) gpio3[17] */  /* SIM_SEL */
+	{OFFSET(mcasp0_ahclkx), (MODE(7) | PULLUDEN)},				/* (A14) gpio3[21] */  /* RST_HUB~ */
+	{-1}
 };
 
 /* I2C0 PMIC */
 static struct module_pin_mux i2c0_pin_mux[] = {
 	{OFFSET(i2c0_sda), (MODE(0) | RXACTIVE | PULLUDEN | PULLUP_EN | SLEWCTRL)},	/* (C17) I2C0_SDA */
 	{OFFSET(i2c0_scl), (MODE(0) | RXACTIVE | PULLUDEN | PULLUP_EN | SLEWCTRL)},	/* (C16) I2C0_SCL */
-	{-1},
+	{-1}
 };
 
 /* I2C2 System */
@@ -126,40 +128,40 @@ static struct module_pin_mux rmii1_pin_mux[] = {
 
 	/* 25MHz Clock Output */
 	{OFFSET(xdma_event_intr0), MODE(3)},					/* (A15) clkout1 (25 MHz clk for Switch) */
-	{-1},
+	{-1}
 };
 
 /* MMC0: WiFi */
 static struct module_pin_mux mmc0_sdio_pin_mux[] = {
-	{OFFSET(mmc0_clk), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* MMC0_CLK */
-	{OFFSET(mmc0_cmd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* MMC0_CMD */
-	{OFFSET(mmc0_dat0), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* MMC0_DAT0 */
-	{OFFSET(mmc0_dat1), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* MMC0_DAT1 */
-	{OFFSET(mmc0_dat2), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* MMC0_DAT2 */
-	{OFFSET(mmc0_dat3), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* MMC0_DAT3 */
-	{-1},
+	{OFFSET(mmc0_clk), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (G17) MMC0_CLK */
+	{OFFSET(mmc0_cmd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (G18) MMC0_CMD */
+	{OFFSET(mmc0_dat0), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (G16) MMC0_DAT0 */
+	{OFFSET(mmc0_dat1), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (G15) MMC0_DAT1 */
+	{OFFSET(mmc0_dat2), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (F18) MMC0_DAT2 */
+	{OFFSET(mmc0_dat3), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (F17) MMC0_DAT3 */
+	{-1}
 };
 
 /* MMC1: eMMC */
 static struct module_pin_mux mmc1_emmc_pin_mux[] = {
-	{OFFSET(gpmc_csn1), (MODE(2) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* MMC1_CLK */
-	{OFFSET(gpmc_csn2), (MODE(2) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* MMC1_CMD */
-	{OFFSET(gpmc_ad0), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* MMC1_DAT0 */
-	{OFFSET(gpmc_ad1), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* MMC1_DAT1 */
-	{OFFSET(gpmc_ad2), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* MMC1_DAT2 */
-	{OFFSET(gpmc_ad3), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* MMC1_DAT3 */
-	{OFFSET(gpmc_ad4), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* MMC1_DAT4 */
-	{OFFSET(gpmc_ad5), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* MMC1_DAT5 */
-	{OFFSET(gpmc_ad6), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* MMC1_DAT6 */
-	{OFFSET(gpmc_ad7), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* MMC1_DAT7 */
-	{-1},
+	{OFFSET(gpmc_csn1), (MODE(2) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (U9) MMC1_CLK */
+	{OFFSET(gpmc_csn2), (MODE(2) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (V9) MMC1_CMD */
+	{OFFSET(gpmc_ad0), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (U7) MMC1_DAT0 */
+	{OFFSET(gpmc_ad1), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (V7) MMC1_DAT1 */
+	{OFFSET(gpmc_ad2), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (R8) MMC1_DAT2 */
+	{OFFSET(gpmc_ad3), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (T8) MMC1_DAT3 */
+	{OFFSET(gpmc_ad4), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (U8) MMC1_DAT4 */
+	{OFFSET(gpmc_ad5), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (V8) MMC1_DAT5 */
+	{OFFSET(gpmc_ad6), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (R9) MMC1_DAT6 */
+	{OFFSET(gpmc_ad7), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (T9) MMC1_DAT7 */
+	{-1}
 };
 
 /* USB_DRVBUS not used -> configure as GPIO */
 static struct module_pin_mux usb_pin_mux[] = {
 	{OFFSET(usb0_drvvbus), (MODE(7) | PULLUDDIS)},				/* (F16) USB0_DRVVBUS */
 	{OFFSET(usb1_drvvbus), (MODE(7) | PULLUDDIS)},				/* (F15) USB1_DRVVBUS */
-	{-1},
+	{-1}
 };
 
 /* UART0: RS232/RS485 shield mode */
@@ -191,7 +193,7 @@ static struct module_pin_mux uart1_pin_mux[] = {
 static struct module_pin_mux uart3_pin_mux[] = {
 	{OFFSET(mii1_rxd3), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (L17) UART3_RXD */
 	{OFFSET(mii1_rxd2), (MODE(1) | PULLUDEN | PULLUP_EN | SLEWCTRL)},	/* (L16) UART3_TXD */
-	{-1},
+	{-1}
 };
 
 /* UART5: Highspeed UART for Bluetooth (no SLEWCTRL) */
@@ -200,7 +202,7 @@ static struct module_pin_mux uart5_pin_mux[] = {
 	{OFFSET(lcd_data8), (MODE(4) | PULLUDEN | PULLUP_EN)},			/* (U1) UART5_TXD */
 	{OFFSET(lcd_data14), (MODE(6) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (V4) uart5_ctsn */
 	{OFFSET(lcd_data15), (MODE(6) | PULLUDEN | PULLUP_EN)},			/* (T5) uart5_rtsn */
-	{-1},
+	{-1}
 };
 
 static struct module_pin_mux unused_pin_mux[] = {
@@ -212,7 +214,7 @@ static struct module_pin_mux unused_pin_mux[] = {
 
 	/* TODO: GPMCA1..3, A6..8 */
 
-	{-1},
+	{-1}
 };
 
 
@@ -248,4 +250,3 @@ void enable_uart1_pin_mux(void)
 {
 	configure_module_pin_mux(uart1_pin_mux);
 }
-

board/nm/nrhw20/shield.c

@@ -68,6 +68,7 @@ U_BOOT_CMD(
 	shield,	6,	1,	do_shieldmode,
 	"Set the shield mode",
 	"dualcan termination [on|off] [on|off]\n"
+	"shield dualcan-passive\n"
 	"shield comio mode [rs232|rs485] termination [on|off]\n"
 );
 

board/nm/nrhw20/shield.h

@@ -8,6 +8,11 @@
 #ifndef SHIELD_H
 #define SHIELD_H
 
+#define SHIELD_COM_IO		0
+#define SHIELD_DUALCAN		1
+#define SHIELD_CAN_GNSS		2
+#define SHIELD_DUALCAN_PASSIVE	3
+
 struct shield_t{
     char name[64];
     int (*setmode)(char * const argv[], int argc);

board/nm/nrhw20/shield_can.c

@@ -11,8 +11,8 @@
 
 #define NETBIRD_GPIO_RST_SHIELD_N	GPIO_TO_PIN(0, 27)
 #define NETBIRD_GPIO_LATCH		GPIO_TO_PIN(0, 7)
-#define NETBIRD_GPIO_MODE_0		GPIO_TO_PIN(1, 8)
-#define NETBIRD_GPIO_MODE_1		GPIO_TO_PIN(1, 10)
+#define NETBIRD_GPIO_MODE_0		GPIO_TO_PIN(1, 10)
+#define NETBIRD_GPIO_MODE_1		GPIO_TO_PIN(1, 8)
 
 
 static int shield_slot_initialized = 0;
@@ -184,8 +184,18 @@ static int set_shieldmode(char * const argv[], int argc)
 	return configure_shieldmode(get_mode_from_args(argv, argc));
 }
 
-/* TODO: Static ? */
-struct shield_t can_shield = {
+static int no_options(char * const argv[], int argc)
+{
+	if (argc != 0) {
+		debug("Too many arguments\n");
+		return -1;
+	}
+
+	return 0;
+}
+
+
+static struct shield_t can_shield = {
 	"dualcan", set_shieldmode
 };
 
@@ -193,3 +203,12 @@ void can_shield_init(void)
 {
 	shield_register(&can_shield);
 }
+
+static struct shield_t can_shield_passive = {
+	"dualcan-passive", no_options
+};
+
+void can_shield_passive_init(void)
+{
+	shield_register(&can_shield_passive);
+}

board/nm/nrhw20/shield_can.h

@@ -5,5 +5,6 @@ int shield_can_init(void);
 int shield_can_setmode(int mode);
 
 void can_shield_init(void);
+void can_shield_passive_init(void);
 
 #endif // SHIELD_CAN_H

board/nm/nrhw24/Kconfig

@@ -0,0 +1,26 @@
+if TARGET_AM335X_NRHW24
+
+config SYS_BOARD
+        default "nrhw24"
+
+config SYS_VENDOR
+        default "nm"
+
+config SYS_SOC
+        default "am33xx"
+
+config SYS_CONFIG_NAME
+        default "am335x_nrhw24"
+
+config CONS_INDEX
+        int "UART used for console"
+        range 1 6
+        default 2
+        help
+          The AM335x SoC has a total of 6 UARTs (UART0 to UART5 as referenced
+          in documentation, etc) available to it.  Depending on your specific
+          board you may want something other than UART0 as for example the IDK
+          uses UART3 so enter 4 here.
+
+endif
+

board/nm/nrhw24/Makefile

@@ -0,0 +1,13 @@
+#
+# Makefile
+#
+# Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+ifeq ($(CONFIG_SKIP_LOWLEVEL_INIT),)
+obj-y	:= mux.o
+endif
+
+obj-y	+= board.o ../common/bdparser.o ../common/board_descriptor.o ../common/da9063.o shield.o shield_can.o shield_comio.o fileaccess.o

board/nm/nrhw24/board.h

@@ -0,0 +1,28 @@
+/*
+ * board.h
+ *
+ * TI AM335x boards information header
+ *
+ * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _BOARD_H_
+#define _BOARD_H_
+
+/*
+ * We have three pin mux functions that must exist.  We must be able to enable
+ * uart0, for initial output and i2c2 to read the main EEPROM.  We then have a
+ * main pinmux function that can be overridden to enable all other pinmux that
+ * is required on the board.
+ */
+void enable_uart0_pin_mux(void);
+void disable_uart0_pin_mux(void);
+void enable_uart1_pin_mux(void);
+
+void enable_board_pin_mux(void);
+
+#define GPIO_TO_PIN(bank, gpio)		(32 * (bank) + (gpio))
+
+#endif

board/nm/nrhw24/fileaccess.c

@@ -0,0 +1,40 @@
+#include <common.h>
+#include <fs.h>
+
+#define BLOCK_DEVICE "mmc"
+#define OVERLAY_PART "1:3"
+
+int read_file(const char* filename, char *buf, int size)
+{
+	loff_t filesize = 0;
+	loff_t len;
+	int ret;
+
+	if (fs_set_blk_dev(BLOCK_DEVICE, OVERLAY_PART, FS_TYPE_EXT) != 0) {
+		puts("Error, can not set blk device\n");
+		return -1;
+	}
+
+	/* Read at most file size bytes */
+	if (fs_size(filename, &filesize)) {
+		return -1;
+	}
+
+	if (filesize < size)
+		size = filesize;
+
+	/* For very unclear reasons the block device needs to be set again after the call to fs_size() */
+	if (fs_set_blk_dev(BLOCK_DEVICE, OVERLAY_PART, FS_TYPE_EXT) != 0) {
+		puts("Error, can not set blk device\n");
+		return -1;
+	}
+
+	if ((ret = fs_read(filename, (ulong)buf, 0, size, &len))) {
+		printf("Can't read file %s (size %d, len %lld, ret %d)\n", filename, size, len, ret);
+		return -1;
+	}
+
+	buf[len] = 0;
+
+	return len;
+}

board/nm/nrhw24/fileaccess.h

@@ -0,0 +1,14 @@
+/**@file	/home/eichenberger/projects/nbhw16/u-boot/board/nm/netbird_v2/fileaccess.h
+ * @author	eichenberger
+ * @version	704
+ * @date
+ * 	Created:	Tue 06 Jun 2017 02:02:33 PM CEST \n
+ * 	Last Update:	Tue 06 Jun 2017 02:02:33 PM CEST
+ */
+#ifndef FILEACCESS_H
+#define FILEACCESS_H
+
+void fs_set_console(void);
+int read_file(const char* filename, char *buf, int size);
+
+#endif // FILEACCESS_H

board/nm/nrhw24/mux.c

@@ -0,0 +1,233 @@
+/*
+ * mux.c
+ *
+ * Copyright (C) 2018-2019 NetModule AG - http://www.netmodule.com/
+ * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/mux.h>
+#include <asm/io.h>
+#include "board.h"
+
+static struct module_pin_mux gpio_pin_mux[] = {
+	/*
+	* CPU GPIOs
+	*
+	* (A17) GPIO0_2: RST_GNSS~
+	* (A16) GPIO0_5: EXTINT_GNSS
+	* (C15) GPIO0_6: TIMEPULSE
+	* (C18) GPIO0_7: PWM / SHIELD LATCH
+	* (J18) GPIO0_16: RST_PHY~
+	* (U12) GPIO0_27: RST_SHIELD~
+	*
+	* (R14) GPIO1_20: BT_EN
+	* (V15) GPIO1_21: GSM_PWR_EN
+	* (U16) GPIO1_25: RST_GSM
+	* (T16) GPIO1_26: WLAN_EN
+	* (V17) GPIO1_27: WLAN_IRQ
+	*
+	* (C12) GPIO3_17: SIM_SEL
+	*/
+
+	/* Bank 0 */
+	{OFFSET(spi0_sclk), (MODE(7) | PULLUDDIS)},				/* (A17) gpio0[2] */  /* RST_GNSS */
+	{OFFSET(spi0_cs0), (MODE(7) | PULLUDEN | PULLDOWN_EN)},			/* (A16) gpio0[5] */  /* EXTINT_GNSS */
+	{OFFSET(spi0_cs1), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (C15) gpio0[6] */  /* TIMEPULSE */
+	{OFFSET(ecap0_in_pwm0_out), (MODE(7) | PULLUDEN | PULLUP_EN)},		/* (C18) gpio0[7] */  /* IO_SHIELD */
+	{OFFSET(mii1_txd3), (MODE(7) | PULLUDDIS)},				/* (J18) gpio0[16] */  /* RST_PHY~ */
+	{OFFSET(gpmc_ad11), (MODE(7) | PULLUDDIS)},				/* (U12) gpio0[27] */  /* RST_SHIELD~ */
+
+	/* Bank 1 */
+	{OFFSET(gpmc_a4), (MODE(7) | PULLUDDIS)},				/* (R14) gpio1[20] */  /* BT_EN */
+	{OFFSET(gpmc_a5), (MODE(7) | PULLUDDIS)},				/* (V15) gpio1[21] */  /* GSM_PWR_EN */
+	{OFFSET(gpmc_a9),  (MODE(7) | PULLUDDIS)},				/* (U16) gpio1[25] */  /* RST_GSM */
+	{OFFSET(gpmc_a10), (MODE(7) | PULLUDDIS)},				/* (T16) gpio1[26] */  /* WLAN_EN */
+	{OFFSET(gpmc_a11),  (MODE(7) | PULLUDDIS | RXACTIVE)},			/* (V17) gpio1[27] */  /* WLAN_IRQ */
+
+	/* TODO: What about all the unused GPMC pins ? */
+
+	/* Bank 2 */
+#if 0
+	/* TODO: What is this meant for? */
+	{OFFSET(lcd_data3), (MODE(7) | PULLUDEN | PULLUP_EN)},	/* (R4) gpio2[9] */  /* SYSBOOT_3 */
+	{OFFSET(lcd_data4), (MODE(7) | PULLUDEN | PULLUP_EN)},	/* (T1) gpio2[10] */  /* SYSBOOT_4 */
+
+	/* TODO: Check other unued pins from sysboot block */
+	/* Ensure PU/PD does not work against external signal */
+	/*
+	 * SYSBOOT 0,1,5,12,13 = Low
+	 * SYSBOOT 2 = High
+	 */
+#endif
+
+	/* Bank 3 */
+	{OFFSET(mcasp0_ahclkr), (MODE(7) | PULLUDEN | PULLDOWN_EN)},		/* (C12) gpio3[17] */  /* SIM_SEL */
+	{-1}
+};
+
+/* I2C0 PMIC */
+static struct module_pin_mux i2c0_pin_mux[] = {
+	{OFFSET(i2c0_sda), (MODE(0) | RXACTIVE | PULLUDEN | PULLUP_EN | SLEWCTRL)},	/* (C17) I2C0_SDA */
+	{OFFSET(i2c0_scl), (MODE(0) | RXACTIVE | PULLUDEN | PULLUP_EN | SLEWCTRL)},	/* (C16) I2C0_SCL */
+	{-1}
+};
+
+/* I2C2 System */
+static struct module_pin_mux i2c2_pin_mux[] = {
+	{OFFSET(uart1_rtsn), (MODE(3) | RXACTIVE | PULLUDEN | PULLUP_EN | SLEWCTRL)},	/* (D17) I2C2_SCL */
+	{OFFSET(uart1_ctsn), (MODE(3) | RXACTIVE | PULLUDEN | PULLUP_EN | SLEWCTRL)},	/* (D18) I2C2_SDA */
+	{-1},
+};
+
+/* RMII1: Ethernet */
+static struct module_pin_mux rmii1_pin_mux[] = {
+	/* RMII */
+	{OFFSET(mii1_crs), MODE(1) | PULLUDDIS | RXACTIVE},			/* (H17) rmii1_crs */
+	{OFFSET(mii1_rxerr), MODE(7) | PULLUDEN | PULLDOWN_EN | RXACTIVE},	/* (J15) gpio */
+	{OFFSET(mii1_rxd0), MODE(1) | PULLUDDIS | RXACTIVE},			/* (M16) rmii1_rxd0 */
+	{OFFSET(mii1_rxd1), MODE(1) | PULLUDDIS | RXACTIVE},			/* (L15) rmii1_rxd1 */
+	{OFFSET(mii1_txen), MODE(1) | PULLUDDIS},				/* (J16) rmii1_txen */
+	{OFFSET(mii1_txd0), MODE(1) | PULLUDDIS},				/* (K17) rmii1_txd0 */
+	{OFFSET(mii1_txd1), MODE(1) | PULLUDDIS},				/* (K16) rmii1_txd1 */
+	{OFFSET(rmii1_refclk), MODE(0) | PULLUDDIS | RXACTIVE},			/* (H18) rmii1_refclk */
+
+	/* SMI */
+	{OFFSET(mdio_clk), MODE(0) | PULLUDDIS},				/* (M18) mdio_clk */
+	{OFFSET(mdio_data), MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE},		/* (M17) mdio_data */
+
+	/* 25MHz Clock Output */
+	{OFFSET(xdma_event_intr0), MODE(3)},					/* (A15) clkout1 (25 MHz clk for PHY) */
+	{-1}
+};
+
+/* MMC0: WiFi */
+static struct module_pin_mux mmc0_sdio_pin_mux[] = {
+	{OFFSET(mmc0_clk), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (G17) MMC0_CLK */
+	{OFFSET(mmc0_cmd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (G18) MMC0_CMD */
+	{OFFSET(mmc0_dat0), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (G16) MMC0_DAT0 */
+	{OFFSET(mmc0_dat1), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (G15) MMC0_DAT1 */
+	{OFFSET(mmc0_dat2), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (F18) MMC0_DAT2 */
+	{OFFSET(mmc0_dat3), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (F17) MMC0_DAT3 */
+	{-1}
+};
+
+/* MMC1: eMMC */
+static struct module_pin_mux mmc1_emmc_pin_mux[] = {
+	{OFFSET(gpmc_csn1), (MODE(2) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (U9) MMC1_CLK */
+	{OFFSET(gpmc_csn2), (MODE(2) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (V9) MMC1_CMD */
+	{OFFSET(gpmc_ad0), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (U7) MMC1_DAT0 */
+	{OFFSET(gpmc_ad1), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (V7) MMC1_DAT1 */
+	{OFFSET(gpmc_ad2), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (R8) MMC1_DAT2 */
+	{OFFSET(gpmc_ad3), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (T8) MMC1_DAT3 */
+	{OFFSET(gpmc_ad4), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (U8) MMC1_DAT4 */
+	{OFFSET(gpmc_ad5), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (V8) MMC1_DAT5 */
+	{OFFSET(gpmc_ad6), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (R9) MMC1_DAT6 */
+	{OFFSET(gpmc_ad7), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (T9) MMC1_DAT7 */
+	{-1}
+};
+
+/* USB_DRVBUS not used -> configure as GPIO */
+static struct module_pin_mux usb_pin_mux[] = {
+	{OFFSET(usb0_drvvbus), (MODE(7) | PULLUDDIS)},				/* (F16) USB0_DRVVBUS */
+	{OFFSET(usb1_drvvbus), (MODE(7) | PULLUDDIS)},				/* (F15) USB1_DRVVBUS */
+	{-1}
+};
+
+/* UART0: RS232/RS485 shield mode */
+static struct module_pin_mux uart0_pin_mux[] = {
+	{OFFSET(uart0_rxd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (E15) UART0_RXD */
+	{OFFSET(uart0_txd), (MODE(0) | PULLUDEN | PULLUP_EN | SLEWCTRL)},	/* (E16) UART0_TXD */
+	{-1},
+};
+
+/* UART0: Shield I/F (UART, CAN) */
+/* Leave UART0 unconfigured because we want to configure it as needed by Linux (can/spi/uart/etc) */
+/* Mode 7 = GPIO */
+static struct module_pin_mux uart0_disabled_pin_mux[] = {
+	{OFFSET(uart0_rxd), (MODE(7) | PULLUDDIS | RXACTIVE)},			/* (E15) GPIO1_10 */
+	{OFFSET(uart0_txd), (MODE(7) | PULLUDDIS | RXACTIVE)},			/* (E16) GPIO1_11 */
+	{OFFSET(uart0_ctsn), (MODE(7) | PULLUDDIS | RXACTIVE)},			/* (E18) GPIO1_8 */
+	{OFFSET(uart0_rtsn), (MODE(7) | PULLUDEN | PULLUP_EN)},			/* (E17) GPIO1_9 */
+	{-1},
+};
+
+/* UART1: User (Debug/Console) */
+static struct module_pin_mux uart1_pin_mux[] = {
+	{OFFSET(uart1_rxd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (D16) uart1_rxd */
+	{OFFSET(uart1_txd), (MODE(0) | PULLUDEN | PULLUP_EN | SLEWCTRL)},	/* (D15) uart1_txd */
+	{-1},
+};
+
+/* UART3: GNSS */
+static struct module_pin_mux uart3_pin_mux[] = {
+	{OFFSET(mii1_rxd3), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (L17) UART3_RXD */
+	{OFFSET(mii1_rxd2), (MODE(1) | PULLUDEN | PULLUP_EN | SLEWCTRL)},	/* (L16) UART3_TXD */
+	{-1}
+};
+
+/* UART5: Highspeed UART for Bluetooth (no SLEWCTRL) */
+static struct module_pin_mux uart5_pin_mux[] = {
+	{OFFSET(lcd_data9), (MODE(4) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (U2) UART5_RXD */
+	{OFFSET(lcd_data8), (MODE(4) | PULLUDEN | PULLUP_EN)},			/* (U1) UART5_TXD */
+	{OFFSET(lcd_data14), (MODE(6) | PULLUDEN | PULLUP_EN | RXACTIVE)},	/* (V4) uart5_ctsn */
+	{OFFSET(lcd_data15), (MODE(6) | PULLUDEN | PULLUP_EN)},			/* (T5) uart5_rtsn */
+	{-1}
+};
+
+static struct module_pin_mux unused_pin_mux[] = {
+	/* SYSBOOT6, 7, 10, 11: Not used pulldown active, receiver disabled */
+	{OFFSET(lcd_data6), (MODE(7) | PULLUDEN | PULLDOWN_EN)},
+	{OFFSET(lcd_data7), (MODE(7) | PULLUDEN | PULLDOWN_EN)},
+	{OFFSET(lcd_data10), (MODE(7) | PULLUDEN | PULLDOWN_EN)},
+	{OFFSET(lcd_data11), (MODE(7) | PULLUDEN | PULLDOWN_EN)},
+
+	/* TODO: GPMCA1..3, A6..8 */
+
+	{-1}
+};
+
+
+void enable_board_pin_mux(void)
+{
+	configure_module_pin_mux(gpio_pin_mux);
+
+	configure_module_pin_mux(rmii1_pin_mux);
+	configure_module_pin_mux(mmc0_sdio_pin_mux);
+	configure_module_pin_mux(mmc1_emmc_pin_mux);
+	configure_module_pin_mux(usb_pin_mux);
+
+	configure_module_pin_mux(i2c0_pin_mux);
+	configure_module_pin_mux(i2c2_pin_mux);
+
+	configure_module_pin_mux(uart3_pin_mux);
+	configure_module_pin_mux(uart5_pin_mux);
+
+	configure_module_pin_mux(unused_pin_mux);
+}
+
+void enable_uart0_pin_mux(void)
+{
+	configure_module_pin_mux(uart0_pin_mux);
+}
+
+void disable_uart0_pin_mux(void)
+{
+	configure_module_pin_mux(uart0_disabled_pin_mux);
+}
+
+void enable_uart1_pin_mux(void)
+{
+	configure_module_pin_mux(uart1_pin_mux);
+}

board/nm/nrhw24/shield.c

@@ -0,0 +1,74 @@
+#undef DEBUG
+
+#include <common.h>
+#include <asm/gpio.h>
+#include <asm/arch/mux.h>
+
+#include "shield.h"
+#include "board.h"
+
+#define MAX_SHIELDS 16
+
+static struct shield_t *shields[MAX_SHIELDS];
+static int shield_count = 0;
+
+/* Perhaps this function shouldn't leave in shields.c? */
+int shield_gpio_request_as_input(unsigned int gpio, const char *label)
+{
+	int ret;
+
+ 	ret = gpio_request(gpio, label);
+	if ((ret < 0)) {
+		printf("Could not request shield slot %s gpio\n", label);
+		return -1;
+	}
+
+	ret = gpio_direction_input(gpio);
+	if ((ret < 0)) {
+		printf("Could not configure shield slot %s gpio as input\n", label);
+		return -1;
+	}
+
+	return 0;
+}
+
+void shield_register(struct shield_t *shield)
+{
+	if (shield_count >= MAX_SHIELDS) {
+		printf("Max shield count reached (%d), please increment MAX_SHIELDS\n", MAX_SHIELDS);
+		return;
+	}
+	shields[shield_count++] = shield;
+}
+
+int shield_set_mode(const char* shield_type, int argc, char * const argv[])
+{
+	int i;
+
+	for (i = 0; i < shield_count; i++) {
+		if (strcmp(shield_type, shields[i]->name) == 0) {
+			return shields[i]->setmode(argv, argc);
+		}
+	}
+	printf("## Error: No %s shield installed\n", shield_type);
+	/* Do not return error, to not show usage (request by rs) */
+	return 0;
+}
+
+static int do_shieldmode(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+	if (argc < 2) {
+		return -1;
+	}
+
+	return shield_set_mode(argv[1], argc - 2, &argv[2]);
+}
+
+U_BOOT_CMD(
+	shield,	6,	1,	do_shieldmode,
+	"Set the shield mode",
+	"dualcan termination [on|off] [on|off]\n"
+	"shield dualcan-passive\n"
+	"shield comio mode [rs232|rs485] termination [on|off]\n"
+);
+

board/nm/nrhw24/shield.h

@@ -0,0 +1,26 @@
+/**@file	/home/eichenberger/projects/nbhw16/u-boot/board/nm/netbird_v2/shield.h
+ * @author	eichenberger
+ * @version	704
+ * @date
+ * 	Created:	Wed 31 May 2017 02:56:16 PM CEST \n
+ * 	Last Update:	Wed 31 May 2017 02:56:16 PM CEST
+ */
+#ifndef SHIELD_H
+#define SHIELD_H
+
+#define SHIELD_COM_IO		0
+#define SHIELD_DUALCAN		1
+#define SHIELD_CAN_GNSS		2
+#define SHIELD_DUALCAN_PASSIVE	3
+
+struct shield_t{
+    char name[64];
+    int (*setmode)(char * const argv[], int argc);
+};
+
+int shield_setmode(int mode);
+void shield_register(struct shield_t *shield);
+
+int shield_gpio_request_as_input(unsigned int gpio, const char *label);
+
+#endif // SHIELD_H

board/nm/nrhw24/shield_can.c

@@ -0,0 +1,214 @@
+#undef DEBUG
+
+#include <common.h>
+#include <asm/gpio.h>
+#include <asm/arch/mux.h>
+
+#include "shield.h"
+#include "board.h"
+
+#define CAN_PORTS			2
+
+#define NETBIRD_GPIO_RST_SHIELD_N	GPIO_TO_PIN(0, 27)
+#define NETBIRD_GPIO_LATCH		GPIO_TO_PIN(0, 7)
+#define NETBIRD_GPIO_MODE_0		GPIO_TO_PIN(1, 10)
+#define NETBIRD_GPIO_MODE_1		GPIO_TO_PIN(1, 8)
+
+
+static int shield_slot_initialized = 0;
+
+
+static struct module_pin_mux can_shield_netbird_pin_mux_config[] = {
+	/* Leave UART0 unconfigured because we want to configure it as needed by linux (can/spi/uart/etc) */
+	{OFFSET(uart0_ctsn), (MODE(7) | PULLUDEN | PULLUP_EN)},		/* (E18) gpio1_8 */ /* Mode 0 */
+	{OFFSET(uart0_rxd), (MODE(7) | PULLUDEN | PULLUP_EN)},		/* (E15) gpio1_10 */ /* Mode 1 */
+	{OFFSET(ecap0_in_pwm0_out), (MODE(7) | PULLUDEN | PULLUP_EN)},	/* (C18) eCAP0_in_PWM0_out.gpio0[7] */ /* Latch EN */
+	{-1},
+};
+
+static struct module_pin_mux can_shield_netbird_pin_mux_final[] = {
+	{OFFSET(uart0_txd), (MODE(2) | PULLUDDIS | RXACTIVE)},		/* (E16) dcan0_rx */
+	{OFFSET(uart0_rxd), (MODE(2) | PULLUDEN | PULLUP_EN)},		/* (E15) dcan0_tx */
+	{OFFSET(uart0_rtsn), (MODE(2) | PULLUDDIS | RXACTIVE)},		/* (E17) dcan1_rx */
+	{OFFSET(uart0_ctsn), (MODE(2) | PULLUDEN | PULLUP_EN)},		/* (E18) dcan1_tx */
+	{-1},
+};
+
+
+static int request_gpios(void)
+{
+	int ret;
+
+	debug("Shield configure gpios\n");
+ 	ret = shield_gpio_request_as_input(NETBIRD_GPIO_RST_SHIELD_N, "shield-rst");
+	if ((ret < 0))
+		return -1;
+	ret = shield_gpio_request_as_input(NETBIRD_GPIO_LATCH, "shield-load");
+	if ((ret < 0))
+		return -1;
+	ret = shield_gpio_request_as_input(NETBIRD_GPIO_MODE_0, "shield-mode0");
+	if ((ret < 0))
+		return -1;
+	ret = shield_gpio_request_as_input(NETBIRD_GPIO_MODE_1, "shield-mode1");
+	if ((ret < 0))
+		return -1;
+
+	shield_slot_initialized = 1;
+	return 0;
+}
+
+static int configure_shieldmode(int mode)
+{
+	int ret;
+
+	if (mode < 0 || mode > 3) {
+		debug("Invalid shield mode %d\n", mode);
+		return -1;
+	}
+
+	debug("Shield type dualcan\n");
+	debug ("Set shield mode to %d\n", mode);
+
+	if (!shield_slot_initialized) {
+		if (request_gpios()) {
+			puts("Failed to request gpios\n");
+			return -1;
+		}
+	}
+
+	debug("Configure shield pin muxing for configuration\n");
+	configure_module_pin_mux(can_shield_netbird_pin_mux_config);
+
+	debug("Make sure shield module is in reset\n");
+	ret = gpio_direction_output(NETBIRD_GPIO_RST_SHIELD_N, 0);
+	if (ret < 0) {
+		puts("Can not set shield-rst as output\n");
+		return -1;
+	}
+	udelay(10);
+
+	debug("Set latch to high\n");
+	ret = gpio_direction_output(NETBIRD_GPIO_LATCH, 1);
+	if (ret < 0) {
+		puts("Can not set shield-load as output\n");
+		return -1;
+	}
+	udelay(10);
+
+	debug("Write mode to GPIOs\n");
+	ret = gpio_direction_output(NETBIRD_GPIO_MODE_0, mode & 0x01);
+	if (ret < 0) {
+		puts("Can not set shield-mode0 as output\n");
+		return -1;
+	}
+	ret = gpio_direction_output(NETBIRD_GPIO_MODE_1, mode & 0x02);
+	if (ret < 0) {
+		puts("Can not set shield-mode1 as output\n");
+		return -1;
+	}
+	udelay(10);
+
+	debug("Set latch to low\n");
+	gpio_set_value(NETBIRD_GPIO_LATCH, 0);
+	udelay(10);
+
+	debug("Set mode0 and mode1 to highz again\n");
+	ret = gpio_direction_input(NETBIRD_GPIO_MODE_0);
+	if ((ret < 0)) {
+		puts("Could not configure shield slot mode0 gpio as input\n");
+		return -1;
+	}
+
+	ret = gpio_direction_input(NETBIRD_GPIO_MODE_1);
+	if ((ret < 0)) {
+		puts("Could not configure shield slot mode1 gpio as input\n");
+		return -1;
+	}
+	udelay(10);
+
+	debug("Take shield out of reset\n");
+	gpio_set_value(NETBIRD_GPIO_RST_SHIELD_N, 1);
+	udelay(10);
+
+	debug("Set final can shield muxing\n");
+	configure_module_pin_mux(can_shield_netbird_pin_mux_final);
+
+	return 0;
+
+}
+
+static int get_termination(const char* termination)
+{
+	if (strcmp("on", termination) == 0) {
+		return 1;
+	}
+	else if (strcmp("off", termination) == 0)  {
+		return 0;
+	}
+
+	debug ("Invalid termination mode %s (falling back to off)", termination);
+	return -1;
+}
+
+static int get_mode_from_args(char * const argv[], int argc)
+{
+	int terminations[CAN_PORTS];
+	int i;
+
+	assert(argc == (CAN_PORTS + 1));
+
+	if (strcmp ("termination", argv[0])) {
+		debug("The only option for dualcan is terminations\n");
+		return -1;
+	}
+
+	for (i = 0; i < CAN_PORTS; i ++) {
+		terminations[i] = get_termination(argv[i + 1]);
+		if (terminations[i] < 0) {
+			return -1;
+		}
+	}
+
+	/* Termination is inverse */
+	/* TODO: Double check */
+	return (!terminations[0] << 0) | (!terminations[1] << 1);
+}
+
+static int set_shieldmode(char * const argv[], int argc)
+{
+	if (argc != 3) {
+		debug("Too few arguments for dualcan\n");
+		return -1;
+	}
+
+	return configure_shieldmode(get_mode_from_args(argv, argc));
+}
+
+static int no_options(char * const argv[], int argc)
+{
+	if (argc != 0) {
+		debug("Too many arguments\n");
+		return -1;
+	}
+
+	return 0;
+}
+
+
+static struct shield_t can_shield = {
+	"dualcan", set_shieldmode
+};
+
+void can_shield_init(void)
+{
+	shield_register(&can_shield);
+}
+
+static struct shield_t can_shield_passive = {
+	"dualcan-passive", no_options
+};
+
+void can_shield_passive_init(void)
+{
+	shield_register(&can_shield_passive);
+}

board/nm/nrhw24/shield_can.h

@@ -0,0 +1,10 @@
+#ifndef SHIELD_CAN_H
+#define SHIELD_CAN_H
+
+int shield_can_init(void);
+int shield_can_setmode(int mode);
+
+void can_shield_init(void);
+void can_shield_passive_init(void);
+
+#endif // SHIELD_CAN_H

board/nm/nrhw24/shield_comio.c

@@ -0,0 +1,252 @@
+#undef DEBUG
+
+#include <common.h>
+#include <asm/gpio.h>
+#include <asm/arch/mux.h>
+
+#include "shield.h"
+#include "board.h"
+
+/* TODO: Double Check */
+#define NETBIRD_GPIO_RST_SHIELD_N	GPIO_TO_PIN(0, 27)
+#define NETBIRD_GPIO_LOAD		GPIO_TO_PIN(1, 9)
+/* TODO: Who configures UART0_RTSn, GPIO1_9 ? */
+#define NETBIRD_GPIO_MODE_0		GPIO_TO_PIN(1, 11)
+#define NETBIRD_GPIO_MODE_1		GPIO_TO_PIN(1, 10)
+
+static int shield_slot_initialized = 0;
+
+
+/* TODO: Naming -> config, final */
+static struct module_pin_mux shield_gpio_netbird_pin_mux[] = {
+	{OFFSET(uart0_rxd), (MODE(7) | PULLUDDIS)},			/* (E15) gpio1_10 */ /* Mode 0 */
+	{OFFSET(uart0_txd), (MODE(7) | PULLUDEN | PULLUP_EN)},		/* (E16) gpio1_11 */ /* Mode 1 */
+	{-1},
+};
+
+static struct module_pin_mux shield_gpio_safe_netbird_pin_mux[] = {
+	/* Leave UART0 unconfigured (GPIO) because we want to configure it as needed by linux (can/spi/uart/etc) */
+	{OFFSET(uart0_rxd), (MODE(7) | PULLUDDIS | RXACTIVE)},		/* (E15) gpio1_10 */ /* Mode 0 */
+	{OFFSET(uart0_txd), (MODE(7) | PULLUDDIS | RXACTIVE)},		/* (E16) gpio1_11 */ /* Mode 1 */
+	{-1},
+};
+
+
+static int request_gpios(void)
+{
+	int ret;
+
+	debug("Extension slot init\n");
+ 	ret = shield_gpio_request_as_input(NETBIRD_GPIO_RST_SHIELD_N, "shield-rst");
+	if ((ret < 0))
+		return -1;
+	ret = shield_gpio_request_as_input(NETBIRD_GPIO_LOAD, "shield-load");
+	if ((ret < 0))
+		return -1;
+	ret = shield_gpio_request_as_input(NETBIRD_GPIO_MODE_0, "shield-mode0");
+	if ((ret < 0))
+		return -1;
+	ret = shield_gpio_request_as_input(NETBIRD_GPIO_MODE_1, "shield-mode1");
+	if ((ret < 0))
+		return -1;
+
+	shield_slot_initialized = 1;
+	return 0;
+}
+
+static int configure_shieldmode(int mode)
+{
+	int ret;
+
+	if (mode < 0 || mode > 3) {
+		debug ("Invalid shield mode %d\n", mode);
+		return -1;
+	}
+
+	debug("Shield type comio\n");
+	debug ("Set shield mode to %d\n", mode);
+
+	if (!shield_slot_initialized) {
+		if (request_gpios()) {
+			puts("Failed to request gpios\n");
+			return -1;
+		}
+	}
+
+	debug("Make sure shield module is in reset\n");
+	ret = gpio_direction_output(NETBIRD_GPIO_RST_SHIELD_N, 0);
+	if (ret < 0) {
+		puts("Can not set shield-rst as output\n");
+		return -1;
+	}
+	udelay(10);
+
+	debug("Enable gpio pull-ups\n");
+	configure_module_pin_mux(shield_gpio_netbird_pin_mux);
+
+	debug("Set load to low\n");
+	ret = gpio_direction_output(NETBIRD_GPIO_LOAD, 0);
+	if (ret < 0) {
+		puts("Can not set shield-load as output\n");
+		return -1;
+	}
+	udelay(10);
+
+	debug("Write mode to GPIOs\n");
+	ret = gpio_direction_output(NETBIRD_GPIO_MODE_0, mode & 0x01);
+	if (ret < 0) {
+		puts("Can not set shield-mode0 as output\n");
+		return -1;
+	}
+	ret = gpio_direction_output(NETBIRD_GPIO_MODE_1, mode & 0x02);
+	if (ret < 0) {
+		puts("Can not set shield-mode1 as output\n");
+		return -1;
+	}
+	udelay(10);
+
+	debug("Set load to high\n");
+	gpio_set_value(NETBIRD_GPIO_LOAD, 1);
+	udelay(10);
+
+	debug("Set mode0 and mode1 to highz again\n");
+	ret = gpio_direction_input(NETBIRD_GPIO_MODE_0);
+	if ((ret < 0)) {
+		puts("Could not configure shield slot mode0 gpio as input\n");
+		return -1;
+	}
+
+	ret = gpio_direction_input(NETBIRD_GPIO_MODE_1);
+	if ((ret < 0)) {
+		puts("Could not configure shield slot mode1 gpio as input\n");
+		return -1;
+	}
+	udelay(10);
+
+	debug("Disable pullups on shield gpios\n");
+	configure_module_pin_mux(shield_gpio_safe_netbird_pin_mux);
+	udelay(10);
+
+	debug("Take shield out of reset\n");
+	gpio_set_value(NETBIRD_GPIO_RST_SHIELD_N, 1);
+	udelay(10);
+
+	debug("Set gpio load as input again\n");
+	ret = gpio_direction_input(NETBIRD_GPIO_LOAD);
+	if (ret < 0) {
+		puts("Can not configure shield slot load as input");
+		return -1;
+	}
+
+	return 0;
+}
+
+enum mode_nr {
+	RS232,
+	RS485,
+	UNKNOWN
+};
+
+struct mode {
+	enum mode_nr nr;
+	const char* name;
+	int argc;
+};
+
+struct mode modes[] = {
+	{ RS232, "rs232", 0 },
+	{ RS485, "rs485", 2 }
+};
+
+static const struct mode *get_mode(const char *mode)
+{
+	int i;
+	for (i = 0; i < ARRAY_SIZE(modes); i++) {
+		if (strcmp(modes[i].name, mode) == 0) {
+			return &modes[i];
+		}
+	}
+	return NULL;
+}
+
+static int get_termination(const char* termination)
+{
+	if (strcmp("on", termination) == 0) {
+		return 1;
+	}
+	else if (strcmp("off", termination) == 0)  {
+		return 0;
+	}
+
+	debug ("Invalid termination mode %s (falling back to off)", termination);
+	return -1;
+}
+
+static int get_mode_from_args(char * const argv[], int argc)
+{
+	int termination = 0;
+	int rs232 = 0;
+	const struct mode *selected_mode;
+
+	assert(argc >= 2);
+
+	if (strcmp ("mode", argv[0])) {
+		debug("Invalid arguments (see help)\n");
+		return -1;
+	}
+
+	selected_mode = get_mode(argv[1]);
+	if (selected_mode == NULL) {
+		debug("Mode %s not supported\n", argv[1]);
+		return -1;
+	}
+
+	debug ("Mode %s, index %d, argc %d\n", selected_mode->name,
+			selected_mode->nr, selected_mode->argc);
+
+	if (selected_mode->argc != argc - 2) {
+		debug("Invalid argument count for mode %s (should %d is %d)\n",
+				argv[1],  selected_mode->argc, argc - 2);
+		return -1;
+	}
+
+	if (selected_mode->nr == RS485) {
+		if (strcmp("termination", argv[2])) {
+			debug("Invalid arguments, do not configure termination\n");
+			return -1;
+		}
+
+		termination = get_termination(argv[3]);
+		if (termination < 0) {
+			debug("Invalid termination %s\n", argv[3]);
+			return -1;
+		}
+	}
+	else {
+		rs232 = 1;
+	}
+
+	/* Termination is inverse */
+	return (rs232 << 0) | ((!termination) << 1);
+}
+
+int set_shieldmode(char * const argv[], int argc)
+{
+	if (argc < 2) {
+		debug("Too few arguments for comio\n");
+		return -1;
+	}
+
+	/* -1 will make configure_shieldmode to faile and is okay therefore */
+	return configure_shieldmode(get_mode_from_args(argv, argc));
+}
+
+/* TODO: Static ? */
+struct shield_t comio_shield = {
+	"comio", set_shieldmode
+};
+
+void comio_shield_init(void)
+{
+	shield_register(&comio_shield);
+}

board/nm/nrhw24/shield_comio.h

@@ -0,0 +1,6 @@
+#ifndef SHIELD_COMIO_H
+#define SHIELD_COMIO_H
+
+void comio_shield_init(void);
+
+#endif // SHIELD_COMIO_H

board/nm/nrhw24/u-boot.lds

@@ -0,0 +1,158 @@
+/*
+ * Copyright (c) 2004-2008 Texas Instruments
+ *
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+	. = 0x00000000;
+
+	. = ALIGN(4);
+	.text :
+	{
+		*(.__image_copy_start)
+		*(.vectors)
+		CPUDIR/start.o (.text*)
+                board/nm/nrhw24/built-in.o (.text*)
+		*(.text*)
+	}
+
+	. = ALIGN(4);
+	.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
+
+	. = ALIGN(4);
+	.data : {
+		*(.data*)
+	}
+
+	. = ALIGN(4);
+
+	. = .;
+
+	. = ALIGN(4);
+	.u_boot_list : {
+		KEEP(*(SORT(.u_boot_list*)));
+	}
+
+	. = ALIGN(4);
+
+	.__efi_runtime_start : {
+		*(.__efi_runtime_start)
+	}
+
+	.efi_runtime : {
+		*(efi_runtime_text)
+		*(efi_runtime_data)
+	}
+
+	.__efi_runtime_stop : {
+		*(.__efi_runtime_stop)
+	}
+
+	.efi_runtime_rel_start :
+	{
+		*(.__efi_runtime_rel_start)
+	}
+
+	.efi_runtime_rel : {
+		*(.relefi_runtime_text)
+		*(.relefi_runtime_data)
+	}
+
+	.efi_runtime_rel_stop :
+	{
+		*(.__efi_runtime_rel_stop)
+	}
+
+	. = ALIGN(4);
+
+	.image_copy_end :
+	{
+		*(.__image_copy_end)
+	}
+
+	.rel_dyn_start :
+	{
+		*(.__rel_dyn_start)
+	}
+
+	.rel.dyn : {
+		*(.rel*)
+	}
+
+	.rel_dyn_end :
+	{
+		*(.__rel_dyn_end)
+	}
+
+	.hash : { *(.hash*) }
+
+	.end :
+	{
+		*(.__end)
+	}
+
+	_image_binary_end = .;
+
+	/*
+	 * Deprecated: this MMU section is used by pxa at present but
+	 * should not be used by new boards/CPUs.
+	 */
+	. = ALIGN(4096);
+	.mmutable : {
+		*(.mmutable)
+	}
+
+/*
+ * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c
+ * __bss_base and __bss_limit are for linker only (overlay ordering)
+ */
+
+	.bss_start __rel_dyn_start (OVERLAY) : {
+		KEEP(*(.__bss_start));
+		__bss_base = .;
+	}
+
+	.bss __bss_base (OVERLAY) : {
+		*(.bss*)
+		 . = ALIGN(4);
+		 __bss_limit = .;
+	}
+
+	.bss_end __bss_limit (OVERLAY) : {
+		KEEP(*(.__bss_end));
+	}
+
+	.dynsym _image_binary_end : { *(.dynsym) }
+	.dynbss : { *(.dynbss) }
+	.dynstr : { *(.dynstr*) }
+	.dynamic : { *(.dynamic*) }
+	.gnu.hash : { *(.gnu.hash) }
+	.plt : { *(.plt*) }
+	.interp : { *(.interp*) }
+	.gnu : { *(.gnu*) }
+	.ARM.exidx : { *(.ARM.exidx*) }
+}

cmd/pxe.c

@@ -620,7 +620,7 @@ static int label_boot(cmd_tbl_t *cmdtp, struct pxe_label *label)
 	char initrd_str[22];
 	char mac_str[29] = "";
 	char ip_str[68] = "";
-	int bootm_argc = 3;
+	int bootm_argc = 2;
 	int len = 0;
 	ulong kernel_addr;
 	void *buf;
@@ -652,8 +652,6 @@ static int label_boot(cmd_tbl_t *cmdtp, struct pxe_label *label)
 		strcpy(bootm_argv[2], getenv("ramdisk_addr_r"));
 		strcat(bootm_argv[2], ":");
 		strcat(bootm_argv[2], getenv("filesize"));
-	} else {
-		bootm_argv[2] = "-";
 	}
 
 	if (get_relfile_envaddr(cmdtp, label->kernel, "kernel_addr_r") < 0) {
@@ -785,8 +783,11 @@ static int label_boot(cmd_tbl_t *cmdtp, struct pxe_label *label)
 	if (!bootm_argv[3])
 		bootm_argv[3] = getenv("fdt_addr");
 
-	if (bootm_argv[3])
+	if (bootm_argv[3]) {
+		if (!bootm_argv[2])
+			bootm_argv[2] = "-";
 		bootm_argc = 4;
+	}
 
 	kernel_addr = genimg_get_kernel_addr(bootm_argv[1]);
 	buf = map_sysmem(kernel_addr, 0);

common/board_f.c

@@ -888,8 +888,10 @@ static init_fnc_t init_sequence_f[] = {
 	init_timebase,
 #endif
 	init_baud_rate,		/* initialze baudrate settings */
+#if !defined(CONFIG_PRE_CONSOLE_BUFFER)
 	serial_init,		/* serial communications setup */
 	console_init_f,		/* stage 1 init of console */
+#endif
 #ifdef CONFIG_SANDBOX
 	sandbox_early_getopt_check,
 #endif

common/console.c

@@ -414,7 +414,7 @@ int tstc(void)
 #define PRE_CONSOLE_FLUSHPOINT2_EVERYTHING_BUT_SERIAL	1
 
 #ifdef CONFIG_PRE_CONSOLE_BUFFER
-#define CIRC_BUF_IDX(idx) ((idx) % (unsigned long)CONFIG_PRE_CON_BUF_SZ)
+#define CIRC_BUF_IDX(idx) ((idx) % (unsigned long)(CONFIG_PRE_CON_BUF_SZ))
 
 static void pre_console_putc(const char c)
 {

common/main.c

@@ -13,6 +13,22 @@
 #include <console.h>
 #include <version.h>
 
+#ifdef CONFIG_NM_LOGIN
+#include <fs.h>
+#include <u-boot/md5.h>
+#include <malloc.h>
+#include <crypt.h>
+
+/* Set defaults for passwd file location */
+#ifndef CONFIG_NM_LOGIN_PART
+#define CONFIG_NM_LOGIN_PART	"1:3"
+#endif
+#ifndef CONFIG_NM_LOGIN_PASSWD
+#define CONFIG_NM_LOGIN_PASSWD	"/root/boot/bootpass"
+#endif
+
+#endif
+
 DECLARE_GLOBAL_DATA_PTR;
 
 /*
@@ -20,6 +36,112 @@ DECLARE_GLOBAL_DATA_PTR;
  */
 __weak void show_boot_progress(int val) {}
 
+
+#ifdef CONFIG_NM_LOGIN
+/****************************************************************************
+ *  check if ubootpwd exists in data partition and perform a login,
+ *  otherwise continue booting
+ */
+int login (void)
+{
+	#define MAX_TRIES_ENTER 4096
+	#define PASSWORD_LEN 256
+
+	char stored_pw_hash[PASSWORD_LEN];
+	char password[PASSWORD_LEN];
+	int res, i, tries;
+	int legacy_md5 = 0;
+	loff_t actread;
+	char c;
+
+	puts("\nautoboot has been stopped, press 'e' to enter: ");
+
+	for (i=0; i<=MAX_TRIES_ENTER; i++) {
+		c = getc();
+		if (c == 'e' || c == '\n') {
+			puts("e");
+			break;
+		}
+
+		/* Enter condition not given -> restart */
+		if (i == MAX_TRIES_ENTER) 
+			return 0;
+	}
+	puts("\n");
+
+	/* Try to get password hash file */
+	memset(stored_pw_hash, 0x0, sizeof(stored_pw_hash));
+	if (fs_set_blk_dev("mmc", CONFIG_NM_LOGIN_PART, FS_TYPE_EXT) != 0) {
+		puts("Error, can not set blk device\n");
+		return 1;
+	}
+
+	res = fs_read(CONFIG_NM_LOGIN_PASSWD, (ulong)stored_pw_hash, 0, sizeof(stored_pw_hash), &actread);
+	if ((res != 0) || (actread <= 0)) {
+		/* no file or hash found -> allow login w/o password */
+		puts("Login succeeded\n\n");
+		return 1;
+	} else if (actread == 16) {
+		legacy_md5 = 1;
+	}
+
+	for (tries = 1; ; tries++) {
+		puts("\nEnter password: ");
+
+		/* TODO: no backspace ? */
+		/* TODO: rename buf to something more useful */
+		/* TODO: print a dot or blind? */
+		password[0] = 0;
+		for (i=0; i<PASSWORD_LEN; i++) {
+			password[i] = getc();
+			if (password[i] == '\r' || password[i] == '\n') {
+				password[i] = 0;
+				break;
+			}
+		}
+		password[PASSWORD_LEN-1] = 0;
+
+		if (strlen(password) > 0) {
+			puts("\n");
+			if (legacy_md5) {
+				/* MD5 - legacy */
+				char entered[32];	/* TODO: Why 32, MD5 algo uses only 16 bytes */
+
+				md5((unsigned char *)password, strlen(password), (unsigned char *)entered);
+				if (memcmp(stored_pw_hash, entered, 16) == 0) {
+					break;
+				}
+			}
+			else {
+				/* SHA256 */
+				char *cp = sha_crypt(password, stored_pw_hash);	/* TODO: Salt = PW? */
+				res = memcmp(cp, stored_pw_hash, actread);
+				free(cp);
+				if (res == 0)
+					break;
+			}
+
+			/* TODO: exponentional delay */
+			puts("Login incorrect\n");
+			if (tries == 3) {
+				return 0;
+			}
+		}
+
+		/* TODO: remove password from memory !!!!! */
+		memset(password, 0, sizeof(password));
+	}
+
+	/* succeeded */
+	puts("Login succeeded\n\n");
+
+	return 1;
+}
+
+#endif /* CONIFG_NM_LOGIN */
+
+/****************************************************************************/
+
 static void run_preboot_environment_command(void)
 {
 #ifdef CONFIG_PREBOOT
@@ -65,6 +187,13 @@ void main_loop(void)
 
 	autoboot_command(s);
 
+#ifdef CONFIG_NM_LOGIN
+	if (!login()) {
+		puts ("Login failed, resetting...\n");
+		do_reset (NULL, 0, 0, NULL);
+	}
+#endif
+
 	cli_loop();
 	panic("No CLI available");
 }

common/spl/spl.c

@@ -19,6 +19,10 @@
 #include <dm/root.h>
 #include <linux/compiler.h>
 
+#ifdef CONFIG_NRSW_BUILD
+#include <spl_version_autogenerated.h>
+#endif
+
 DECLARE_GLOBAL_DATA_PTR;
 
 #ifndef CONFIG_SYS_UBOOT_START
@@ -453,7 +457,12 @@ void preloader_console_init(void)
 
 	gd->have_console = 1;
 
-	puts("\nU-Boot SPL " PLAIN_VERSION " (" U_BOOT_DATE " - " \
+#ifdef CONFIG_NRSW_BUILD
+	puts("\n" SPL_VERSION "\n");
+#else
+	puts("\n");
+#endif
+	puts("U-Boot SPL " PLAIN_VERSION " (" U_BOOT_DATE " - " \
 			U_BOOT_TIME ")\n");
 #ifdef CONFIG_SPL_DISPLAY_PRINT
 	spl_display_print();

common/spl/spl_mmc.c

@@ -15,20 +15,166 @@
 #include <errno.h>
 #include <mmc.h>
 #include <image.h>
+#include <crc.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
+
+#define UBOOT_MIN_SIZE_BYTES	(128*1024)
+#define UBOOT_MAX_SIZE_BYTES	(2500*1024)
+
+#if defined(CONFIG_NM_BOOTLOADER_FORMAT)
+
+static int image_nm_header_ok(const struct nm_header *header)
+{
+	u32 start_tag = __be32_to_cpu(header->nm_start_tag);
+	u32 length = __be32_to_cpu(header->nm_length);
+
+	if ((start_tag == 0x424c5354) &&
+	    (length >= UBOOT_MIN_SIZE_BYTES) && (length <= UBOOT_MAX_SIZE_BYTES))
+	{
+		return 0;
+	}
+	else {
+		return -EFAULT;
+	}
+}
+
+static int mmc_load_netmodule(struct mmc *mmc, ulong sector,
+			      const struct nm_header *header)
+{
+	u32 nm_header_size = sizeof(struct nm_header) -sizeof(struct image_header);
+	const struct image_header *im_header;
+	const __be32* end_tag_position;
+	u32 image_size_sectors;
+	unsigned long count; 
+	u32 end_tag;
+	int ret;
+
+	im_header = &(header->header);
+
+	/* decode header and fill out spl_image structure */
+	ret = spl_parse_image_header(im_header);
+	if (ret) {
+		return ret;
+	}
+
+	/*
+	 * convert size to sectors - round up,
+	 * add 256 bytes for NetModule header, 4 bytes for NetModule trailer 
+	 */
+	image_size_sectors = (spl_image.size + nm_header_size + sizeof(u32) + 
+			     mmc->read_bl_len - 1) /
+			     mmc->read_bl_len;
+
+	/*
+	 * Read the header too to avoid extra memcpy,
+	 * compensate the load address for the NetModule header 
+	 */
+	count = blk_dread(mmc_get_blk_desc(mmc), sector, image_size_sectors,
+			  (void *)(ulong)spl_image.load_addr - nm_header_size);
+	debug("read %x sectors to %x\n", image_size_sectors,
+	      spl_image.load_addr);
+
+	if (count != image_size_sectors) {
+		puts(", read error");
+		return -EIO;
+	}
+
+	/* Check NetModule end tag to be sure image is completely written */
+	end_tag_position =  (const __be32*)(spl_image.load_addr + spl_image.size);
+	end_tag = __be32_to_cpu(*end_tag_position);
+	if (end_tag != 0x424c454e) {
+		puts(", end marker fail");
+		return -EFAULT;
+	}
+
+	puts(", end marker ok");
+
+	return 0;
+}
+
+static int mmc_load_image_raw_sector_netmodule(struct mmc *mmc, unsigned long sector)
+{
+	unsigned long count;
+	struct nm_header *header;
+	int ret = 0;
+
+	printf("Checking NM U-Boot at sector 0x%lx: ", sector);
+
+	header = (struct nm_header *)(CONFIG_SYS_TEXT_BASE -
+					 sizeof(struct nm_header));
+
+	/* read image header to find the image size and load address */
+	count = blk_dread(mmc_get_blk_desc(mmc), sector, 1, header);
+	debug("hdr read sector %lx, count=%lu\n", sector, count);
+	if (count == 0) {
+		ret = -EIO;
+		goto end;
+	}
+
+	if (image_nm_header_ok(header)) {
+		puts("hdr fail");
+		ret = -EFAULT;
+		goto end;
+	}
+
+	puts("hdr ok");
+
+	ret = mmc_load_netmodule(mmc, sector, header);
+
+end:
+	if (ret) {
+		puts(" -> skipping\n");
+		return -1;
+	}
+
+	puts("\n");
+
+	return 0;
+}
+
+#endif /* CONFIG_NM_BOOTLOADER_FORMAT) */
+
 static int mmc_load_legacy(struct mmc *mmc, ulong sector,
 			   struct image_header *header)
 {
+	u32 header_size = sizeof(struct image_header);
 	u32 image_size_sectors;
+	u32 image_size_bytes;
+	u32 data_crc;
+	u32 data_crc_memory;
 	unsigned long count;
 	int ret;
 
+	/*
+	 * Note: spl_parse_image_header() always returns 0 
+	 * Own header check required here.
+	 */
+	if (image_get_magic(header) != IH_MAGIC) {
+		puts("hdr fail");
+		return -EFAULT;
+	}
+
 	ret = spl_parse_image_header(header);
 	if (ret)
 		return ret;
 
+	puts("hdr ok");
+
+	/* TODO: This assumes a header is present (e.g. no PPC images) */
+	/* Could also check spl_image.flags & SPL_COPY_PAYLOAD_ONLY above */
+
+	image_size_bytes = __be32_to_cpu(header->ih_size);
+	data_crc = __be32_to_cpu(header->ih_dcrc);
+
+	if ((image_size_bytes < UBOOT_MIN_SIZE_BYTES) || (image_size_bytes > UBOOT_MAX_SIZE_BYTES)) {
+		puts(", data len fail");
+		return -EFAULT;
+	}
+
+	puts(", data len ok");
+
 	/* convert size to sectors - round up */
 	image_size_sectors = (spl_image.size + mmc->read_bl_len - 1) /
 			     mmc->read_bl_len;
@@ -36,10 +182,22 @@ static int mmc_load_legacy(struct mmc *mmc, ulong sector,
 	/* Read the header too to avoid extra memcpy */
 	count = blk_dread(mmc_get_blk_desc(mmc), sector, image_size_sectors,
 			  (void *)(ulong)spl_image.load_addr);
+
 	debug("read %x sectors to %x\n", image_size_sectors,
 	      spl_image.load_addr);
-	if (count != image_size_sectors)
+	if (count != image_size_sectors) {
+		puts(", read error");
 		return -EIO;
+	}
+
+	/* Check data CRC */
+	data_crc_memory = crc32(0, (const u8*)(spl_image.load_addr + header_size), image_size_bytes);
+	if (data_crc_memory != data_crc) {
+		puts(", data crc fail");
+		return -EFAULT;
+	}
+
+	puts(", data crc ok");
 
 	return 0;
 }
@@ -58,6 +216,8 @@ static int mmc_load_image_raw_sector(struct mmc *mmc, unsigned long sector)
 	struct image_header *header;
 	int ret = 0;
 
+	printf("Checking U-Boot at sector 0x%lx: ", sector);
+
 	header = (struct image_header *)(CONFIG_SYS_TEXT_BASE -
 					 sizeof(struct image_header));
 
@@ -65,6 +225,11 @@ static int mmc_load_image_raw_sector(struct mmc *mmc, unsigned long sector)
 	count = blk_dread(mmc_get_blk_desc(mmc), sector, 1, header);
 	debug("hdr read sector %lx, count=%lu\n", sector, count);
 	if (count == 0) {
+/*
+#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
+		puts("mmc_load_image_raw_sector: mmc block read error\n");
+#endif
+*/
 		ret = -EIO;
 		goto end;
 	}
@@ -86,12 +251,12 @@ static int mmc_load_image_raw_sector(struct mmc *mmc, unsigned long sector)
 
 end:
 	if (ret) {
-#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
-		puts("mmc_load_image_raw_sector: mmc block read error\n");
-#endif
+		puts(" -> skipping\n");
 		return -1;
 	}
 
+	puts("\n");
+
 	return 0;
 }
 
@@ -321,11 +486,36 @@ int spl_mmc_load_image(u32 boot_device)
 			CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION);
 		if (!err)
 			return err;
+
 #if defined(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR)
+
+#if defined(CONFIG_NM_BOOTLOADER_FORMAT)
+		/* Try to load NetModule packed bootloader from main location */
+		err = mmc_load_image_raw_sector_netmodule(mmc,
+			CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR);
+		if (!err)
+			return err;	/* found -> ok */
+#endif
+		/* Try to load bootloader from main location */
 		err = mmc_load_image_raw_sector(mmc,
 			CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR);
 		if (!err)
-			return err;
+			return err;	/* found -> ok */
+
+#if defined(CONFIG_NM_BOOTLOADER_FORMAT)
+		/* Try to load NetModule packed bootloader from alternate location */
+		err = mmc_load_image_raw_sector_netmodule(mmc,
+			CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR_ALTERNATE);
+		if (!err)
+			return err;	/* found -> ok */
+#endif
+
+		/* Try to load regular bootloader from alternate location */
+		err = mmc_load_image_raw_sector(mmc,
+			CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR_ALTERNATE);
+		if (!err) {
+			return err;	/* found -> ok */
+		}
 #endif
 		/* If RAW mode fails, try FS mode. */
 	case MMCSD_MODE_FS:

configs/am335x_hw25_defconfig

@@ -0,0 +1,49 @@
+CONFIG_ARM=y
+CONFIG_TARGET_AM335X_HW25=y
+CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
+CONFIG_FIT=y
+CONFIG_SYS_EXTRA_OPTIONS="EMMC_BOOT"
+CONFIG_HUSH_PARSER=y
+CONFIG_AUTOBOOT_KEYED=y
+CONFIG_AUTOBOOT_PROMPT="Press s to abort autoboot in %d seconds\n"
+CONFIG_AUTOBOOT_STOP_STR="s"
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_ASKENV=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_DFU_TFTP=y
+CONFIG_SYS_NS16550=y
+CONFIG_USB=y
+CONFIG_USB_MUSB_HOST=y
+CONFIG_USB_MUSB_GADGET=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
+CONFIG_G_DNL_VENDOR_NUM=0x0451
+CONFIG_G_DNL_PRODUCT_NUM=0xd022
+CONFIG_OF_LIBFDT=y
+# CONFIG_BOOTP_PXE_CLIENTARCH is not set
+# CONFIG_CMD_PXE is not set
+# CONFIG_CMD_BOOTEFI is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_FPGA is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_PMIC is not set
+# CONFIG_EFI_LOADER is not set
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set

configs/am335x_nrhw24_defconfig

@@ -0,0 +1,49 @@
+CONFIG_ARM=y
+CONFIG_TARGET_AM335X_NRHW24=y
+CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
+CONFIG_FIT=y
+CONFIG_SYS_EXTRA_OPTIONS="EMMC_BOOT"
+CONFIG_HUSH_PARSER=y
+CONFIG_AUTOBOOT_KEYED=y
+CONFIG_AUTOBOOT_PROMPT="Press s to abort autoboot in %d seconds\n"
+CONFIG_AUTOBOOT_STOP_STR="s"
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_ASKENV=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_DFU_TFTP=y
+CONFIG_SYS_NS16550=y
+CONFIG_USB=y
+CONFIG_USB_MUSB_HOST=y
+CONFIG_USB_MUSB_GADGET=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
+CONFIG_G_DNL_VENDOR_NUM=0x0451
+CONFIG_G_DNL_PRODUCT_NUM=0xd022
+CONFIG_OF_LIBFDT=y
+# CONFIG_BOOTP_PXE_CLIENTARCH is not set
+# CONFIG_CMD_PXE is not set
+# CONFIG_CMD_BOOTEFI is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_FPGA is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_PMIC is not set
+# CONFIG_EFI_LOADER is not set
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set

drivers/i2c/omap24xx_i2c.c

@@ -420,8 +420,10 @@ static int omap24_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
 			}
 			if (status == 0 || (status & I2C_STAT_NACK)) {
 				i2c_error = 1;
-				/*printf("i2c_read: error waiting for addr ACK (status=0x%x)\n",
-				       status);*/
+#ifdef CONFIG_NRSW_BUILD
+				printf("i2c_read: error waiting for addr ACK (status=0x%x)\n",
+				       status);
+#endif
 				goto rd_exit;
 			}
 			if (alen) {
@@ -736,7 +738,7 @@ U_BOOT_I2C_ADAP_COMPLETE(omap24_1, omap24_i2c_init, omap24_i2c_probe,
 #endif
 
 U_BOOT_I2C_ADAP_COMPLETE(omap24_2, omap24_i2c_init, omap24_i2c_probe,
-			 omap24_i2c_read, omap24_i2c_write, NULL,
+			 omap24_i2c_read, omap24_i2c_write, omap24_i2c_setspeed,
 			 CONFIG_SYS_OMAP24_I2C_SPEED2,
 			 CONFIG_SYS_OMAP24_I2C_SLAVE2,
 			 2)
@@ -749,7 +751,7 @@ U_BOOT_I2C_ADAP_COMPLETE(omap24_2, omap24_i2c_init, omap24_i2c_probe,
 #endif
 
 U_BOOT_I2C_ADAP_COMPLETE(omap24_3, omap24_i2c_init, omap24_i2c_probe,
-			 omap24_i2c_read, omap24_i2c_write, NULL,
+			 omap24_i2c_read, omap24_i2c_write, omap24_i2c_setspeed,
 			 CONFIG_SYS_OMAP24_I2C_SPEED3,
 			 CONFIG_SYS_OMAP24_I2C_SLAVE3,
 			 3)
@@ -762,7 +764,7 @@ U_BOOT_I2C_ADAP_COMPLETE(omap24_3, omap24_i2c_init, omap24_i2c_probe,
 #endif
 
 U_BOOT_I2C_ADAP_COMPLETE(omap24_4, omap24_i2c_init, omap24_i2c_probe,
-			 omap24_i2c_read, omap24_i2c_write, NULL,
+			 omap24_i2c_read, omap24_i2c_write, omap24_i2c_setspeed,
 			 CONFIG_SYS_OMAP24_I2C_SPEED4,
 			 CONFIG_SYS_OMAP24_I2C_SLAVE4,
 			 4)

drivers/net/phy/phy.c

@@ -243,7 +243,6 @@ int genphy_update_link(struct phy_device *phydev)
 
 	if ((phydev->autoneg == AUTONEG_ENABLE) &&
 	    !(mii_reg & BMSR_ANEGCOMPLETE)) {
-		const int timeout = PHY_ANEG_TIMEOUT;
 		int i = 0;
 
 		printf("%s Waiting for PHY auto negotiation to complete",
@@ -252,7 +251,7 @@ int genphy_update_link(struct phy_device *phydev)
 			/*
 			 * Timeout reached ?
 			 */
-			if (i > timeout) {
+			if (i > PHY_ANEG_TIMEOUT) {
 				printf(" TIMEOUT !\n");
 				phydev->link = 0;
 				return -ETIMEDOUT;

drivers/serial/serial-uclass.c

@@ -27,6 +27,17 @@ static const unsigned long baudrate_table[] = CONFIG_SYS_BAUDRATE_TABLE;
 #error "Serial is required before relocation - define CONFIG_SYS_MALLOC_F_LEN to make this work"
 #endif
 
+#ifdef CONFIG_CONS_INDEX
+static int console_index = CONFIG_CONS_INDEX - 1;
+#else
+static int console_index = 0;
+#endif
+
+void serial_set_console_index(int index)
+{
+	console_index = index;
+}
+
 static void serial_find_console_or_panic(void)
 {
 	const void *blob = gd->fdt_blob;
@@ -84,18 +95,12 @@ static void serial_find_console_or_panic(void)
 		 * extremis just the first serial device we can find. But we
 		 * insist on having a console (even if it is silent).
 		 */
-#ifdef CONFIG_CONS_INDEX
-#define INDEX (CONFIG_CONS_INDEX - 1)
-#else
-#define INDEX 0
-#endif
-		if (!uclass_get_device_by_seq(UCLASS_SERIAL, INDEX, &dev) ||
-		    !uclass_get_device(UCLASS_SERIAL, INDEX, &dev) ||
+		if (!uclass_get_device_by_seq(UCLASS_SERIAL, console_index, &dev) ||
+		    !uclass_get_device(UCLASS_SERIAL, console_index, &dev) ||
 		    (!uclass_first_device(UCLASS_SERIAL, &dev) && dev)) {
 			gd->cur_serial_dev = dev;
 			return;
 		}
-#undef INDEX
 	}
 
 #ifdef CONFIG_REQUIRE_SERIAL_CONSOLE
@@ -115,7 +120,9 @@ int serial_init(void)
 /* Called after relocation */
 void serial_initialize(void)
 {
+#if !defined(CONFIG_PRE_CONSOLE_BUFFER)
 	serial_init();
+#endif
 }
 
 static void _serial_putc(struct udevice *dev, char ch)

fs/fs.c

@@ -307,8 +307,6 @@ int fs_read(const char *filename, ulong addr, loff_t offset, loff_t len,
 	unmap_sysmem(buf);
 
 	/* If we requested a specific number of bytes, check we got it */
-	if (ret == 0 && len && *actread != len)
-		printf("** %s shorter than offset + len **\n", filename);
 	fs_close();
 
 	return ret;

include/configs/am335x_hw25.h

@@ -0,0 +1,320 @@
+/*
+ * am335x_hw25.h
+ *
+ * Copyright (C) 2018-2019 NetModule AG - http://www.netmodule.com/
+ * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __CONFIG_AM335X_HW25_H
+#define __CONFIG_AM335X_HW25_H
+
+#include <configs/ti_am335x_common.h>
+
+/* Disable U-Boot load from filesystems, to save around 10 kB SPL image size */
+#ifdef CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
+# undef CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
+#endif
+
+#undef CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC
+
+#undef CONFIG_HW_WATCHDOG
+#undef CONFIG_OMPAP_WATCHDOG
+#undef CONFIG_SPL_WATCHDOG_SUPPORT
+
+#ifndef CONFIG_SPL_BUILD
+# define CONFIG_TIMESTAMP
+# define CONFIG_LZO
+#endif
+
+#define CONFIG_SYS_BOOTM_LEN		(16 << 20)
+
+#define MACH_TYPE_TIAM335EVM		3589	/* Until the next sync */
+#define CONFIG_MACH_TYPE		MACH_TYPE_TIAM335EVM
+#define CONFIG_BOARD_LATE_INIT
+
+/* TODO: It could be preconsole buffer is not properly working in SPL
+ * Observed lock ups when printing too much text.
+#define CONFIG_PRE_CONSOLE_BUFFER
+#define CONFIG_PRE_CON_BUF_ADDR   	0x80000000
+#define CONFIG_PRE_CON_BUF_SZ     	64*1024
+*/
+
+/* Clock Defines */
+#define V_OSCK				0 /* 0 means detect from sysboot1 config */
+#define V_SCLK				(V_OSCK)
+
+#include <config_distro_bootcmd.h>
+
+/* Dynamic override for PHY_ANEG_TIMEOUT value */
+#ifndef CONFIG_SPL_BUILD
+# ifndef __ASSEMBLER__
+int eth_phy_timeout(void);
+# endif
+#endif
+#define PHY_ANEG_TIMEOUT		eth_phy_timeout()
+#define PHY_ANEG_DEFAULT_TIMEOUT	5000
+
+#define CONFIG_ARP_TIMEOUT		200
+#undef CONFIG_NET_RETRY_COUNT
+#define CONFIG_NET_RETRY_COUNT		5
+#define CONFIG_BOOTP_MAY_FAIL
+
+#ifndef CONFIG_SPL_BUILD
+
+/*
+ * Memory map for booting Linux
+ *
+ * 0x80000000   32MB	KERNEL_ADDR (kernel_addr), kernel execution address
+ * 0x82000000  190MB    KERNEL_ADDR_R (kernel_addr_r), FIT image/kernel loading address
+ * 			 kernel will be relocated kernel_addr
+ *                       for FIT images, ramdisc and dtb will be relocated to 
+ *                       top of bootmemory (0x8e000000 downwards)
+ * 0x8BE00000    1MB	FDT_ADDR_R (fdt_addr_r), device tree if separate from kernel/FIT
+ * 0x8BF00000	 1MB	PXE_ADDR (pxefile_addr_r), pxe configuration file (pxe get command)
+ * 0x8C000000   32MB	LOAD_ADDR (load_addr), loading address for generic files
+ * <end of boot memory>
+ * 0x8E000000    4B     NRSW reset reason
+ *              32MB    <>, Free space
+ * 0x90000000  256MB	<>, Free space, 512MB systems
+ * 0xA0000000  512MB	<>, Free space, 1GB systems only
+ * 0xC0000000		End of RAM
+ */
+
+#define KERNEL_ADDR	"0x80000000"
+#define KERNEL_ADDR_R	"0x82000000"
+#define FDT_ADDR_R	"0x8BE00000"
+#define PXE_ADDR	"0x8BF00000"
+#define LOAD_ADDR	"0x8C000000"
+
+/*
+ * Limit boot memory to 256 MBytes to comply with kernel initial memory layout
+ * This is the official way to restrict image load addresses. 
+ * Don't use xx_high_addr variables.
+ */
+#define BOOTM_SIZE      "0x0E000000"	
+
+/* Set boot command depending of software environment */
+#ifndef CONFIG_NRSW_BUILD
+/* Yocto/OSTree boot command */
+#define MAIN_BOOTCMD "run boot_ostree"
+#else
+/* NRSW boot command */
+#define MAIN_BOOTCMD "run sdboot"
+#endif
+
+/* TODO: Might need to check ti_cpsw.rx_packet_max when running on top of AM335x switch */
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	/* Memory Adresses */ \
+	"fdt_addr_r=" FDT_ADDR_R "\0" \
+	"kernel_addr=" KERNEL_ADDR "\0" /* NRSW only */ \
+	"kernel_addr_r=" KERNEL_ADDR_R  "\0" \
+	"load_addr=" LOAD_ADDR "\0" \
+	"pxefile_addr_r=" PXE_ADDR "\0" \
+	"bootm_size=" BOOTM_SIZE "\0" \
+	\
+	/* Misc */ \
+	"defaultconsole=ttyS0\0" \
+	"fdt_skip_update=yes\0" \
+	"bootdelay=0\0" \
+	\
+	/* Networking */ \
+	"ethprime=cpsw\0" \
+	"ethopts=ti_cpsw.rx_packet_max=1526\0" \
+	"ipaddr=192.168.1.1\0" \
+	"serverip=192.168.1.254\0" \
+	"tftptimeout=2000\0" \
+	"tftptimeoutcountmax=5\0" \
+	"bootpretryperiod=10000\0" \
+	"autoload=false\0" \
+	\
+	/* OSTree boot */ \
+	"bootcmd_otenv=ext4load mmc 1:1 $load_addr /boot/loader/uEnv.txt; " \
+			"setenv bootargs_prev $bootargs; " \
+			"env import -t $load_addr $filesize; setenv bootargs $bootargs_prev $bootargs root=/dev/ram0 console=$defaultconsole,115200 " \
+			"$ethopts rw ostree_root=/dev/mmcblk1p1\0" \
+	"bootcmd_rd_in_mmc=ext4load mmc 1:1 $kernel_addr_r /boot$kernel_image; " \
+			"bootm $kernel_addr_r\0" \
+	"boot_ostree=run bootcmd_otenv; run bootcmd_rd_in_mmc\0" \
+	\
+	/* NRSW boot */ \
+	"root_part=1\0" /* from NRSW, required here? set from board.c */ \
+	"kernel_image=kernel.bin\0" \
+	"fdt_image=am335x-hw25-prod1.dtb\0" \
+	"add_sd_bootargs=setenv bootargs $bootargs root=/dev/${mmc_dev}p$root_part rootfstype=ext4 " \
+			"console=$defaultconsole,115200 rootwait loglevel=4 ti_cpsw.rx_packet_max=1526\0" \
+	"add_version_bootargs=setenv bootargs $bootargs\0" \
+	"sdbringup=echo Try bringup boot && ext4load mmc 1:$root_part $kernel_addr /boot/zImage && " \
+			"ext4load mmc 1:$root_part $fdt_addr /boot/$fdt_image && setenv bootargs $bootargs rw;\0" \
+	"sdprod=ext4load mmc 1:$root_part $kernel_addr /boot/$kernel_image && " \
+			"ext4load mmc 1:$root_part $fdt_addr /boot/$fdt_image && setenv bootargs $bootargs ro;\0" \
+	"sdboot=env set fdt_addr " FDT_ADDR_R "; "\
+			"if mmc dev 1; then echo Copying Linux from SD to RAM...; "\
+			"if test -e mmc 1:$root_part /boot/$kernel_image; then run sdprod; " \
+			"else run sdbringup; fi; " \
+			/* For v4.19 kernel $mmc_dev should be "mmcblk1" (read from DT), for v3.18 kernel: "mmcblk0" */ \
+			"fdt addr $fdt_addr;if fdt get value mmc_dev /nm_env nm,mmc-dev;then;else setenv mmc_dev mmcblk0;fi;" \
+			"run add_sd_bootargs; run add_version_bootargs; " \
+			"bootz $kernel_addr - $fdt_addr; fi\0" \
+	\
+	/* Boot command */ \
+	"bootcmd=" MAIN_BOOTCMD "\0" \
+	\
+	/* Recovery boot (same for OSTree and NRSW) */ \
+	"recovery=run pxe_recovery || setenv ipaddr $ipaddr; setenv serverip $serverip; run tftp_recovery\0" \
+	/* setenv ipaddr and serverip is necessary, because dhclient destroys the IPs internally */ \
+	"pxe_recovery=mdio up $ethprime && dhcp && pxe get && pxe boot\0" \
+	"tftp_recovery=tftpboot $kernel_addr_r recovery-image; tftpboot $fdt_addr_r recovery-dtb; " \
+			"setenv bootargs rdinit=/etc/preinit console=$defaultconsole,115200 " \
+			"debug $ethopts; " \
+			"bootz $kernel_addr_r - $fdt_addr_r\0" /* kernel_addr_r */
+
+#endif
+
+
+/* TODO: Check if ok for NRSW? */
+#define CONFIG_ZERO_BOOTDELAY_CHECK
+
+/* UART Configuration */
+#define CONFIG_SYS_NS16550_COM1			0x44e09000	/* UART0: XModem Boot, Debug UART */
+
+/* TODO: Preparation in case UART5 shall be used later */
+#if 0
+#define CONFIG_SYS_NS16550_COM2			0x48022000	/* UART1: Unused, see note below */
+#define CONFIG_SYS_NS16550_COM3			0x48024000	/* UART2: Unused, see note below */
+/* NOTE: NS16550 definitions are cumulative, need to set COM2 to have COM3 */
+#define CONFIG_SYS_NS16550_COM4			0x481A6000	/* UART3: - */
+#define CONFIG_SYS_NS16550_COM5			0x481A8000	/* UART4: - */
+#define CONFIG_SYS_NS16550_COM6			0x481AA000	/* UART5: User UART */
+#endif
+
+#define CONFIG_I2C
+#define CONFIG_I2C_MULTI_BUS
+
+#define CONFIG_CMD_EEPROM
+#define CONFIG_SYS_I2C_EEPROM_ADDR              0x50	/* Main EEPROM */
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN          2
+#define CONFIG_SYS_I2C_SPEED                    100000
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS       4
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   50	/* TODO: Can this be reduced to 20ms */
+
+/* Put Environment in eMMC */
+#define CONFIG_ENV_OFFSET			(512 * 128)	/* @ 512*256 SPL starts */
+#define CONFIG_ENV_SIZE				(4 * 1024)
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_SYS_MMC_ENV_DEV			1
+
+#undef CONFIG_SPL_ENV_SUPPORT
+#undef CONFIG_SPL_NAND_SUPPORT
+#undef CONFIG_SPL_ONENAND_SUPPORT
+
+/* We need to disable SPI to not confuse the eeprom env driver */
+#undef CONFIG_SPI
+#undef CONFIG_SPI_BOOT
+#undef CONFIG_SPL_OS_BOOT
+
+#define CONFIG_SPL_YMODEM_SUPPORT
+
+#define CONFIG_SPL_LDSCRIPT		"$(CPUDIR)/am33xx/u-boot-spl.lds"
+
+#define CONFIG_SUPPORT_EMMC_BOOT
+
+/*
+ * USB configuration.  We enable MUSB support, both for host and for
+ * gadget.  We set USB0 as peripheral and USB1 as host, based on the
+ * board schematic and physical port wired to each.  Then for host we
+ * add mass storage support and for gadget we add both RNDIS ethernet
+ * and DFU.
+ */
+#define CONFIG_USB_MUSB_DSPS
+#define CONFIG_ARCH_MISC_INIT
+#define CONFIG_USB_MUSB_PIO_ONLY
+#define CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT
+#define CONFIG_AM335X_USB0
+#define CONFIG_AM335X_USB0_MODE		MUSB_HOST
+
+/* To support eMMC booting */
+#define CONFIG_STORAGE_EMMC
+#define CONFIG_FASTBOOT_FLASH_MMC_DEV   1
+
+#ifdef CONFIG_USB_MUSB_HOST
+#define CONFIG_USB_STORAGE
+#endif
+
+#ifdef CONFIG_USB_MUSB_GADGET
+/* Removing USB gadget and can be enabled adter adding support usb DM */
+#ifndef CONFIG_DM_ETH
+#define CONFIG_USB_ETHER
+#define CONFIG_USB_ETH_RNDIS
+#define CONFIG_USBNET_HOST_ADDR	"de:ad:be:af:00:00"
+#endif /* CONFIG_DM_ETH */
+#endif /* CONFIG_USB_MUSB_GADGET */
+
+
+/*
+ * Disable MMC DM for SPL build and can be re-enabled after adding
+ * DM support in SPL
+ */
+#ifdef CONFIG_SPL_BUILD
+#undef CONFIG_DM_MMC
+#undef CONFIG_TIMER
+#endif
+
+#if defined(CONFIG_SPL_BUILD)
+/* Remove other SPL modes. */
+#undef CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_ENV_IS_NOWHERE
+#undef CONFIG_PARTITION_UUIDS
+#undef CONFIG_EFI_PARTITION
+#endif
+
+/* Network. */
+#define CONFIG_IP_DEFRAG		/* so we can use large tftp blocks */
+#define CONFIG_TFTP_TSIZE		/* tftp transfer size, progress bar */
+
+#define CONFIG_PHYLIB
+#define CONFIG_PHY_SMSC
+
+#define CONFIG_CMD_MEMTEST
+#define CONFIG_SYS_MEMTEST_START    0x84000000
+#define CONFIG_SYS_MEMTEST_END      0x87900000
+
+
+#ifdef CONFIG_NRSW_BUILD
+/* support for NM packed bootloader */
+#define CONFIG_NM_BOOTLOADER_FORMAT
+
+/* password protected login */
+#define CONFIG_CRYPT
+#define CONFIG_NM_LOGIN
+#define CONFIG_NM_LOGIN_PART	"1:3"	/* TODO: Define location of file for OSTree/Yocto */
+#define CONFIG_NM_LOGIN_PASSWD	"/root/boot/bootpass"
+#endif
+
+#define CONFIG_CMD_PXE
+
+#define CONFIG_OF_BOARD_SETUP
+
+#define CONFIG_JTAG_MARKER_SPL		0x402FFF00
+#define CONFIG_JTAG_MARKER_UBOOT	0x807FFF00
+
+/* NRSW PMIC Reset Reason */
+#define RESET_REASON_SHM_LOCATION	0x8e000000
+
+
+/* SPL command is not needed */
+#undef CONFIG_CMD_SPL
+
+/* Never enable ISO it is broken and can lead to a crash */
+#undef CONFIG_ISO_PARTITION
+
+#endif	/* ! __CONFIG_AM335X_HW25_H */

include/configs/am335x_netbird.h

@@ -49,7 +49,7 @@
 	"kernel_addr=0x80000000\0" \
 	"load_addr=0x83000000\0" \
 	"root_part=1\0" /* Default root partition, overwritte in board/mv_ebu/a38x/nbhw14_env.c */ \
-	"add_sd_bootargs=setenv bootargs $bootargs root=/dev/mmcblk0p$root_part rootfstype=ext4 console=ttyO0,115200 rootwait earlyprintk\0" \
+	"add_sd_bootargs=setenv bootargs $bootargs root=/dev/mmcblk1p$root_part rootfstype=ext4 console=ttyO0,115200 rootwait earlyprintk\0" \
 	"add_version_bootargs=setenv bootargs $bootargs\0" \
 	"fdt_skip_update=yes\0" \
     "ethprime=cpsw\0" \

include/configs/am335x_netbird_v2.h

@@ -90,7 +90,9 @@
 	"tftp_recovery=tftpboot $kernel_addr recovery-image; tftpboot $fdt_addr recovery-dtb; setenv bootargs rdinit=/etc/preinit console=$defaultconsole,115200 debug; run shieldcmd; run modifyfdtcmd; bootz $kernel_addr - $fdt_addr\0" \
 	"pxe_recovery=sleep 3 && dhcp && pxe get && pxe boot\0" \
 	"recovery=run pxe_recovery || setenv ipaddr $ipaddr; setenv serverip $serverip; run tftp_recovery\0" /* setenv ipaddr and serverip is necessary, because dhclient can destroy the IPs inernally */ \
-        "bootcmd_otenv=ext4load mmc 1:1 $load_addr /boot/loader/uEnv.txt; env import -t $load_addr $filesize; setenv bootargs $bootargs root=/dev/ram0 console=$defaultconsole,115200 rw ostree_root=/dev/mmcblk1p1\0" \
+        "bootcmd_otenv=ext4load mmc 1:1 $load_addr /boot/loader/uEnv.txt; " \ 
+				"setenv bootargs_prev $bootargs; " \
+				"env import -t $load_addr $filesize; setenv bootargs $bootargs_prev $bootargs root=/dev/ram0 console=$defaultconsole,115200 " \
         "bootcmd_rd_in_mmc=ext4load mmc 1:1 $kernel_addr_r /boot$kernel_image; bootm $kernel_addr_r#conf@am335x-nrhw16-prod4.dtb\0" \
         "fdt_high=0xffffffff\0" \
         "initrd_high=0xffffffff\0"

include/configs/am335x_nmhw21.h

@@ -19,6 +19,11 @@
 
 #include <configs/ti_am335x_common.h>
 
+/* Disable U-Boot load from filesystems, to save around 10 kB SPL image size */
+#ifdef CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
+# undef CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
+#endif
+
 #undef CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC
 
 #undef CONFIG_HW_WATCHDOG
@@ -58,70 +63,112 @@ int eth_phy_timeout(void);
 
 #ifndef CONFIG_SPL_BUILD
 
-
 /*
  * Memory map for booting Linux
  *
- * 0x80000000   63MB	KERNEL_ADDR (kernel_addr), kernel execution address
- * 0x83F00000    1MB	FDT_ADDR (fdt_addr_r), device tree loading address if not included in kernel
- * 0x84000000  126MB	RD_ADDR (ramdisk_addr_r), ramdisc loading address
- * 0x8BE00000    2MB	PXE_ADDR (pxefile_addr_r), pxe configuration file (pxe get command)
- * 0x8C000000    1MB	LOAD_ADDR (load_addr), loading address for generic files
- * 0x8C100000   63MB	KERNEL_ADDR_R (kernel_addr_r), kernel loading address (will be relocated to kernel_addr)
- * 0x90000000  256MB	<>, Free space 512MB systems
+ * 0x80000000   32MB	KERNEL_ADDR (kernel_addr), kernel execution address
+ * 0x82000000  190MB    KERNEL_ADDR_R (kernel_addr_r), FIT image/kernel loading address
+ * 			 kernel will be relocated kernel_addr
+ *                       for FIT images, ramdisc and dtb will be relocated to 
+ *                       top of bootmemory (0x8e000000 downwards)
+ * 0x8BE00000    1MB	FDT_ADDR_R (fdt_addr_r), device tree if separate from kernel/FIT
+ * 0x8BF00000	 1MB	PXE_ADDR (pxefile_addr_r), pxe configuration file (pxe get command)
+ * 0x8C000000   32MB	LOAD_ADDR (load_addr), loading address for generic files
+ * <end of boot memory>
+ * 0x8E000000    4B     NRSW reset reason
+ *              32MB    <>, Free space
+ * 0x90000000  256MB	<>, Free space, 512MB systems
  * 0xA0000000  512MB	<>, Free space, 1GB systems only
  * 0xC0000000		End of RAM
  */
 
 #define KERNEL_ADDR	"0x80000000"
-#define FDT_ADDR	"0x83F00000"
-#define RD_ADDR		"0x84000000"
-#define PXE_ADDR	"0x8BE00000"
+#define KERNEL_ADDR_R	"0x82000000"
+#define FDT_ADDR_R	"0x8BE00000"
+#define PXE_ADDR	"0x8BF00000"
 #define LOAD_ADDR	"0x8C000000"
-#define KERNEL_ADDR_R	"0x8C100000"
 
 /*
- * Avoid copying ramdisc and dtb above 512MB, as it breaks Linux boot.
- * -1 means "do not copy" to high address, use in place.
+ * Limit boot memory to 256 MBytes to comply with kernel initial memory layout
+ * This is the official way to restrict image load addresses. 
+ * Don't use xx_high_addr variables.
  */
-#define INITRD_HIGH_ADDR "0x84000000"
-#define FDT_HIGH_ADDR    "0xffffffff"
+#define BOOTM_SIZE      "0x0E000000"	
+
+/* Set boot command depending of software environment */
+#ifndef CONFIG_NRSW_BUILD
+/* Yocto/OSTree boot command */
+#define MAIN_BOOTCMD "run boot_ostree"
+#else
+/* NRSW boot command */
+#define MAIN_BOOTCMD "run sdboot"
+#endif
 
 #define CONFIG_EXTRA_ENV_SETTINGS \
-	"fdt_image=am335x-nmhw21-prod1.dtb\0" \
-	"fdt_addr_r=" FDT_ADDR "\0" \
-	"fdt_high=" FDT_HIGH_ADDR "\0" \
-	"initrd_high=" INITRD_HIGH_ADDR "\0" \
-	"kernel_addr=" KERNEL_ADDR "\0" \
+	/* Memory Adresses */ \
+	"fdt_addr_r=" FDT_ADDR_R "\0" \
+	"kernel_addr=" KERNEL_ADDR "\0" /* NRSW only */ \
 	"kernel_addr_r=" KERNEL_ADDR_R  "\0" \
 	"load_addr=" LOAD_ADDR "\0" \
 	"pxefile_addr_r=" PXE_ADDR "\0" \
-	"ramdisk_addr_r=" RD_ADDR "\0" \
+	"bootm_size=" BOOTM_SIZE "\0" \
+	\
+	/* Misc */ \
 	"defaultconsole=ttyS2\0" \
 	"fdt_skip_update=yes\0" \
+	"bootdelay=0\0" \
+	\
+	/* Networking */ \
 	"ethprime=cpsw\0" \
 	"ethopts=ti_cpsw.rx_packet_max=1526\0" \
-	"bootcmd_otenv=ext4load mmc 1:1 $load_addr /boot/loader/uEnv.txt; " \
-			"env import -t $load_addr $filesize; " \
-			"setenv bootargs $bootargs root=/dev/ram0 console=$defaultconsole,115200 " \
-			"$ethopts rw ostree_root=/dev/mmcblk1p1\0" \
-	"bootcmd_rd_in_mmc=ext4load mmc 1:1 $kernel_addr_r /boot$kernel_image; " \
-			"bootm $kernel_addr_r\0" \
-	"bootcmd=run bootcmd_otenv; run bootcmd_rd_in_mmc\0" \
-	"bootdelay=0\0" \
 	"ipaddr=192.168.1.1\0" \
 	"serverip=192.168.1.254\0" \
 	"tftptimeout=2000\0" \
 	"tftptimeoutcountmax=5\0" \
-	"bootpretryperiod=10000\0" \
+	"bootpretryperiod=10000\0" /* 2000 */ \
 	"autoload=false\0" \
-	"tftp_recovery=tftpboot $kernel_addr recovery-image; tftpboot $fdt_addr_r recovery-dtb; " \
-			"setenv bootargs rdinit=/etc/preinit console=$defaultconsole,115200 " \
-			"debug ethopts; " \
-			"bootz $kernel_addr - $fdt_addr_r\0" \
-	"pxe_recovery=mdio up $ethprime && dhcp && pxe get && pxe boot\0" \
+	\
+	/* OSTree boot */ \
+	"bootcmd_otenv=ext4load mmc 1:1 $load_addr /boot/loader/uEnv.txt; " \
+			"setenv bootargs_prev $bootargs; " \
+			"env import -t $load_addr $filesize; setenv bootargs $bootargs_prev $bootargs root=/dev/ram0 console=$defaultconsole,115200 " \
+			"$ethopts rw ostree_root=/dev/mmcblk1p1\0" \
+	"bootcmd_rd_in_mmc=ext4load mmc 1:1 $kernel_addr_r /boot$kernel_image; " \
+			"bootm $kernel_addr_r\0" \
+	"boot_ostree=run bootcmd_otenv; run bootcmd_rd_in_mmc\0" \
+	\
+	/* NRSW boot */ \
+	"root_part=1\0" /* from NRSW, required here? set from board.c */ \
+	"kernel_image=kernel.bin\0" \
+	"fdt_image=am335x-nmhw21-prod1.dtb\0" \
+	"add_sd_bootargs=setenv bootargs $bootargs root=/dev/${mmc_dev}p$root_part rootfstype=ext4 " \
+			"console=$defaultconsole,115200 rootwait loglevel=4 ti_cpsw.rx_packet_max=1526\0" \
+	"add_version_bootargs=setenv bootargs $bootargs\0" \
+	"sdbringup=echo Try bringup boot && ext4load mmc 1:$root_part $kernel_addr /boot/zImage && " \
+			"ext4load mmc 1:$root_part $fdt_addr /boot/$fdt_image && setenv bootargs $bootargs rw;\0" \
+	"sdprod=ext4load mmc 1:$root_part $kernel_addr /boot/$kernel_image && " \
+			"ext4load mmc 1:$root_part $fdt_addr /boot/$fdt_image && setenv bootargs $bootargs ro;\0" \
+	"sdboot=env set fdt_addr " FDT_ADDR_R "; "\
+			"if mmc dev 1; then echo Copying Linux from SD to RAM...; "\
+			"if test -e mmc 1:$root_part /boot/$kernel_image; then run sdprod; " \
+			"else run sdbringup; fi; " \
+			/* For v4.19 kernel $mmc_dev should be "mmcblk1" (read from DT), for v3.18 kernel: "mmcblk0" */ \
+			"fdt addr $fdt_addr;if fdt get value mmc_dev /nm_env nm,mmc-dev;then;else setenv mmc_dev mmcblk0;fi;" \
+			"run add_sd_bootargs; run add_version_bootargs; " \
+			"bootz $kernel_addr - $fdt_addr; fi\0" \
+	\
+	/* Boot command */ \
+	"bootcmd=" MAIN_BOOTCMD "\0" \
+	\
+	/* Recovery boot (same for OSTree and NRSW) */ \
 	"recovery=run pxe_recovery || setenv ipaddr $ipaddr; setenv serverip $serverip; run tftp_recovery\0" \
-			/* setenv ipaddr and serverip is necessary, because dhclient can destroy the IPs internally */
+	/* setenv ipaddr and serverip is necessary, because dhclient destroys the IPs internally */ \
+	"pxe_recovery=mdio up $ethprime && dhcp && pxe get && pxe boot\0" \
+	"tftp_recovery=tftpboot $kernel_addr_r recovery-image; tftpboot $fdt_addr_r recovery-dtb; " \
+			"setenv bootargs rdinit=/etc/preinit console=$defaultconsole,115200 " \
+			"debug $ethopts; " \
+			"bootz $kernel_addr_r - $fdt_addr_r\0" /* kernel_addr_r */
+
 #endif
 
 #define CONFIG_ZERO_BOOTDELAY_CHECK
@@ -131,6 +178,9 @@ int eth_phy_timeout(void);
 #define CONFIG_SYS_NS16550_COM2			0x48022000	/* UART1: Unused, see note below */
 #define CONFIG_SYS_NS16550_COM3			0x48024000	/* UART2: eMMC Boot, User UART */
 /* NOTE: NS16550 definitions are cumulative, need to set COM2 to have COM3 */
+#define CONFIG_SYS_NS16550_COM4			0x481A6000	/* UART3: xxx */
+#define CONFIG_SYS_NS16550_COM5			0x481A8000	/* UART4: yyy */
+#define CONFIG_SYS_NS16550_COM6			0x481AA000	/* UART5: zzz */
 
 #define CONFIG_I2C
 #define CONFIG_I2C_MULTI_BUS
@@ -219,6 +269,9 @@ int eth_phy_timeout(void);
 #endif
 
 /* Network. */
+#define CONFIG_IP_DEFRAG		/* so we can use large tftp blocks */
+#define CONFIG_TFTP_TSIZE		/* tftp transfer size, progress bar */
+
 #define CONFIG_PHYLIB
 #define CONFIG_PHY_SMSC
 
@@ -226,6 +279,18 @@ int eth_phy_timeout(void);
 #define CONFIG_SYS_MEMTEST_START    0x84000000
 #define CONFIG_SYS_MEMTEST_END      0x87900000
 
+
+#ifdef CONFIG_NRSW_BUILD
+/* support for NM packed bootloader */
+#define CONFIG_NM_BOOTLOADER_FORMAT
+
+/* password protected login */
+#define CONFIG_CRYPT
+#define CONFIG_NM_LOGIN
+#define CONFIG_NM_LOGIN_PART	"1:3"	/* TODO: Define location of file for OSTree/Yocto */
+#define CONFIG_NM_LOGIN_PASSWD	"/root/boot/bootpass"
+#endif
+
 #define CONFIG_CMD_PXE
 
 #define CONFIG_OF_BOARD_SETUP
@@ -233,6 +298,10 @@ int eth_phy_timeout(void);
 #define CONFIG_JTAG_MARKER_SPL		0x402FFF00
 #define CONFIG_JTAG_MARKER_UBOOT	0x807FFF00
 
+/* Reset and Start Reason */
+#define RESET_REASON_SHM_LOCATION	0x8e000000
+
+
 /* SPL command is not needed */
 #undef CONFIG_CMD_SPL
 

include/configs/am335x_nrhw20.h

@@ -1,7 +1,7 @@
 /*
  * am335x_nrhw20.h
  *
- * Copyright (C) 2018 NetModule AG - http://www.netmodule.com/
+ * Copyright (C) 2018-2019 NetModule AG - http://www.netmodule.com/
  * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
  *
  * This program is free software; you can redistribute it and/or
@@ -19,6 +19,11 @@
 
 #include <configs/ti_am335x_common.h>
 
+/* Disable U-Boot load from filesystems, to save around 10 kB SPL image size */
+#ifdef CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
+# undef CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
+#endif
+
 #undef CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC
 
 #undef CONFIG_HW_WATCHDOG
@@ -36,81 +41,157 @@
 #define CONFIG_MACH_TYPE		MACH_TYPE_TIAM335EVM
 #define CONFIG_BOARD_LATE_INIT
 
+/* TODO: It could be preconsole buffer is not properly working in SPL
+ * Observed lock ups when printing too much text.
+#define CONFIG_PRE_CONSOLE_BUFFER
+#define CONFIG_PRE_CON_BUF_ADDR   	0x80000000
+#define CONFIG_PRE_CON_BUF_SZ     	64*1024
+*/
+
 /* Clock Defines */
 #define V_OSCK				0 /* 0 means detect from sysboot1 config */
 #define V_SCLK				(V_OSCK)
 
 #include <config_distro_bootcmd.h>
 
+/* Dynamic override for PHY_ANEG_TIMEOUT value */
+#if 0 /* TODO */
+#ifndef CONFIG_SPL_BUILD
+# ifndef __ASSEMBLER__
+int eth_phy_timeout(void);
+# endif
+#endif
+#define PHY_ANEG_TIMEOUT		eth_phy_timeout()
+#endif
+#define PHY_ANEG_DEFAULT_TIMEOUT	5000
+
 #define CONFIG_ARP_TIMEOUT		200
 #undef CONFIG_NET_RETRY_COUNT
 #define CONFIG_NET_RETRY_COUNT		5
 #define CONFIG_BOOTP_MAY_FAIL
 
 #ifndef CONFIG_SPL_BUILD
-#define KERNEL_ADDR			"0x80000000"
-#define LOAD_ADDR			"0x83000000"
-#define FDT_ADDR			"0x82000000"
-#define PXE_ADDR			"0x82800000"
-#define FDT_HIGH_ADDR			"0x87000000"
-#define INIT_RD_ADDR			"0x88000000"
+
+/*
+ * Memory map for booting Linux
+ *
+ * 0x80000000   32MB	KERNEL_ADDR (kernel_addr), kernel execution address
+ * 0x82000000  190MB    KERNEL_ADDR_R (kernel_addr_r), FIT image/kernel loading address
+ * 			 kernel will be relocated kernel_addr
+ *                       for FIT images, ramdisc and dtb will be relocated to 
+ *                       top of bootmemory (0x8e000000 downwards)
+ * 0x8BE00000    1MB	FDT_ADDR_R (fdt_addr_r), device tree if separate from kernel/FIT
+ * 0x8BF00000	 1MB	PXE_ADDR (pxefile_addr_r), pxe configuration file (pxe get command)
+ * 0x8C000000   32MB	LOAD_ADDR (load_addr), loading address for generic files
+ * <end of boot memory>
+ * 0x8E000000    4B     NRSW reset reason
+ *              32MB    <>, Free space
+ * 0x90000000  256MB	<>, Free space, 512MB systems
+ * 0xA0000000  512MB	<>, Free space, 1GB systems only
+ * 0xC0000000		End of RAM
+ */
+
+#define KERNEL_ADDR	"0x80000000"
+#define KERNEL_ADDR_R	"0x82000000"
+#define FDT_ADDR_R	"0x8BE00000"
+#define PXE_ADDR	"0x8BF00000"
+#define LOAD_ADDR	"0x8C000000"
+
+/*
+ * Limit boot memory to 256 MBytes to comply with kernel initial memory layout
+ * This is the official way to restrict image load addresses. 
+ * Don't use xx_high_addr variables.
+ */
+#define BOOTM_SIZE      "0x0E000000"	
+
+/* Set boot command depending of software environment */
+#ifndef CONFIG_NRSW_BUILD
+/* Yocto/OSTree boot command */
+#define MAIN_BOOTCMD "run boot_ostree"
+#else
+/* NRSW boot command */
+#define MAIN_BOOTCMD "run sdboot"
+#endif
 
 #define CONFIG_EXTRA_ENV_SETTINGS \
-	"kernel_image=kernel.bin\0"	\
-	"fdt_image=openwrt-nrhw20-nb1601.dtb\0"\
-	"modeboot=sdboot\0" \
-	"fdt_addr=" FDT_ADDR "\0" \
-	"kernel_addr=" KERNEL_ADDR "\0" \
+	/* Memory Adresses */ \
+	"fdt_addr_r=" FDT_ADDR_R "\0" \
+	"kernel_addr=" KERNEL_ADDR "\0" /* NRSW only */ \
+	"kernel_addr_r=" KERNEL_ADDR_R  "\0" \
 	"load_addr=" LOAD_ADDR "\0" \
-	"root_part=1\0" /* Default root partition, overwritten in board file */ \
-	"defaultconsole=ttyS1\0" /* Default output console */ \
-	"add_sd_bootargs=setenv bootargs $bootargs root=/dev/mmcblk1p$root_part rootfstype=ext4 " \
+	"pxefile_addr_r=" PXE_ADDR "\0" \
+	"bootm_size=" BOOTM_SIZE "\0" \
+	\
+	/* Misc */ \
+	"defaultconsole=ttyS1\0" \
+	"fdt_skip_update=yes\0" \
+	"bootdelay=0\0" \
+	\
+	/* Networking */ \
+	"ethprime=cpsw\0" \
+	"ethopts=ti_cpsw.rx_packet_max=1526\0" \
+	"ipaddr=192.168.1.1\0" \
+	"serverip=192.168.1.254\0" \
+	"tftptimeout=2000\0" \
+	"tftptimeoutcountmax=5\0" \
+	"bootpretryperiod=10000\0" /* 2000 */ \
+	"autoload=false\0" \
+	\
+	/* OSTree boot */ \
+	"bootcmd_otenv=ext4load mmc 1:1 $load_addr /boot/loader/uEnv.txt; " \
+			"setenv bootargs_prev $bootargs; " \
+			"env import -t $load_addr $filesize; setenv bootargs $bootargs_prev $bootargs root=/dev/ram0 console=$defaultconsole,115200 " \
+			"$ethopts rw ostree_root=/dev/mmcblk1p1\0" \
+	"bootcmd_rd_in_mmc=ext4load mmc 1:1 $kernel_addr_r /boot$kernel_image; " \
+			"bootm $kernel_addr_r\0" \
+	"boot_ostree=run shieldcmd; run bootcmd_otenv; run bootcmd_rd_in_mmc\0" \
+	\
+	/* NRSW boot */ \
+	"root_part=1\0" /* from NRSW, required here? set from board.c */ \
+	"kernel_image=kernel.bin\0" \
+	"fdt_image=am335x-nmhw24-prod1.dtb\0" /* diff, openwrt-nrhw24-nb801.dtb, not relevant as it will be overwritten */ \
+	"add_sd_bootargs=setenv bootargs $bootargs root=/dev/${mmc_dev}p$root_part rootfstype=ext4 " \
 			"console=$defaultconsole,115200 rootwait loglevel=4 ti_cpsw.rx_packet_max=1526\0" \
 	"add_version_bootargs=setenv bootargs $bootargs\0" \
-	"fdt_skip_update=yes\0" \
-	"ethprime=cpsw\0" \
 	"sdbringup=echo Try bringup boot && ext4load mmc 1:$root_part $kernel_addr /boot/zImage && " \
 			"ext4load mmc 1:$root_part $fdt_addr /boot/$fdt_image && setenv bootargs $bootargs rw;\0" \
 	"sdprod=ext4load mmc 1:$root_part $kernel_addr /boot/$kernel_image && " \
 			"ext4load mmc 1:$root_part $fdt_addr /boot/$fdt_image && setenv bootargs $bootargs ro;\0" \
-	"sdboot=if mmc dev 1; then echo Copying Linux from SD to RAM...; "\
+	"sdboot=env set fdt_addr " FDT_ADDR_R "; "\
+			"if mmc dev 1; then echo Copying Linux from SD to RAM...; "\
 			"if test -e mmc 1:$root_part /boot/$kernel_image; then run sdprod; " \
 			"else run sdbringup; fi; " \
+			/* For v4.19 kernel $mmc_dev should be "mmcblk1" (read from DT), for v3.18 kernel: "mmcblk0" */ \
+			"fdt addr $fdt_addr;if fdt get value mmc_dev /nm_env nm,mmc-dev;then;else setenv mmc_dev mmcblk0;fi;" \
 			"run add_sd_bootargs; run add_version_bootargs; run shieldcmd; " \
 			"bootz $kernel_addr - $fdt_addr; fi\0" \
-	"bootcmd_otenv=ext4load mmc 1:1 $load_addr /boot/loader/uEnv.txt; " \
-			"env import -t $load_addr $filesize; " \
-			"setenv bootargs $bootargs root=/dev/ram0 console=$defaultconsole,115200 " \
-			"$ethopts rw ostree_root=/dev/mmcblk1p1\0" \
-	"bootcmd_rd_in_mmc=ext4load mmc 1:1 $kernel_addr_r /boot$kernel_image; " \
-			"bootm $kernel_addr_r\0" \
-	"bootcmd=run bootcmd_otenv; run bootcmd_rd_in_mmc\0" \
-	"ipaddr=192.168.1.1\0" \
-	"serverip=192.168.1.254\0" \
-	"pxefile_addr_r=" PXE_ADDR "\0" \
-	"fdt_addr_r=" FDT_ADDR "\0" \
-	"fdt_high=" FDT_HIGH_ADDR "\0" \
-	"kernel_addr_r=" KERNEL_ADDR "\0" \
-	"ramdisk_addr_r=" LOAD_ADDR "\0" \
-	"initrd_high=" INIT_RD_ADDR "\0" \
-	"bootpretryperiod=1000\0" \
-	"tftptimeout=2000\0" \
-	"tftptimeoutcountmax=5\0" \
-	"bootpretryperiod=2000\0" \
-	"autoload=false\0" \
-	"shieldcmd=\0" \
-	"tftp_recovery=tftpboot $kernel_addr recovery-image; tftpboot $fdt_addr recovery-dtb; " \
-			"setenv bootargs rdinit=/etc/preinit console=$defaultconsole,115200 " \
-			"debug ti_cpsw.rx_packet_max=1526; run shieldcmd; " \
-			"bootz $kernel_addr - $fdt_addr\0" \
-	"pxe_recovery=sleep 3 && dhcp && pxe get && pxe boot\0" \
+	\
+	/* Boot command */ \
+	"bootcmd=" MAIN_BOOTCMD "\0" \
+	\
+	/* Recovery boot (same for OSTree and NRSW) */ \
 	"recovery=run pxe_recovery || setenv ipaddr $ipaddr; setenv serverip $serverip; run tftp_recovery\0" \
-			/* setenv ipaddr and serverip is necessary, because dhclient can destroy the IPs inernally */
+	/* setenv ipaddr and serverip is necessary, because dhclient destroys the IPs internally */ \
+	"pxe_recovery=mdio up $ethprime && dhcp && pxe get && pxe boot\0" \
+	"tftp_recovery=tftpboot $kernel_addr_r recovery-image; tftpboot $fdt_addr_r recovery-dtb; " \
+			"setenv bootargs rdinit=/etc/preinit console=$defaultconsole,115200 " \
+			"debug $ethopts; " \
+			"bootz $kernel_addr_r - $fdt_addr_r\0" /* kernel_addr_r */
+
 #endif
 
+
+/* TODO: Check if ok for NRSW? */
+#define CONFIG_ZERO_BOOTDELAY_CHECK
+
 /* UART Configuration */
 #define CONFIG_SYS_NS16550_COM1			0x44e09000	/* UART0: XModem Boot, Shield */
 #define CONFIG_SYS_NS16550_COM2			0x48022000	/* UART1: eMMC Boot, User UART */
+/* TODO: Can the following be removed, as they shouldn't be required for bootloader */
+#define CONFIG_SYS_NS16550_COM3			0x48024000	/* Unused */
+#define CONFIG_SYS_NS16550_COM4			0x481A6000	/* GNSS */
+#define CONFIG_SYS_NS16550_COM5			0x481A8000	/* Unused */
+#define CONFIG_SYS_NS16550_COM6			0x481AA000	/* Bluetooth */
 
 #define CONFIG_I2C
 #define CONFIG_I2C_MULTI_BUS
@@ -136,13 +217,6 @@
 #define CONFIG_ENV_IS_IN_MMC
 #define CONFIG_SYS_MMC_ENV_DEV			1
 
-#if 0
-#define CONFIG_SYS_MMC_ENV_PART			2
-#define CONFIG_ENV_OFFSET_REDUND		(CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
-#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
-#endif
-
-
 #undef CONFIG_SPL_ENV_SUPPORT
 #undef CONFIG_SPL_NAND_SUPPORT
 #undef CONFIG_SPL_ONENAND_SUPPORT
@@ -152,7 +226,6 @@
 #undef CONFIG_SPI_BOOT
 #undef CONFIG_SPL_OS_BOOT
 
-#define CONFIG_SPL_POWER_SUPPORT	/* TODO: Check */
 #define CONFIG_SPL_YMODEM_SUPPORT
 
 #define CONFIG_SPL_LDSCRIPT		"$(CPUDIR)/am33xx/u-boot-spl.lds"
@@ -173,14 +246,6 @@
 #define CONFIG_AM335X_USB0
 #define CONFIG_AM335X_USB0_MODE		MUSB_HOST
 
-/* Fastboot */
-#define CONFIG_USB_FUNCTION_FASTBOOT
-#define CONFIG_CMD_FASTBOOT
-#define CONFIG_ANDROID_BOOT_IMAGE
-#define CONFIG_FASTBOOT_BUF_ADDR	CONFIG_SYS_LOAD_ADDR
-#define CONFIG_FASTBOOT_BUF_SIZE	0x07000000
-/* TODO: Check */
-
 /* To support eMMC booting */
 #define CONFIG_STORAGE_EMMC
 #define CONFIG_FASTBOOT_FLASH_MMC_DEV   1
@@ -217,6 +282,9 @@
 #endif
 
 /* Network. */
+#define CONFIG_IP_DEFRAG		/* so we can use large tftp blocks */
+#define CONFIG_TFTP_TSIZE		/* tftp transfer size, progress bar */
+
 #define CONFIG_PHYLIB
 
 /* Ethernet Switch Support */
@@ -225,26 +293,40 @@
 #define CONFIG_MV88E60XX_CPU_PORT	5
 
 
-#define CONFIG_SYS_MEMTEST_START    0x80000000
+#define CONFIG_CMD_MEMTEST
+#define CONFIG_SYS_MEMTEST_START    0x84000000
 #define CONFIG_SYS_MEMTEST_END      0x87900000
 
-#if 0
-#define CONFIG_POWER
-#define CONFIG_POWER_I2C
-#define CONFIG_POWER_DA9063	/* TODO: Provide driver */
+
+#ifdef CONFIG_NRSW_BUILD
+/* support for NM packed bootloader */
+#define CONFIG_NM_BOOTLOADER_FORMAT
+
+/* password protected login */
+#define CONFIG_CRYPT
+#define CONFIG_NM_LOGIN
+#define CONFIG_NM_LOGIN_PART	"1:3"	/* TODO: Define location of file for OSTree/Yocto */
+#define CONFIG_NM_LOGIN_PASSWD	"/root/boot/bootpass"
 #endif
 
 #define CONFIG_CMD_PXE
 
 #define CONFIG_OF_BOARD_SETUP
 
+#define CONFIG_JTAG_MARKER_SPL		0x402FFF00
+#define CONFIG_JTAG_MARKER_UBOOT	0x807FFF00
+
+/* NRSW PMIC Reset Reason */
+#ifdef CONFIG_NRSW_BUILD
+#define RESET_REASON_SHM_LOCATION	0x8e000000
+#define EXTERNAL_WATCHDOG_PATTERN	0x781f9ce2
+#endif
+
+
 /* SPL command is not needed */
 #undef CONFIG_CMD_SPL
 
 /* Never enable ISO it is broken and can lead to a crash */
 #undef CONFIG_ISO_PARTITION
 
-
-
-
 #endif	/* ! __CONFIG_AM335X_NRHW20_H */

include/configs/am335x_nrhw24.h

@@ -0,0 +1,313 @@
+/*
+ * am335x_nrhw24.h
+ *
+ * Copyright (C) 2018-2019 NetModule AG - http://www.netmodule.com/
+ * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __CONFIG_AM335X_NRHW24_H
+#define __CONFIG_AM335X_NRHW24_H
+
+#include <configs/ti_am335x_common.h>
+
+/* Disable U-Boot load from filesystems, to save around 10 kB SPL image size */
+#ifdef CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
+# undef CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
+#endif
+
+#undef CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC
+
+#undef CONFIG_HW_WATCHDOG
+#undef CONFIG_OMPAP_WATCHDOG
+#undef CONFIG_SPL_WATCHDOG_SUPPORT
+
+#ifndef CONFIG_SPL_BUILD
+# define CONFIG_TIMESTAMP
+# define CONFIG_LZO
+#endif
+
+#define CONFIG_SYS_BOOTM_LEN		(16 << 20)
+
+#define MACH_TYPE_TIAM335EVM		3589	/* Until the next sync */
+#define CONFIG_MACH_TYPE		MACH_TYPE_TIAM335EVM
+#define CONFIG_BOARD_LATE_INIT
+
+/* TODO: It could be preconsole buffer is not properly working in SPL
+ * Observed lock ups when printing too much text.
+#define CONFIG_PRE_CONSOLE_BUFFER
+#define CONFIG_PRE_CON_BUF_ADDR   	0x80000000
+#define CONFIG_PRE_CON_BUF_SZ     	64*1024
+*/
+
+/* Clock Defines */
+#define V_OSCK				0 /* 0 means detect from sysboot1 config */
+#define V_SCLK				(V_OSCK)
+
+#include <config_distro_bootcmd.h>
+
+/* Dynamic override for PHY_ANEG_TIMEOUT value */
+#ifndef CONFIG_SPL_BUILD
+# ifndef __ASSEMBLER__
+int eth_phy_timeout(void);
+# endif
+#endif
+#define PHY_ANEG_TIMEOUT		eth_phy_timeout()
+#define PHY_ANEG_DEFAULT_TIMEOUT	5000
+
+#define CONFIG_ARP_TIMEOUT		200
+#undef CONFIG_NET_RETRY_COUNT
+#define CONFIG_NET_RETRY_COUNT		5
+#define CONFIG_BOOTP_MAY_FAIL
+
+#ifndef CONFIG_SPL_BUILD
+
+/*
+ * Memory map for booting Linux
+ *
+ * 0x80000000   32MB	KERNEL_ADDR (kernel_addr), kernel execution address
+ * 0x82000000  190MB    KERNEL_ADDR_R (kernel_addr_r), FIT image/kernel loading address
+ * 			 kernel will be relocated kernel_addr
+ *                       for FIT images, ramdisc and dtb will be relocated to 
+ *                       top of bootmemory (0x8e000000 downwards)
+ * 0x8BE00000    1MB	FDT_ADDR_R (fdt_addr_r), device tree if separate from kernel/FIT
+ * 0x8BF00000	 1MB	PXE_ADDR (pxefile_addr_r), pxe configuration file (pxe get command)
+ * 0x8C000000   32MB	LOAD_ADDR (load_addr), loading address for generic files
+ * <end of boot memory>
+ * 0x8E000000    4B     NRSW reset reason
+ *              32MB    <>, Free space
+ * 0x90000000  256MB	<>, Free space, 512MB systems
+ * 0xA0000000  512MB	<>, Free space, 1GB systems only
+ * 0xC0000000		End of RAM
+ */
+
+#define KERNEL_ADDR	"0x80000000"
+#define KERNEL_ADDR_R	"0x82000000"
+#define FDT_ADDR_R	"0x8BE00000"
+#define PXE_ADDR	"0x8BF00000"
+#define LOAD_ADDR	"0x8C000000"
+
+/*
+ * Limit boot memory to 256 MBytes to comply with kernel initial memory layout
+ * This is the official way to restrict image load addresses. 
+ * Don't use xx_high_addr variables.
+ */
+#define BOOTM_SIZE      "0x0E000000"	
+
+/* Set boot command depending of software environment */
+#ifndef CONFIG_NRSW_BUILD
+/* Yocto/OSTree boot command */
+#define MAIN_BOOTCMD "run boot_ostree"
+#else
+/* NRSW boot command */
+#define MAIN_BOOTCMD "run sdboot"
+#endif
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	/* Memory Adresses */ \
+	"fdt_addr_r=" FDT_ADDR_R "\0" \
+	"kernel_addr=" KERNEL_ADDR "\0" /* NRSW only */ \
+	"kernel_addr_r=" KERNEL_ADDR_R  "\0" \
+	"load_addr=" LOAD_ADDR "\0" \
+	"pxefile_addr_r=" PXE_ADDR "\0" \
+	"bootm_size=" BOOTM_SIZE "\0" \
+	\
+	/* Misc */ \
+	"defaultconsole=ttyS1\0" \
+	"fdt_skip_update=yes\0" \
+	"bootdelay=0\0" \
+	\
+	/* Networking */ \
+	"ethprime=cpsw\0" \
+	"ethopts=ti_cpsw.rx_packet_max=1526\0" \
+	"ipaddr=192.168.1.1\0" \
+	"serverip=192.168.1.254\0" \
+	"tftptimeout=2000\0" \
+	"tftptimeoutcountmax=5\0" \
+	"bootpretryperiod=10000\0" /* 2000 */ \
+	"autoload=false\0" \
+	\
+	/* OSTree boot */ \
+	"bootcmd_otenv=ext4load mmc 1:1 $load_addr /boot/loader/uEnv.txt; " \
+			"setenv bootargs_prev $bootargs; " \
+			"env import -t $load_addr $filesize; setenv bootargs $bootargs_prev $bootargs root=/dev/ram0 console=$defaultconsole,115200 " \
+			"$ethopts rw ostree_root=/dev/mmcblk1p1\0" \
+	"bootcmd_rd_in_mmc=ext4load mmc 1:1 $kernel_addr_r /boot$kernel_image; " \
+			"bootm $kernel_addr_r\0" \
+	"boot_ostree=run shieldcmd; run bootcmd_otenv; run bootcmd_rd_in_mmc\0" \
+	\
+	/* NRSW boot */ \
+	"root_part=1\0" /* from NRSW, required here? set from board.c */ \
+	"kernel_image=kernel.bin\0" \
+	"fdt_image=am335x-nmhw24-prod1.dtb\0" /* diff, openwrt-nrhw24-nb801.dtb, not relevant as it will be overwritten */ \
+	"add_sd_bootargs=setenv bootargs $bootargs root=/dev/${mmc_dev}p$root_part rootfstype=ext4 " \
+			"console=$defaultconsole,115200 rootwait loglevel=4 ti_cpsw.rx_packet_max=1526\0" \
+	"add_version_bootargs=setenv bootargs $bootargs\0" \
+	"sdbringup=echo Try bringup boot && ext4load mmc 1:$root_part $kernel_addr /boot/zImage && " \
+			"ext4load mmc 1:$root_part $fdt_addr /boot/$fdt_image && setenv bootargs $bootargs rw;\0" \
+	"sdprod=ext4load mmc 1:$root_part $kernel_addr /boot/$kernel_image && " \
+			"ext4load mmc 1:$root_part $fdt_addr /boot/$fdt_image && setenv bootargs $bootargs ro;\0" \
+	"sdboot=env set fdt_addr " FDT_ADDR_R "; "\
+			"if mmc dev 1; then echo Copying Linux from SD to RAM...; "\
+			"if test -e mmc 1:$root_part /boot/$kernel_image; then run sdprod; " \
+			"else run sdbringup; fi; " \
+			/* For v4.19 kernel $mmc_dev should be "mmcblk1" (read from DT), for v3.18 kernel: "mmcblk0" */ \
+			"fdt addr $fdt_addr;if fdt get value mmc_dev /nm_env nm,mmc-dev;then;else setenv mmc_dev mmcblk0;fi;" \
+			"run add_sd_bootargs; run add_version_bootargs; run shieldcmd; " \
+			"bootz $kernel_addr - $fdt_addr; fi\0" \
+	\
+	/* Boot command */ \
+	"bootcmd=" MAIN_BOOTCMD "\0" \
+	\
+	/* Recovery boot (same for OSTree and NRSW) */ \
+	"recovery=run pxe_recovery || setenv ipaddr $ipaddr; setenv serverip $serverip; run tftp_recovery\0" \
+	/* setenv ipaddr and serverip is necessary, because dhclient destroys the IPs internally */ \
+	"pxe_recovery=mdio up $ethprime && dhcp && pxe get && pxe boot\0" \
+	"tftp_recovery=tftpboot $kernel_addr_r recovery-image; tftpboot $fdt_addr_r recovery-dtb; " \
+			"setenv bootargs rdinit=/etc/preinit console=$defaultconsole,115200 " \
+			"debug $ethopts; " \
+			"run shieldcmd; " \
+			"bootz $kernel_addr_r - $fdt_addr_r\0" /* kernel_addr_r */
+
+#endif
+
+
+/* TODO: Check if ok for NRSW? */
+#define CONFIG_ZERO_BOOTDELAY_CHECK
+
+/* UART Configuration */
+#define CONFIG_SYS_NS16550_COM1			0x44e09000	/* UART0: XModem Boot, Shield */
+#define CONFIG_SYS_NS16550_COM2			0x48022000	/* UART1: Debug UART (Internal) */
+
+#define CONFIG_I2C
+#define CONFIG_I2C_MULTI_BUS
+
+#define CONFIG_CMD_EEPROM
+#define CONFIG_SYS_I2C_EEPROM_ADDR              0x50	/* Main EEPROM */
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN          2
+#define CONFIG_SYS_I2C_SPEED                    100000
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS       4
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   50	/* TODO: Can this be reduced to 20ms */
+
+/* Put Environment in eMMC */
+#define CONFIG_ENV_OFFSET			(512 * 128)	/* @ 512*256 SPL starts */
+#define CONFIG_ENV_SIZE				(4 * 1024)
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_SYS_MMC_ENV_DEV			1
+
+#undef CONFIG_SPL_ENV_SUPPORT
+#undef CONFIG_SPL_NAND_SUPPORT
+#undef CONFIG_SPL_ONENAND_SUPPORT
+
+/* We need to disable SPI to not confuse the eeprom env driver */
+#undef CONFIG_SPI
+#undef CONFIG_SPI_BOOT
+#undef CONFIG_SPL_OS_BOOT
+
+#define CONFIG_SPL_YMODEM_SUPPORT
+
+#define CONFIG_SPL_LDSCRIPT		"$(CPUDIR)/am33xx/u-boot-spl.lds"
+
+#define CONFIG_SUPPORT_EMMC_BOOT
+
+/*
+ * USB configuration.  We enable MUSB support, both for host and for
+ * gadget.  We set USB0 as peripheral and USB1 as host, based on the
+ * board schematic and physical port wired to each.  Then for host we
+ * add mass storage support and for gadget we add both RNDIS ethernet
+ * and DFU.
+ */
+#define CONFIG_USB_MUSB_DSPS
+#define CONFIG_ARCH_MISC_INIT
+#define CONFIG_USB_MUSB_PIO_ONLY
+#define CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT
+#define CONFIG_AM335X_USB0
+#define CONFIG_AM335X_USB0_MODE		MUSB_HOST
+
+/* To support eMMC booting */
+#define CONFIG_STORAGE_EMMC
+#define CONFIG_FASTBOOT_FLASH_MMC_DEV   1
+
+#ifdef CONFIG_USB_MUSB_HOST
+#define CONFIG_USB_STORAGE
+#endif
+
+#ifdef CONFIG_USB_MUSB_GADGET
+/* Removing USB gadget and can be enabled adter adding support usb DM */
+#ifndef CONFIG_DM_ETH
+#define CONFIG_USB_ETHER
+#define CONFIG_USB_ETH_RNDIS
+#define CONFIG_USBNET_HOST_ADDR	"de:ad:be:af:00:00"
+#endif /* CONFIG_DM_ETH */
+#endif /* CONFIG_USB_MUSB_GADGET */
+
+
+/*
+ * Disable MMC DM for SPL build and can be re-enabled after adding
+ * DM support in SPL
+ */
+#ifdef CONFIG_SPL_BUILD
+#undef CONFIG_DM_MMC
+#undef CONFIG_TIMER
+#endif
+
+#if defined(CONFIG_SPL_BUILD)
+/* Remove other SPL modes. */
+#undef CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_ENV_IS_NOWHERE
+#undef CONFIG_PARTITION_UUIDS
+#undef CONFIG_EFI_PARTITION
+#endif
+
+/* Network. */
+#define CONFIG_IP_DEFRAG		/* so we can use large tftp blocks */
+#define CONFIG_TFTP_TSIZE		/* tftp transfer size, progress bar */
+
+#define CONFIG_PHYLIB
+#define CONFIG_PHY_SMSC
+
+#define CONFIG_CMD_MEMTEST
+#define CONFIG_SYS_MEMTEST_START    0x84000000
+#define CONFIG_SYS_MEMTEST_END      0x87900000
+
+
+#ifdef CONFIG_NRSW_BUILD
+/* support for NM packed bootloader */
+#define CONFIG_NM_BOOTLOADER_FORMAT
+
+/* password protected login */
+#define CONFIG_CRYPT
+#define CONFIG_NM_LOGIN
+#define CONFIG_NM_LOGIN_PART	"1:3"	/* TODO: Define location of file for OSTree/Yocto */
+#define CONFIG_NM_LOGIN_PASSWD	"/root/boot/bootpass"
+#endif
+
+#define CONFIG_CMD_PXE
+
+#define CONFIG_OF_BOARD_SETUP
+
+#define CONFIG_JTAG_MARKER_SPL		0x402FFF00
+#define CONFIG_JTAG_MARKER_UBOOT	0x807FFF00
+
+/* NRSW PMIC Reset Reason */
+#ifdef CONFIG_NRSW_BUILD
+#define RESET_REASON_SHM_LOCATION	0x8e000000
+#define EXTERNAL_WATCHDOG_PATTERN	0x781f9ce2
+#endif
+
+
+/* SPL command is not needed */
+#undef CONFIG_CMD_SPL
+
+/* Never enable ISO it is broken and can lead to a crash */
+#undef CONFIG_ISO_PARTITION
+
+#endif	/* ! __CONFIG_AM335X_NRHW24_H */

include/configs/ti_armv7_common.h

@@ -220,6 +220,7 @@
 
 /* RAW SD card / eMMC locations. */
 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300 /* address 0x60000 */
+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR_ALTERNATE 0x1b00 /* address 0x360000  */
 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	0x200 /* 256 KB */
 
 /* FAT sd card locations. */

include/crypt.h

@@ -0,0 +1,6 @@
+#ifndef _CRYPT_H
+#define _CRYPT_H
+
+extern char * sha_crypt(const char *key, const char *salt);
+
+#endif /* _CRYPT_H */

include/image.h

@@ -286,6 +286,14 @@ typedef struct image_header {
 	uint8_t		ih_name[IH_NMLEN];	/* Image Name		*/
 } image_header_t;
 
+typedef struct nm_header {
+	__be32		nm_start_tag;	/* BLST (0x424c5354) */
+	__be32		nm_version;	/* U-boot version number */
+	__be32		nm_length;	/* U-boot image length */
+	uint8_t		reserved[244];	/* Reserved */
+	struct image_header header;
+} nm_header_t;
+
 typedef struct image_info {
 	ulong		start, end;		/* start/end of blob */
 	ulong		image_start, image_len; /* start of image within blob, len of image */

lib/Makefile

@@ -20,6 +20,7 @@ obj-$(CONFIG_CMD_DHRYSTONE) += dhry/
 
 obj-$(CONFIG_AES) += aes.o
 obj-$(CONFIG_USB_TTY) += circbuf.o
+obj-$(CONFIG_CRYPT) += crypt.o
 obj-y += crc7.o
 obj-y += crc8.o
 obj-y += crc16.o

lib/crypt.c

@@ -0,0 +1,371 @@
+/*
+ * The crypt source code was ported from busybox sources pw_crypt, file
+ * libbb/pw_encrypt_sha.c
+ *
+ * 20191108rs: Update to Busybox commit 49ecee0 (Jan 24, 2017)
+ *             Major cleanup, provide missing functions
+ */
+
+/* SHA256 and SHA512-based Unix crypt implementation.
+ * Released into the Public Domain by Ulrich Drepper <drepper@redhat.com>.
+ */
+
+#include <common.h>
+#include <u-boot/sha256.h>
+#include <malloc.h>
+#include <linux/types.h>
+
+/* Prefix for optional rounds specification.  */
+static const char str_rounds[] = "rounds=%u$";
+
+/* Maximum salt string length.  */
+#define SALT_LEN_MAX 16
+/* Default number of rounds if not explicitly specified.  */
+#define ROUNDS_DEFAULT 5000
+/* Minimum number of rounds.  */
+#define ROUNDS_MIN 1000
+/* Maximum number of rounds.  */
+#define ROUNDS_MAX 999999999
+
+
+/* Missing busybox functions */
+
+static char* to64(char *s, unsigned v, int n)
+{
+	static const uint8_t ascii64[] = "./0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz";
+
+	while (--n >= 0) {
+		*s++ = ascii64[v & 0x3f];
+		v >>= 6;
+	}
+	return s;
+}
+
+void* xzalloc(size_t size)
+{
+	void *ptr = malloc(size);
+	/* note: error check left out */
+
+	memset(ptr, 0, size);
+	return ptr;
+}
+
+static char *xstrdup(const char *s)
+{
+	size_t len = strlen (s) + 1;
+	char *ret = malloc (len);
+	/* note: error check left out */
+
+	memcpy (ret, s, len);
+	return ret;
+}
+
+#if 0 /* currently not required, see note below */
+static char *xstrndup(const char *s, size_t n)
+{
+	char *result;
+	size_t len = strlen (s);
+
+	if (n < len)
+		len = n;
+
+	printf("allocating %d bytes\n", len+1);
+
+	result = malloc (len + 1);
+	/* note: error check left out */
+
+	result[len] = '\0';
+	memcpy (result, s, len);
+	return (char *)result;
+}
+#endif
+
+static char *strchrnul(const char *s, int c)
+{
+	while (*s && *s != (char)c)
+		s++;
+	return (char *)s;
+}
+
+
+char *sha_crypt(/*const*/ char *key_data, /*const*/ char *salt_data)
+{
+	void (*sha_begin)(void *ctx);
+	void (*sha_hash)(void *ctx, const void *buffer, size_t len);
+	void (*sha_end)(void *ctx, void *resbuf);
+	int _32or64;
+
+	char *result, *resptr;
+
+	/* btw, sha256 needs [32] and uint32_t only */
+	struct {
+		unsigned char alt_result[64];
+		unsigned char temp_result[64];
+		union {
+			sha256_context x;
+/*			sha512_ctx_t y; */
+		} ctx;
+		union {
+			sha256_context x;
+/*			sha512_ctx_t y; */
+		} alt_ctx;
+	} L;
+#define alt_result  (L.alt_result )
+#define temp_result (L.temp_result)
+#define ctx         (L.ctx        )
+#define alt_ctx     (L.alt_ctx    )
+	unsigned salt_len;
+	unsigned key_len;
+	unsigned cnt;
+	unsigned rounds;
+	char *cp;
+
+	/* Analyze salt, construct already known part of result */
+	cnt = strlen(salt_data) + 1 + 43 + 1;
+	_32or64 = 32;
+	if (salt_data[1] == '6') { /* sha512 */
+		_32or64 *= 2; /*64*/
+		cnt += 43;
+		puts("SHA-512 is not supported");
+		return 0;
+	}
+	result = resptr = xzalloc(cnt); /* will provide NUL terminator */
+	*resptr++ = '$';
+	*resptr++ = salt_data[1];
+	*resptr++ = '$';
+	rounds = ROUNDS_DEFAULT;
+	salt_data += 3;
+	if (strncmp(salt_data, str_rounds, 7) == 0) {
+		/* 7 == strlen("rounds=") */
+		char *endp;
+		cnt = simple_strtoul(salt_data + 7, &endp, 10);
+		if (*endp == '$') {
+			salt_data = endp + 1;
+			rounds = cnt;
+			if (rounds < ROUNDS_MIN)
+				rounds = ROUNDS_MIN;
+			if (rounds > ROUNDS_MAX)
+				rounds = ROUNDS_MAX;
+			/* add "rounds=NNNNN$" to result */
+			resptr += sprintf(resptr, str_rounds, rounds);
+		}
+	}
+
+	salt_len = (int)strchrnul(salt_data, '$') - (int)salt_data;
+	if (salt_len > SALT_LEN_MAX)
+		salt_len = SALT_LEN_MAX;
+	/* xstrdup assures suitable alignment; also we will use it
+	   as a scratch space later. */
+
+	/* NOTE: Something is wrong here.
+	 * when <salt_len> bytes are reserved there is a problem later in 
+	 * the code and computations are incorrect.
+	 * So far it is not clear what the root problem is.
+	 * By not truncating the buffer the code works fine
+	 */
+/*	salt_data = xstrndup(salt_data, salt_len); */
+	salt_data = xstrdup(salt_data);
+	/* add "salt$" to result */
+	strcpy(resptr, salt_data);
+	resptr += salt_len;
+	*resptr++ = '$';
+	/* key data doesn't need much processing */
+	key_len = strlen(key_data);
+	key_data = xstrdup(key_data);
+
+	/* Which flavor of SHAnnn ops to use? */
+	sha_begin = (void*)sha256_starts;
+	sha_hash = (void*)sha256_update;
+	sha_end = (void*)sha256_finish;
+#if 0
+	/* SHA512 not supported */
+	if (_32or64 != 32) {
+		sha_begin = (void*)sha512_begin;
+		sha_hash = (void*)sha512_hash;
+		sha_end = (void*)sha512_end;
+	}
+#endif
+
+	/* Add KEY, SALT.  */
+	sha_begin(&ctx);
+	sha_hash(&ctx, key_data, key_len);
+	sha_hash(&ctx, salt_data, salt_len);
+
+	/* Compute alternate SHA sum with input KEY, SALT, and KEY.
+	   The final result will be added to the first context.  */
+	sha_begin(&alt_ctx);
+	sha_hash(&alt_ctx, key_data, key_len);
+	sha_hash(&alt_ctx, salt_data, salt_len);
+	sha_hash(&alt_ctx, key_data, key_len);
+	sha_end(&alt_ctx, alt_result);
+
+	/* Add result of this to the other context.  */
+	/* Add for any character in the key one byte of the alternate sum.  */
+	for (cnt = key_len; cnt > _32or64; cnt -= _32or64)
+		sha_hash(&ctx, alt_result, _32or64);
+	sha_hash(&ctx, alt_result, cnt);
+
+	/* Take the binary representation of the length of the key and for every
+	   1 add the alternate sum, for every 0 the key.  */
+	for (cnt = key_len; cnt != 0; cnt >>= 1)
+		if ((cnt & 1) != 0)
+			sha_hash(&ctx, alt_result, _32or64);
+		else
+			sha_hash(&ctx, key_data, key_len);
+
+	/* Create intermediate result.  */
+	sha_end(&ctx, alt_result);
+
+	/* Start computation of P byte sequence.  */
+	/* For every character in the password add the entire password.  */
+	sha_begin(&alt_ctx);
+	for (cnt = 0; cnt < key_len; ++cnt)
+		sha_hash(&alt_ctx, key_data, key_len);
+	sha_end(&alt_ctx, temp_result);
+
+	/* NB: past this point, raw key_data is not used anymore */
+
+	/* Create byte sequence P.  */
+#define p_bytes key_data /* reuse the buffer as it is of the key_len size */
+	cp = p_bytes; /* was: ... = alloca(key_len); */
+	for (cnt = key_len; cnt >= _32or64; cnt -= _32or64) {
+		cp = memcpy(cp, temp_result, _32or64);
+		cp += _32or64;
+	}
+	memcpy(cp, temp_result, cnt);
+
+	/* Start computation of S byte sequence.  */
+	/* For every character in the password add the entire password.  */
+	sha_begin(&alt_ctx);
+	for (cnt = 0; cnt < 16 + alt_result[0]; ++cnt)
+		sha_hash(&alt_ctx, salt_data, salt_len);
+	sha_end(&alt_ctx, temp_result);
+
+	/* NB: past this point, raw salt_data is not used anymore */
+
+	/* Create byte sequence S.  */
+#define s_bytes salt_data /* reuse the buffer as it is of the salt_len size */
+	cp = s_bytes; /* was: ... = alloca(salt_len); */
+	for (cnt = salt_len; cnt >= _32or64; cnt -= _32or64) {
+		cp = memcpy(cp, temp_result, _32or64);
+		cp += _32or64;
+	}
+	memcpy(cp, temp_result, cnt);
+
+	/* Repeatedly run the collected hash value through SHA to burn
+	   CPU cycles.  */
+	for (cnt = 0; cnt < rounds; ++cnt) {
+		sha_begin(&ctx);
+
+		/* Add key or last result.  */
+		if ((cnt & 1) != 0)
+			sha_hash(&ctx, p_bytes, key_len);
+		else
+			sha_hash(&ctx, alt_result, _32or64);
+		/* Add salt for numbers not divisible by 3.  */
+		if (cnt % 3 != 0)
+			sha_hash(&ctx, s_bytes, salt_len);
+		/* Add key for numbers not divisible by 7.  */
+		if (cnt % 7 != 0)
+			sha_hash(&ctx, p_bytes, key_len);
+		/* Add key or last result.  */
+		if ((cnt & 1) != 0)
+			sha_hash(&ctx, alt_result, _32or64);
+		else
+			sha_hash(&ctx, p_bytes, key_len);
+
+		sha_end(&ctx, alt_result);
+	}
+
+	/* Append encrypted password to result buffer */
+//TODO: replace with something like
+//	bb_uuencode(cp, src, length, bb_uuenc_tbl_XXXbase64);
+#define b64_from_24bit(B2, B1, B0, N) \
+do { \
+	unsigned w = ((B2) << 16) | ((B1) << 8) | (B0); \
+	resptr = to64(resptr, w, N); \
+} while (0)
+	if (_32or64 == 32) { /* sha256 */
+		unsigned i = 0;
+		while (1) {
+			unsigned j = i + 10;
+			unsigned k = i + 20;
+			if (j >= 30) j -= 30;
+			if (k >= 30) k -= 30;
+			b64_from_24bit(alt_result[i], alt_result[j], alt_result[k], 4);
+			if (k == 29)
+				break;
+			i = k + 1;
+		}
+		b64_from_24bit(0, alt_result[31], alt_result[30], 3);
+		/* was:
+		b64_from_24bit(alt_result[0], alt_result[10], alt_result[20], 4);
+		b64_from_24bit(alt_result[21], alt_result[1], alt_result[11], 4);
+		b64_from_24bit(alt_result[12], alt_result[22], alt_result[2], 4);
+		b64_from_24bit(alt_result[3], alt_result[13], alt_result[23], 4);
+		b64_from_24bit(alt_result[24], alt_result[4], alt_result[14], 4);
+		b64_from_24bit(alt_result[15], alt_result[25], alt_result[5], 4);
+		b64_from_24bit(alt_result[6], alt_result[16], alt_result[26], 4);
+		b64_from_24bit(alt_result[27], alt_result[7], alt_result[17], 4);
+		b64_from_24bit(alt_result[18], alt_result[28], alt_result[8], 4);
+		b64_from_24bit(alt_result[9], alt_result[19], alt_result[29], 4);
+		b64_from_24bit(0, alt_result[31], alt_result[30], 3);
+		*/
+	} else {
+		unsigned i = 0;
+		while (1) {
+			unsigned j = i + 21;
+			unsigned k = i + 42;
+			if (j >= 63) j -= 63;
+			if (k >= 63) k -= 63;
+			b64_from_24bit(alt_result[i], alt_result[j], alt_result[k], 4);
+			if (j == 20)
+				break;
+			i = j + 1;
+		}
+		b64_from_24bit(0, 0, alt_result[63], 2);
+		/* was:
+		b64_from_24bit(alt_result[0], alt_result[21], alt_result[42], 4);
+		b64_from_24bit(alt_result[22], alt_result[43], alt_result[1], 4);
+		b64_from_24bit(alt_result[44], alt_result[2], alt_result[23], 4);
+		b64_from_24bit(alt_result[3], alt_result[24], alt_result[45], 4);
+		b64_from_24bit(alt_result[25], alt_result[46], alt_result[4], 4);
+		b64_from_24bit(alt_result[47], alt_result[5], alt_result[26], 4);
+		b64_from_24bit(alt_result[6], alt_result[27], alt_result[48], 4);
+		b64_from_24bit(alt_result[28], alt_result[49], alt_result[7], 4);
+		b64_from_24bit(alt_result[50], alt_result[8], alt_result[29], 4);
+		b64_from_24bit(alt_result[9], alt_result[30], alt_result[51], 4);
+		b64_from_24bit(alt_result[31], alt_result[52], alt_result[10], 4);
+		b64_from_24bit(alt_result[53], alt_result[11], alt_result[32], 4);
+		b64_from_24bit(alt_result[12], alt_result[33], alt_result[54], 4);
+		b64_from_24bit(alt_result[34], alt_result[55], alt_result[13], 4);
+		b64_from_24bit(alt_result[56], alt_result[14], alt_result[35], 4);
+		b64_from_24bit(alt_result[15], alt_result[36], alt_result[57], 4);
+		b64_from_24bit(alt_result[37], alt_result[58], alt_result[16], 4);
+		b64_from_24bit(alt_result[59], alt_result[17], alt_result[38], 4);
+		b64_from_24bit(alt_result[18], alt_result[39], alt_result[60], 4);
+		b64_from_24bit(alt_result[40], alt_result[61], alt_result[19], 4);
+		b64_from_24bit(alt_result[62], alt_result[20], alt_result[41], 4);
+		b64_from_24bit(0, 0, alt_result[63], 2);
+		*/
+	}
+	/* *resptr = '\0'; - xzalloc did it */
+#undef b64_from_24bit
+
+	/* Clear the buffer for the intermediate result so that people
+	   attaching to processes or reading core dumps cannot get any
+	   information.  */
+	memset(&L, 0, sizeof(L)); /* [alt]_ctx and XXX_result buffers */
+	memset(key_data, 0, key_len); /* also p_bytes */
+	memset(salt_data, 0, salt_len); /* also s_bytes */
+	free(key_data);
+	free(salt_data);
+#undef p_bytes
+#undef s_bytes
+
+	return result;
+#undef alt_result
+#undef temp_result
+#undef ctx
+#undef alt_ctx
+}

lib/display_options.c

@@ -13,6 +13,25 @@
 #include <linux/ctype.h>
 #include <asm/io.h>
 
+#ifdef CONFIG_NRSW_BUILD
+#include <version_autogenerated.h>
+#endif
+
+#ifdef CONFIG_NRSW_BUILD
+
+int display_options (void)
+{
+	printf ("\n\n%s\n", UBOOT_VERSION);
+#if defined(BUILD_TAG)
+	printf ("%s, Build: %s\n\n", version_string, BUILD_TAG);
+#else
+	printf ("%s\n\n", version_string);
+#endif
+	return 0;
+}
+
+#else /* CONFIG_NRSW_BUILD */
+
 int display_options (void)
 {
 #if defined(BUILD_TAG)
@@ -23,6 +42,8 @@ int display_options (void)
 	return 0;
 }
 
+#endif /* CONFIG_NRSW_BUILD */
+
 void print_freq(uint64_t freq, const char *s)
 {
 	unsigned long m = 0;